blink_host_dev.asm

ADI BF DSP PCI接口代码

#include <defBF535.h>
#include "My_Header.h"


.section L2_data;
.var buff[1024];

.SECTION program2;
.GLOBAL DMA_TO_DEVICE;
.EXTERN DEVICE_EXECUTE;


DMA_TO_DEVICE:

[--SP] = RETS; // push return address 

/********* write to MBAP  ****************/
P4.H = HI(PCI_MBAP); P4.L = LO(PCI_MBAP);
R0.h = HI(Memory_Window); R0.L = LO(Memory_Window); 
[P4] = R0;
ssync;

R0.L = START;
R1.L = END;
R0 = R1 - R0;

P0.L = READ;
P0.H = READ;
P1.L = WRITE;
P1.H = WRITE;
P2.L = LO(MDR_DND);
P2.H = HI(MDR_DND);	//sDMA Memory DMA Next Descriptor Pointer Register
P3.L = LO(DB_NDBP);
P3.H = HI(DB_NDBP);	//DMA Next Descriptor Base Pointer Register
P4.L = LO(MDW_DND);			
P4.H = HI(MDW_DND);	//pDMA Memory DMA Next Descriptor Pointer Register
P5.L = LO(MDR_DCFG);
P5.H = HI(MDR_DCFG);	//sDMA Memory Config Register
I0.L = LO(MDW_DCFG);
I0.H = HI(MDW_DCFG);	//pDMA Memory Config Register
I1.L = LO(MDR_DSAH);
I1.H = HI(MDR_DSAH);	//sDMA Memory Start Address High Register
I2.L = LO(MDR_DSAL);
I2.H = HI(MDR_DSAL);	//sDMA Memory Start Address Low Register

/***********************DMA to L1 Code***********************************************************/
R0.H = 0x9009;						//sDMA Config Word (8-bit transfers)
//R0.H = 0x8001;						//sDMA Config Word (16-bit transfers)
//R0.H = 0x8009;						//sDMA Config Word (32-bit transfers)
R1.L = START;						//sDMA Start Address Low
R1.H = START;						//sDMA Start Address High
R2.L = END_DMA;						//sDMA Next Descriptor Pointer

R2.H = 0x900B;						//pDMA Config Word (8-bit transfers)
//R2.H = 0x8003;						//pDMA Config Word (16-bit transfers)
//R2.H = 0x800B;						//pDMA Config Word (32-bit transfers)
R3.L = LO(Memory_Window);			//pDMA Start Address Low = PCI MEM WINDOW
R3.H = HI(Memory_Window);	//pDMA Start Address High = PCI MEM WINDOW
R4.L = END_DMA;

CALL Setup_TCB;
CALL Enable_DMA;


DMA_TO_DEVICE.END:
	RETS = [SP++]; // Pop return address
	RTS;  // RETURN TO PCI_HOST_BUB


IDLE;
SSYNC;

/********TCB Setup**********/
Setup_TCB:

W[P0+0x2] = R0;						//sDMA Count
[P0+0x4] = R1;						//sDMA Start Address
W[P0+0x8] = R2; 					//sDMA Next Descriptor Pointer

W[P1+0x2] = R0;						//pDMA Count
[P1+0x4] = R3;						//pDMA Start Address
W[P1+0x8] = R4;						//pDMA Next Descriptor Pointer

W[P0] = R0.H;						//sDMA Config Word
W[P1] = R2.H;						//pDMA Config Word
RTS;
/***************************/

/********Enable DMA*********/
Enable_DMA:
R6 = P0;
W[P2] = R6.L;						//sDMA Memory DMA Next Descriptor Pointer Register = FLASH_READ
W[P3] = R6.H;						//DMA Next Descriptor Base Pointer Register

R6 = P1;
W[P4] = R6.L;						//pDMA Memory DMA Next Descriptor Pointer Register = FLASH_WRITE

R6 = W[P5];
BITSET(R6,0);						//Enable DMA for sDMA

R7.L = W[I0];
BITSET(R7,0);						//Enable DMA for pDMA

W[P5] = R6;
.ALIGN 4;
W[I0] = R7.L;
.ALIGN 4;
DMA_WAIT:							//Wait for DMA to Complete
R6 = W[P1];
cc = bittst(R6,15);
IF cc JUMP DMA_WAIT;

RTS;
/***************************/

/*******************************Application Code to be DMAed**********************/
START:


	
	
	P0.L = LO(FIO_DIR);
	P0.H = HI(FIO_DIR);

	R0 = W[P0];
	R1.L = 0xF800;
	R0 = R0 | R1;
	W[P0] = R0;					//Set PF 15 - PF 11 as Outputs

	P1.L = LO(FIO_FLAG_S);
	P1.H = HI(FIO_FLAG_S);
	P2.L = LO(FIO_FLAG_C);
	P2.H = HI(FIO_FLAG_C);

	P5.H = 0x0353;
//	P5.H=0x03C3;
	P5.L=0x4600;			//Count to Generate Interrupt Every 2sec for 300MHz
	
	R1.L = 0xA800;			//Affect PF15, PF13, and PF11
	R2.L = 0x5000;			//Affect PF14 and PF 12

	LIGHT:
	W[P1] = R1;			//Set PF15, PF13, and PF11
	CSYNC;
	W[P2] = R2;			//Clear PF14 and PF12
	CSYNC;

	CALL DELAY_LOOP;
 
	W[P1] = R2;			//Set PF14 and PF12
	CSYNC;
	W[P2] = R1;			//Clear PF15, PF13, and PF11
	CSYNC;

	CALL DELAY_LOOP;

	JUMP LIGHT;

	DELAY_LOOP:        
	LSETUP(L_BEGIN, L_END) LC0 = P5;
	L_BEGIN:
	L_END: NOP;    
	RTS;         
END:	NOP; 
/************************************************************************************/

.align 4;
.BYTE2 READ[5];
.align 4;
.BYTE2 WRITE[5];
.align 4;
.BYTE2 END_DMA[1] = 0x0;