c200user.asm

DSP MOTOR CONTRL

;*H*************************************************************************
; TI Proprietary Information - Internal Data
; Copyright (c) 1993-1999, Texas Instruments Incorporated
; All rights reserved
;***************************************************************************
;***************************************************************************
;
; DESCRIPTION:
;
;     Truely trivial application program
;       for C25LP HLL Real-Time Debugger.
;
;     This real-time monitor was developed by H.Roland Hoar.
;
; STATUS:
;
;     This monitor version is dated 24th of June 1997.
;     It is intended for use with HLL Debugger versions "1.19" or later.
;     The MON_RELEASE mnemonic has the hexadecimal value '1019'.
;
;     This document has page feed characters spaced for 66 lines per page.
;     Its page alignment is adjusted to ensure
;         attractive two-page-per-sheet printing.
;
;***************************************************************************
;
            .title "Application program for C25LP HLL Real-Time Debugger."
            .include "c200mnrt.i" ; Include conditional assembly options.
            .mmregs               ; Include standard register mnemonics.
            .length 66            ; Set the page length for the listing.
;
;**************************************************************************
; GLOBAL DECLARATIONS
;**************************************************************************
            .global USER_CODE,
            .global INT1_ISR, INT2_ISR, INT3_ISR
            .global INT4_ISR, INT5_ISR, INT6_ISR
;
;**************************************************************************
; CONSTANT DECLARATIONS
;**************************************************************************

PRD             .set    0FFFDh
TCR             .set    0FFFCh
		
M_INT1          .set    0001h
M_INT2          .set    0002h
M_INT3          .set    0004h
M_INT4          .set    0008h
M_INT5          .set    0010h
M_INT6          .set    0020h
M_EMUINT        .set    0040h

B_INT1          .set    0
B_INT2          .set    1
B_INT3          .set    2
B_INT4          .set    3
B_INT5          .set    4
B_INT6          .set    5
B_EMUINT        .set    6

            .page 
;--------------------------------------------------------------------------
; Structure Definitions:
;--------------------------------------------------------------------------

STRUCT          .macro  symbol,structure,length
:symbol:        .tag    structure
                .sym    symbol,symbol,8,2,length*16,structure
                .endm

COUNTER         .struct
Hi              .int
Lo              .int
COUNTER_LEN     .endstruct

                .stag COUNTER,COUNTER_LEN*16
                .member Hi,0*16,4,8,16
                .member Lo,1*16,4,8,16
                .eos

;--------------------------------------------------------------------------
; Reserve Data Memory:                                
;--------------------------------------------------------------------------

		STRUCT  BackCount, COUNTER, COUNTER_LEN
BackCount       .usect  "usr_data", COUNTER_LEN, 1

		STRUCT  TimeCount, COUNTER, COUNTER_LEN
TimeCount      .usect  "usr_data", COUNTER_LEN, 1

Stack           .usect  "usr_data", 0
 
            .page 
;--------------------------------------------------------------------------
; Define program section
;--------------------------------------------------------------------------
            .sect "usr_code"
;
USER_CODE   MAR     *, AR0        ; Initialise the ARP register.
            LDP     #0            ; initialise the DP register
            NOP                   ; do nothing
            NOP                   ; do nothing

            CALL    MON_SE_CNFG   ; Initialise the SE Device.
            NOP                   ; do nothing
            NOP                   ; do nothing

STACK       B       STACK_LOAD    ; load the stack
            NOP                   ; do nothing
            NOP                   ; do nothing

            LAR     AR0,#0        ; Initialise the AR0 register.
            LAR     AR1,#0        ; Initialise the AR1 register.
            LAR     AR2,#0        ; Initialise the AR2 register.
            LAR     AR3,#0        ; Initialise the AR3 register.
            LAR     AR4,#0        ; Initialise the AR4 register.
            LAR     AR5,#0        ; Initialise the AR5 register.
            LAR     AR6,#0        ; Initialise the AR6 register.
            LAR     AR7,#0        ; Initialise the AR7 register.
            NOP                   ; do nothing
            NOP                   ; do nothing

            SPLK    #00000h, IMR  ; disable all the interrupt masks
            SPLK    #000FFh, IFR  ; clear all the interrupt flags
            NOP                   ; do nothing
            NOP                   ; do nothing

            lar     AR7, #Stack   ; Initialise Stack
            mar     *, AR7
            NOP                   ; do nothing
            NOP                   ; do nothing

            SPLK    #00030h, *    ;
            OUT     *, TCR        ; stop the timer
            SPLK    #02000h, *    ;
            OUT     *, PRD        ; Configure timer for 100us with 50ns clock.
            SPLK    #00020h, *    ;
            OUT     *, TCR        ; start the timer
            NOP                   ; do nothing
            NOP                   ; do nothing

            CALL    MON_RT_CNFG   ; Initialise the RT Monitor.
            NOP                   ; do nothing
            NOP                   ; do nothing
;
            .page 
;--------------------------------------------------------------------------
; Define an outer loop initialising the background counter.
;--------------------------------------------------------------------------
            .sect "usr_code"
;
OUTER
            DINT                  ; Globally disable the interrupts here.
            NOP                   ; do nothing
            NOP                   ; do nothing

            CLRC    SXM           ;
            NOP                   ; do nothing
            NOP                   ; do nothing

            lacl    #0
            lacc    #08000h,8
            ldp     #BackCount
            sach    BackCount.Hi
            sacl    BackCount.Lo
            NOP                   ; do nothing
            NOP                   ; do nothing

            lacc    #0
            lacc    #08000h,0
            ldp     #TimeCount
            sach    TimeCount.Hi
            sacl    TimeCount.Lo
            NOP                   ; do nothing
            NOP                   ; do nothing

            SPLK    #00040h, IMR  ; Enable the emulation interrupt.
            EINT                  ; Globally enable the interrupts here.
            NOP                   ; do nothing
            NOP                   ; do nothing

CALL        CALL    INNER         ; do long inner loop
            NOP                   ; do nothing
            NOP                   ; do nothing

            B       OUTER         ; restart the aux' regster increment loop
;
            .page 
;--------------------------------------------------------------------------
; Define an inner loop initialising the background counter,
; and incrementing most auxilliary registers.
;--------------------------------------------------------------------------
            .sect "usr_code"
;
INNER       EINT
            NOP                   ; do nothing
            NOP                   ; do nothing
            NOP                   ; do nothing
            NOP                   ; do nothing


            DINT
            MAR     *, AR0        ; Initialise the ARP register.
            MAR     *+, AR1       ; Increment AR0 and step ARP.
            MAR     *+, AR2       ; Increment AR1 and step ARP.
            MAR     *+, AR3       ; Increment AR2 and step ARP.
            MAR     *+, AR4       ; Increment AR3 and step ARP.
            MAR     *+, AR5       ; Increment AR4 and step ARP.
            MAR     *+, AR6       ; Increment AR5 and step ARP.
            NOP                   ; do nothing
            NOP                   ; do nothing
            NOP                   ; do nothing
            NOP                   ; do nothing

            EINT
            MAR     *, AR0        ; Initialise the ARP register.
            MAR     *+, AR1       ; Increment AR0 and step ARP.