c200mnrt.asm

DSP BIOS A

               LDP    #MON_PGE0_DP  ; Set DP to page zero.
               NOP                  ;
               SPLK   #0FFFFh, 07Eh ;
               OUT    07Eh, 0FFFDh  ; set the 16 bit reload value
               SPLK   #00C20h, 07Eh ;
               OUT    07Eh, 0FFFCh  ; set the 4 bit reload value
                                    ; set the free-run, load and start bits
               .endm
               .endif ; (MON_DEBUG)
;
;---------------------------------------------------------------------------
; Define MON_DBG_STOP macro.
; This macro is used to stop a C209 timer so as to benchmark
; the HLL Debugger updating memory or register values during a run command.
;---------------------------------------------------------------------------
               .if (MON_DEBUG)
mon_dbg_stop   .macro
               LDP    #MON_PGE0_DP ; Set DP to page zero.
               NOP                 ;
               IN     07Fh, 0FFFEh ; read the 16 bit timer value
               LACL   07Fh         ;
               NEG                 ;
               SACL   07Fh         ;
               .endm
               .endif ; (MON_DEBUG)
;
               .page 
;***************************************************************************
; Name: The MON_SE_CNFG routine
;
; Description
;    Routine to configure the SE Device.
;
;    This routine will over-write the contents of ACCL, ACCH, ST0, ST1.
;    This routine will temporarily use an extra level of stack.
;
; 1. Initialise the SE's sixteen memory map configuration registers.
;
;***************************************************************************
MON_SE_CNFG    .sect "mon_main"
;---------------------------------------------------------------------------
; This RET instruction is here in case MON_SE_CNFG is excluded
; by conditional assembly but still CALL'ed in the application code.
; Attempts to reuse existing MON_ERET instructions incovered problems
; when hardware resets occured during a RUNF.
;---------------------------------------------------------------------------
               .if (MON_SE_CNFG_USE == MON_SE_CNFG_USE_NOT)
               RET
               .endif ; (MON_SE_CNFG_USE == MON_SE_CNFG_USE_NOT)
;
;---------------------------------------------------------------------------
; Set the ANA_TRPON bit in MSG_CNTL before any other analysis access.
;
; This code places appropriate values in the sixteen memory mapped
; configuration buffers. During this load sequence the most
; significant bit in the least significant buffer must be set.
; All this must be in ETRAP/ERET protected code.
;---------------------------------------------------------------------------
               .if (MON_SE_CNFG_USE == MON_SE_CNFG_USE_YES)
               LDP    #MON_PGE0_DP         ; Set DP to page zero.
               SPLK   #ANA_TRPON, MSG_CNTL ; Important initialisation.
;
               mon_etrap_load $+3          ; Enter fully protected mode
               mon_etrap                   ; with a null ETRAP.
;
               .if (MON_RESET_MESG == MON_RESET_MESG_FLOW)
               SPLK   #ANA_SWLO, MSG_CNTL  ; Set the message switch low.
               .endif ; (MON_RESET_MESG == MON_RESET_MESG_FLOW)
;
               LALK   #(MON_SE_VALU + 1)
                                   ; Set ACCL near to the table's low end.
               LAR    MON_AR, #MON_SE_ADRS
                                   ; Set MON_AR to the buffer's low end.
               RPTK   #(16 - 1)    ;
               TBLR   *+           ;
;
               SUBK   #1           ; Set ACCL to the table's low end.
               SBRK   #16          ; Set MON_AR to the buffer's low end.
               TBLR   *            ;
;
               mon_eret            ; Exit fully protected mode and
                                   ; return to the application code.
;
               .endif ; (MON_SE_CNFG_USE == MON_SE_CNFG_USE_YES)
;
               .page 
;***************************************************************************
; This page is intentionally left blank.
;***************************************************************************
;
               .page 
;***************************************************************************
; Name: The MON_RT_CNFG routine
;
; Description
;    Routine to configure the RT Monitor.
;
;    This routine will over-write the contents of ACCL, ACCH, ST0, ST1.
;    This routine will temporarily use an extra level of stack.
;
; 1. Initialise the monitor and send a reset status to the HLL Debugger.
;
;***************************************************************************
MON_RT_CNFG    .sect "mon_main"
;---------------------------------------------------------------------------
; Do the initialisation of the analaysis logic.
; Set the ANA_TRPON bit in MSG_CNTL before any other analysis access.
; Do an access in fully protected mode to initialise the rest of MSG_CNTL.
; If MON_SE_CNFG is used then it does the analysis initialisation instead.
;---------------------------------------------------------------------------
               LDP    #MON_PGE0_DP           ; Set DP to page zero.
;
               .if (MON_SE_CNFG_USE == MON_SE_CNFG_USE_NOT)
               SPLK   #ANA_TRPON, MSG_CNTL   ; Important initialisation.
;
;               mon_etrap_load $+3          ; Enter fully protected mode
;               mon_etrap                   ; with a null ETRAP.
               .if (MON_RESET_MESG == MON_RESET_MESG_FLOW)
               mon_etrap_load $+3            ; Enter fully protected mode
               mon_etrap                     ; with a null ETRAP.
;
               SPLK   #ANA_SWLO, MSG_CNTL    ; Set the message switch low.
               .endif ; (MON_RESET_MESG == MON_RESET_MESG_FLOW)
               .endif ; (MON_SE_CNFG_USE == MON_SE_CNFG_USE_NOT)
;
;---------------------------------------------------------------------------
; Initialise everything that is not self-initialising in the monitor.
;---------------------------------------------------------------------------
               mon_etrap_load MON_TRAP_ENTRY ;
               SPLK   #ATN_OK, MON_STATUS    ;
;
               .page 
;---------------------------------------------------------------------------
; Set the monitor status to indicate a reset.
;
; After a HLL Debugger "RESET" command and before entering realtime with
; the HLL Debugger "REALTIME" command, the PC value must reach MON_GO.
; This may be done by using the "GO MON_GO" command, or by setting a
; hardware breakpoint at MON_GO and using the "RUN" command.
;---------------------------------------------------------------------------
MON_GO         SPLK   #ATN_RESET, MON_STATUS ;
;
;---------------------------------------------------------------------------
; Enter the monitor.  If the HLL Debugger is executing the RUNF command
; or is physically dis-connected, then the monitor will exit as soon as
; it sees the STAT_STRAP bit in MSG_STAT is zero.
;
; If the HLL Debugger has the application code halted in realtime,
; then the PC value will become MON_RESET after a hardware reset occurs.
;---------------------------------------------------------------------------
               .if (MON_RESET_MESG == MON_RESET_MESG_DEFAULT)
               mon_etrap                     ;
MON_RESET      NOP                           ;
               .endif ; (MON_RESET_MESG == MON_RESET_MESG_DEFAULT)
;
;---------------------------------------------------------------------------
; Do a RET or MON_ERET to return to the calling program.
;---------------------------------------------------------------------------
               .if (MON_SE_CNFG_USE != MON_SE_CNFG_USE_NOT)
               RET                           ;
               .elseif (MON_RESET_MESG != MON_RESET_MESG_FLOW)
               RET                           ;
               .else ; (MON_SE_CNFG_USE_NOT && MON_RESET_MESG_FLOW)
               mon_eret                      ;
               .endif
;
               .page 
;***************************************************************************
; Name: The MON_TRAP_ENTRY / MON_INTR_ENTRY / MON_ENTRY routines
;
; Description
;    Emulation trap and interrupt service routines.
;
; 1. If MON_TRAP_ENTRY then do the following:
;    Copy ACCL & ACCH to page zero temporary storage.
;    Disable the emulation interrupt and selected user interrupt masks.
;    Disable the single step function.
;    Initialise the message passing logic.
;
; 2. Then if MON_TRAP_ENTRY or
;            MON_INTR_ENTRY do the following:
;    If monitor entered from MON_INTR_ENTRY then interrupts now enabled.
;    Possibly copy PC & ST1-0 from temporary storage to the register image.
;    Possibly copy ACCL & ACCH from temporary storage to the register image.
;    Possibly copy the full register set exactly to the register image.
;    Set the emulation vector's to MON_ENTRY while in the monitor.
;    If monitor entered from MON_TRAP_ENTRY then exit ETRAP protected mode.
;
; 3. Then do the following in MON_ENTRY:
;    Possibly copy PC & ST1-0 from temporary storage to the register image.
;    Possibly copy ACCL & ACCH from temporary storage to the register image.
;    Possibly copy the full register set lazily to the register image.
;    Calculate which interrupts will be enabled when the monitor exits.
;    Wait for the message passing logi to be in its "MPSD FUNC" state.
;    Test for the occurance of software breakpoints.
;    Enter the monitor at its unchanged or after-error states.
;
; Input     PRM_CMND     = Preserved command.
;           PRM_ADRS     = Preserved address.
;           MON_TEMP_PC  = Temporarily saved user PC value.
;           MON_TEMP_ST0 = Temporarily saved user ST0 value.
;           MON_TEMP_ST1 = Temporarily saved user ST1 value.
;
;***************************************************************************
;
               .page 
MON_TRAP_ENTRY .sect "mon_main"
;---------------------------------------------------------------------------
; Save the accumalator in temporary storage.
;---------------------------------------------------------------------------
               .if (MON_RGST == MON_RGST_ANY)
               SACL  MON_TEMP_ACCL ;
               SACH  MON_TEMP_ACCH ;
               .else ; (MON_RGST == MON_RGST_ZRO)
               SACL  MON_ACCL      ;
               SACH  MON_ACCH      ;
               .endif ; (MON_RGST)
;
;---------------------------------------------------------------------------
; Disable the emulation interrupt and selected other interrupts
; so that their service routines may be breakpointed or single stepped.
;---------------------------------------------------------------------------
               LACL  IMR               ;
               SACL  MON_IMR_SAVE      ;
               ANDK  #(MON_INT_MSK)    ;
               SACL  IMR               ;
;
;---------------------------------------------------------------------------
; Possibly clear the Interrupt Mode bit (INTM) in Status Register #0.
; This is done just after we manipulate the IMR.
;---------------------------------------------------------------------------
               .if (MON_INT_ALTR == MON_INT_ALTR_ENB)
               EINT                    ; Enable interrupts.
               .endif ; (MON_INT_ALTR == MON_INT_ALTR_ENB)
;
;---------------------------------------------------------------------------
; Disable the emulation single step bit in case we were single stepping
; or single running. This must be after the ETRAP so the status emulation
; bits are accessable but before MON_TEMP_ST1 is saved to the register
; image and before an ERET triggers single step again.
;---------------------------------------------------------------------------
               LACK   #(SNG_STP_DSB | GLB_INT_ENB); Short immediate is ok.
               OR     MON_TEMP_ST1     ;
               SACL   MON_TEMP_ST1     ;
               LST    #1, MON_TEMP_ST1 ; Restore ST1
;
;---------------------------------------------------------------------------
; The first part of initialising the message passing logic was setting the
; ANA_TRPON bit in MSG_CNTL before entering ETRAP/ERET protected mode.
; That was done in MON_SE_CNFG or MON_RT_CNFG. The second part is done
; here. It consists of writing the initialisaton value while in ETRAP/ERET
; protected mode, but before actually using the message passing logic.
;---------------------------------------------------------------------------
               SPLK    #ANA_SWLO, MSG_CNTL ; Set the message switch low.
;
               .page 
MON_INTR_ENTRY .sect "mon_main"
;---------------------------------------------------------------------------
; Save the final value of INTM after the EINTs in the MON_EINTR_VECS macro
; and MON_ETRAP_ENTRY code.  This is not the ideal location to save INTM.
; It would be better done in interrupt disabled code immediately after the
; EINTs in both the macro and code.  Doing it here avoids changing the size
; of the macro. It also keeps B2 ram usage within 32 words when extended
; addressing is enabled, by sharing MON_ST0_SAVE and MON_IMR_SAVE.
;---------------------------------------------------------------------------
               .if (MON_XTND_EITHER == MON_XTND_OFF)
               SST    #0, MON_ST0_SAVE ; Save ST0
               .else ; (MON_XTND_EITHER == MON_XTND_ON)
               SST    #0, MON_MACHINE  ; Use of MON_MACHINE