trmpc860.h

ppc860平台上移植uc OS的实例

   unsigned short	pio_pcint;			/* port C interrupt cntrl reg */
   unsigned char	RESERVED64[6];
   unsigned short	pio_pddir;			/* port D Data Direction reg */
   unsigned short	pio_pdpar;			/* port D pin assignment reg */
   unsigned char	RESERVED65[2];
   unsigned short	pio_pddat;			/* port D data reg */
   unsigned char	RESERVED21[0x8];	/* Reserved area */

   /*-----------*/
   /* CPM Timer */
   /*-----------*/

   unsigned short	timer_tgcr;			/* timer global configuration reg 								*/
   unsigned char	RESERVED22[0xe];	/* Reserved area */
   unsigned short	timer_tmr1;			/* timer 1 mode reg */
   unsigned short	timer_tmr2;			/* timer 2 mode reg */
   unsigned short	timer_trr1;			/* timer 1 referance reg */
   unsigned short	timer_trr2;			/* timer 2 referance reg */
   unsigned short	timer_tcr1;			/* timer 1 capture reg */
   unsigned short	timer_tcr2;			/* timer 2 capture reg */
   unsigned short	timer_tcn1;			/* timer 1 counter reg */
   unsigned short	timer_tcn2;			/* timer 2 counter reg */
   unsigned short	timer_tmr3;			/* timer 3 mode reg */
   unsigned short	timer_tmr4;			/* timer 4 mode reg */
   unsigned short	timer_trr3;			/* timer 3 referance reg */
   unsigned short	timer_trr4;			/* timer 4 referance reg */
   unsigned short	timer_tcr3;			/* timer 3 capture reg */
   unsigned short	timer_tcr4;			/* timer 4 capture reg */
   unsigned short	timer_tcn3;			/* timer 3 counter reg */
   unsigned short	timer_tcn4;			/* timer 4 counter reg */
   unsigned short	timer_ter1;			/* timer 1 event reg */
   unsigned short	timer_ter2;			/* timer 2 event reg */
   unsigned short	timer_ter3;			/* timer 3 event reg */
   unsigned short	timer_ter4;			/* timer 4 event reg */
   unsigned char	RESERVED23[0x8];	/* Reserved area */

   /*----*/
   /* CP */
   /*----*/

   unsigned short	cp_cr;				/* command register */
   unsigned char	RESERVED24[0x2];	/* Reserved area */
   unsigned short	cp_rccr;				/* main configuration reg */
   unsigned char	RESERVED25;			/* Reserved area */
   unsigned char	cp_resv1;			/* Reserved reg */
   unsigned long	cp_resv2;			/* Reserved reg */
   unsigned short	cp_rctr1;			/* ram break register 1 */
   unsigned short	cp_rctr2;			/* ram break register 2 */
   unsigned short	cp_rctr3;			/* ram break register 3 */
   unsigned short	cp_rctr4;			/* ram break register 4 */
   unsigned char	RESERVED26[0x2];	/* Reserved area */
   unsigned short	cp_rter;				/* RISC timers event reg */
   unsigned char	RESERVED27[0x2];	/* Reserved area */
   unsigned short	cp_rtmr;				/* RISC timers mask reg */
   unsigned char	RESERVED28[0x14];	/* Reserved area */

   /*-----*/
   /* BRG */
   /*-----*/

   unsigned long	brgc1;		/* BRG1 configuration reg */
   unsigned long	brgc2;		/* BRG2 configuration reg */
   unsigned long	brgc3;		/* BRG3 configuration reg */
   unsigned long	brgc4;		/* BRG4 configuration reg */

   /*---------------*/
   /* SCC registers */
   /*---------------*/

   struct scc_regs 
   
   {
       unsigned long	scc_gsmrl;   		/* SCC Gen mode (LOW) */
       unsigned long	scc_gsmrh; 	    	/* SCC Gen mode (HIGH) */
       unsigned short	scc_psmr;			/* protocol specific mode register */
       unsigned char	RESERVED29[0x2]; 	/* Reserved area */
       unsigned short	scc_todr; 			/* SCC transmit on demand */
       unsigned short	scc_dsr;			/* SCC data sync reg */
       unsigned short	scc_scce;			/* SCC event reg */
       unsigned char	RESERVED30[0x2];	/* Reserved area */
       unsigned short	scc_sccm;			/* SCC mask reg */
       unsigned char	RESERVED31[0x1];	/* Reserved area */
       unsigned char	scc_sccs;			/* SCC status reg */
       unsigned char	RESERVED32[0x8]; 	/* Reserved area */

   } scc_regs[4];

   
   /*-----*/
   /* SMC */
   /*-----*/

   struct smc_regs 
   
   {
       unsigned char	RESERVED34[0x2]; 	/* Reserved area */
       unsigned short	smc_smcmr;			/* SMC mode reg */
       unsigned char	RESERVED35[0x2];	/* Reserved area */
       unsigned char	smc_smce;			/* SMC event reg */
       unsigned char	RESERVED36[0x3]; 	/* Reserved area */
       unsigned char	smc_smcm;			/* SMC mask reg */
       unsigned char	RESERVED37[0x5]; 	/* Reserved area */

   } smc_regs[2];


   /*-----*/
   /* SPI */
   /*-----*/

   unsigned short	spi_spmode;			/* SPI mode reg */
   unsigned char	RESERVED38[0x4];	/* Reserved area */
   unsigned char	spi_spie;			/* SPI event reg */
   unsigned char	RESERVED39[0x3];	/* Reserved area */
   unsigned char	spi_spim;			/* SPI mask reg */
   unsigned char	RESERVED40[0x2];	/* Reserved area */
   unsigned char	spi_spcom;			/* SPI command reg */
   unsigned char	RESERVED41[0x4];	/* Reserved area */

   /*-----*/
   /* PIP */
   /*-----*/

   unsigned short	pip_pipc;			/* pip configuration reg */
   unsigned char	RESERVED42[0x2];	/* Reserved area */
   unsigned short	pip_ptpr;			/* pip timing parameters reg */
   unsigned long	pip_pbdir;			/* port b data direction reg */
   unsigned long	pip_pbpar;			/* port b pin assignment reg */
   unsigned char	RESERVED43[0x2];	/* Reserved area */
   unsigned short	pip_pbodr;			/* port b open drain reg */
   unsigned long	pip_pbdat;			/* port b data reg */
   unsigned char	RESERVED44[0x18];	/* Reserved area */


   /*------------------*/
   /* Serial Interface */
   /*------------------*/

   unsigned long	si_simode;				/* SI mode register */
   unsigned char	si_sigmr;				/* SI global mode register */
   unsigned char	RESERVED45; 			/* Reserved area */
   unsigned char	si_sistr;				/* SI status register */
   unsigned char	si_sicmr;				/* SI command register */
   unsigned char	RESERVED46[0x4]; 		/* Reserved area */
   unsigned long	si_sicr;					/* SI clock routing */
   unsigned long	si_sirp;					/* SI ram pointers */
   unsigned char	RESERVED47[0x10c];	/* Reserved area */
   unsigned char	si_siram[0x200]; 		/* SI routing ram */
   unsigned char	RESERVED48[0x1200]; 	/* Reserved area */

   /*---------------------------------*/
   /* BASE + 0x2000: user data memory */
   /*---------------------------------*/

   unsigned char	udata_bd_ucode[0x200];	/* user data bd's or Ucode (small)  */
   unsigned char	udata_bd_ucode2[0x200];	/* user data bd's or Ucode (medium) */
   unsigned char	udata_bd_ucode3[0x400];	/* user data bd's or Ucode (large)  */
   unsigned char	udata_bd[0x700];			/* user data bd's*/
   unsigned char	ucode_ext[0x100];			/* Ucode Extension ram*/
   unsigned char	RESERVED49[0x0c00];		/* Reserved area */


   /*-----------------------------------------------------------------------*/
   /* BASE + 0x3c00: PARAMETER RAM. This main union defines 4 memory blocks */
   /* of an identical size. See the Parameter RAM definition in the MPC860  */
   /* user's manual.                                                        */
   /*-----------------------------------------------------------------------*/

   /*------------------------*/
   /* Base + 0x3C00 (page 1) */
   /*      + 0x3D00 (page 2) */
   /*      + 0x3E00 (page 3) */
   /*      + 0x3F00 (page 4) */
   /*------------------------*/

   union 
      
   {
      struct page_of_pram 
       
      {
         /*------------------------------------------------------------*/
         /* scc parameter area - 1st memory block (protocol dependent) */
         /*------------------------------------------------------------*/

         union 
           
         {
            struct hdlc_pram	h;
            struct uart_pram	u;
            struct bisync_pram	b;
            struct transparent_pram	t;
            struct async_hdlc_pram	a;
            unsigned char	RESERVED50[0x80];

         } pscc;		

         /*----------------------------------------------------------------*/
         /* Other protocol areas for the rest of the memory blocks in each */
         /* page.                                                          */
         /*----------------------------------------------------------------*/

         union 
                 
         {
            /*---------------------------------------------------------------*/
            /* This structure defines the rest of the blocks on the 1st page */
            /*---------------------------------------------------------------*/ 
         
            struct 
         
            {
               struct i2c_pram	i2c;     /* I2C   */
               struct idma_pram	idma1;   /* IDMA1 */

            } i2c_idma;

            /*---------------------------------------------------------------*/
            /* This structure defines the rest of the blocks on the 2nd page */
            /*---------------------------------------------------------------*/
 
            struct 
         
            {
               struct spi_pram	    spi;     /* SPI    */
               struct timer_pram	timer;   /* Timers */
               struct idma_pram	    idma2;   /* IDMA2  */

            } spi_timer_idma;

            /*---------------------------------------------------------------*/
            /* This structure defines the rest of the blocks on the 3rd page */
            /*---------------------------------------------------------------*/
 
            struct 
         
            {
               union 
          
               {
                  struct smc_uart_pram u1;   /* SMC1 */
                  struct smc_trnsp_pram t1;  /* SMC1 */
                  unsigned char	RESERVED58[0x40];     /* declare full block */

               } psmc1;

               unsigned char	dsp1_param1[0x40];

            } smc_dsp1;


            /*---------------------------------------------------------------*/
            /* This structure defines the rest of the blocks on the 4th page */
            /*---------------------------------------------------------------*/ 
 
            struct 
         
            {
               union 
          
               {
                  struct smc_uart_pram u2;   /* SMC2 */
                  struct smc_trnsp_pram t2;  /* SMC2 */
                  struct centronics_pram c;  /* Uses SM2's space */
                  unsigned char	RESERVED59[0x40];    /* declare full block */

               } psmc2;

               unsigned char	dsp2_param[0x40];

            } smc_dsp2; 

            unsigned char	RESERVED56[0x80];    /* declare full block */

         } pothers;

      } scc;

      /*---------------------------------------------------------------*/
      /* When selecting Ethernet as protocol for an SCC, this protocol */
      /* uses a complete page of Parameter RAM memory.                 */
      /*---------------------------------------------------------------*/

      struct ethernet_pram	enet_scc; 

      /*--------------------------------------------------------*/
      /* declaration to guarantee a page of memory is allocated */
      /*--------------------------------------------------------*/

      unsigned char   RESERVED60[0x100]; 

   } pram[4]; /* end of union */
} ttMpc860;

typedef ttMpc860 *ttMpc860Ptr;

/************************************************************************
*						DUAL PORT RAM DEFINITIONS						*
************************************************************************/


#define pipe	smce2				/* pip event register at same address as smce2 */
#define pipm	smcm2				/* pip mask register