📄 trmpc860.h
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#define TM_MPC860_PORTB_PB23 0x00000100UL
#define TM_MPC860_PORTB_PB24 0x00000080UL
#define TM_MPC860_PORTB_PB25 0x00000040UL
#define TM_MPC860_PORTB_PB26 0x00000020UL
#define TM_MPC860_PORTB_PB27 0x00000010UL
#define TM_MPC860_PORTB_PB28 0x00000008UL
#define TM_MPC860_PORTB_PB29 0x00000004UL
#define TM_MPC860_PORTB_PB30 0x00000002UL
#define TM_MPC860_PORTB_PB31 0x00000001UL
/*
* Port C Registers
*/
#define TM_MPC860_PORTC_PC0 (unsigned short)0x8000
#define TM_MPC860_PORTC_PC1 (unsigned short)0x4000
#define TM_MPC860_PORTC_PC2 (unsigned short)0x2000
#define TM_MPC860_PORTC_PC3 (unsigned short)0x1000
#define TM_MPC860_PORTC_PC4 (unsigned short)0x0800
#define TM_MPC860_PORTC_PC5 (unsigned short)0x0400
#define TM_MPC860_PORTC_PC6 (unsigned short)0x0200
#define TM_MPC860_PORTC_PC7 (unsigned short)0x0100
#define TM_MPC860_PORTC_PC8 (unsigned short)0x0080
#define TM_MPC860_PORTC_PC9 (unsigned short)0x0040
#define TM_MPC860_PORTC_PC10 (unsigned short)0x0020
#define TM_MPC860_PORTC_PC11 (unsigned short)0x0010
#define TM_MPC860_PORTC_PC12 (unsigned short)0x0008
#define TM_MPC860_PORTC_PC13 (unsigned short)0x0004
#define TM_MPC860_PORTC_PC14 (unsigned short)0x0002
#define TM_MPC860_PORTC_PC15 (unsigned short)0x0001
/*
* SI Clock Route Register
*/
/*
* SCC1 Clock Sources
*/
#define TM_MPC860_SI_SCC1_GRANT 0x00000080UL
#define TM_MPC860_SI_SCC1_CONNECT 0x00000040UL
#define TM_MPC860_SI_SCC1_RCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC1_RCS_BRG2 0x00000008UL
#define TM_MPC860_SI_SCC1_RCS_BRG3 0x00000010UL
#define TM_MPC860_SI_SCC1_RCS_BRG4 0x00000018UL
#define TM_MPC860_SI_SCC1_RCS_CLK1 0x00000020UL
#define TM_MPC860_SI_SCC1_RCS_CLK2 0x00000028UL
#define TM_MPC860_SI_SCC1_RCS_CLK3 0x00000030UL
#define TM_MPC860_SI_SCC1_RCS_CLK4 0x00000038UL
#define TM_MPC860_SI_SCC1_TCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC1_TCS_BRG2 0x00000001UL
#define TM_MPC860_SI_SCC1_TCS_BRG3 0x00000002UL
#define TM_MPC860_SI_SCC1_TCS_BRG4 0x00000003UL
#define TM_MPC860_SI_SCC1_TCS_CLK1 0x00000004UL
#define TM_MPC860_SI_SCC1_TCS_CLK2 0x00000005UL
#define TM_MPC860_SI_SCC1_TCS_CLK3 0x00000006UL
#define TM_MPC860_SI_SCC1_TCS_CLK4 0x00000007UL
/*
* SCC2 Clock Sources
*/
#define TM_MPC860_SI_SCC2_GRANT 0x00008000UL
#define TM_MPC860_SI_SCC2_CONNECT 0x00004000UL
#define TM_MPC860_SI_SCC2_RCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC2_RCS_BRG2 0x00000800UL
#define TM_MPC860_SI_SCC2_RCS_BRG3 0x00001000UL
#define TM_MPC860_SI_SCC2_RCS_BRG4 0x00001800UL
#define TM_MPC860_SI_SCC2_RCS_CLK1 0x00002000UL
#define TM_MPC860_SI_SCC2_RCS_CLK2 0x00002800UL
#define TM_MPC860_SI_SCC2_RCS_CLK3 0x00003000UL
#define TM_MPC860_SI_SCC2_RCS_CLK4 0x00003800UL
#define TM_MPC860_SI_SCC2_TCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC2_TCS_BRG2 0x00000100UL
#define TM_MPC860_SI_SCC2_TCS_BRG3 0x00000200UL
#define TM_MPC860_SI_SCC2_TCS_BRG4 0x00000300UL
#define TM_MPC860_SI_SCC2_TCS_CLK1 0x00000400UL
#define TM_MPC860_SI_SCC2_TCS_CLK2 0x00000500UL
#define TM_MPC860_SI_SCC2_TCS_CLK3 0x00000600UL
#define TM_MPC860_SI_SCC2_TCS_CLK4 0x00000700UL
/*
* SCC3 Clock Sources
*/
#define TM_MPC860_SI_SCC3_GRANT 0x00800000UL
#define TM_MPC860_SI_SCC3_CONNECT 0x00400000UL
#define TM_MPC860_SI_SCC3_RCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC3_RCS_BRG2 0x00080000UL
#define TM_MPC860_SI_SCC3_RCS_BRG3 0x00100000UL
#define TM_MPC860_SI_SCC3_RCS_BRG4 0x00180000UL
#define TM_MPC860_SI_SCC3_RCS_CLK5 0x00200000UL
#define TM_MPC860_SI_SCC3_RCS_CLK6 0x00280000UL
#define TM_MPC860_SI_SCC3_RCS_CLK7 0x00300000UL
#define TM_MPC860_SI_SCC3_RCS_CLK8 0x00380000UL
#define TM_MPC860_SI_SCC3_TCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC3_TCS_BRG2 0x00010000UL
#define TM_MPC860_SI_SCC3_TCS_BRG3 0x00020000UL
#define TM_MPC860_SI_SCC3_TCS_BRG4 0x00030000UL
#define TM_MPC860_SI_SCC3_TCS_CLK5 0x00040000UL
#define TM_MPC860_SI_SCC3_TCS_CLK6 0x00050000UL
#define TM_MPC860_SI_SCC3_TCS_CLK7 0x00060000UL
#define TM_MPC860_SI_SCC3_TCS_CLK8 0x00070000UL
/*
* SCC4 Clock Sources
*/
#define TM_MPC860_SI_SCC4_GRANT 0x80000000UL
#define TM_MPC860_SI_SCC4_CONNECT 0x40000000UL
#define TM_MPC860_SI_SCC4_RCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC4_RCS_BRG2 0x08000000UL
#define TM_MPC860_SI_SCC4_RCS_BRG3 0x10000000UL
#define TM_MPC860_SI_SCC4_RCS_BRG4 0x18000000UL
#define TM_MPC860_SI_SCC4_RCS_CLK5 0x20000000UL
#define TM_MPC860_SI_SCC4_RCS_CLK6 0x28000000UL
#define TM_MPC860_SI_SCC4_RCS_CLK7 0x30000000UL
#define TM_MPC860_SI_SCC4_RCS_CLK8 0x38000000UL
#define TM_MPC860_SI_SCC4_TCS_BRG1 0x00000000UL
#define TM_MPC860_SI_SCC4_TCS_BRG2 0x01000000UL
#define TM_MPC860_SI_SCC4_TCS_BRG3 0x02000000UL
#define TM_MPC860_SI_SCC4_TCS_BRG4 0x03000000UL
#define TM_MPC860_SI_SCC4_TCS_CLK5 0x04000000UL
#define TM_MPC860_SI_SCC4_TCS_CLK6 0x05000000UL
#define TM_MPC860_SI_SCC4_TCS_CLK7 0x06000000UL
#define TM_MPC860_SI_SCC4_TCS_CLK8 0x07000000UL
/*
* Transmit Buffer Descriptor Flags
*/
#define TM_MPC860_XMIT_READY (unsigned short)0x8000 /* ready bit */
#define TM_MPC860_XMIT_PAD (unsigned short)0x4000 /* short frame padding */
#define TM_MPC860_XMIT_WRAP (unsigned short)0x2000 /* wrap bit */
#define TM_MPC860_XMIT_INTR (unsigned short)0x1000 /* interrupt on completion */
#define TM_MPC860_XMIT_LAST (unsigned short)0x0800 /* last in frame */
#define TM_MPC860_XMIT_CRC (unsigned short)0x0400 /* transmit CRC (when last) */
/*
* Transmit Error Conditions
*/
#define TM_MPC860_XMIT_ETHER_ERROR (unsigned short)0x00c2
#define TM_MPC860_XMIT_E_DEFER (unsigned short)0x0200 /* defer indication */
#define TM_MPC860_XMIT_E_HEARTB (unsigned short)0x0100 /* heartbeat */
#define TM_MPC860_XMIT_E_LATEC (unsigned short)0x0080 /* error: late collision */
#define TM_MPC860_XMIT_E_LIMIT (unsigned short)0x0040 /* error: retransmission limit */
#define TM_MPC860_XMIT_E_COUNT (unsigned short)0x003c /* retry count */
#define TM_MPC860_XMIT_E_UNDERRUN (unsigned short)0x0002 /* error: underrun */
#define TM_MPC860_XMIT_E_CARRIER (unsigned short)0x0001 /* carier sense lost */
/*
* Receive Buffer Descriptor Flags
*/
#define TM_MPC860_RECV_EMPTY (unsigned short)0x8000 /* buffer empty */
#define TM_MPC860_RECV_WRAP (unsigned short)0x2000 /* wrap bit */
#define TM_MPC860_RECV_INTR (unsigned short)0x1000 /* interrupt on reception */
#define TM_MPC860_RECV_LAST (unsigned short)0x0800 /* last BD in frame */
#define TM_MPC860_RECV_FIRST (unsigned short)0x0400 /* first BD in frame */
/*
* Receive Error Conditions
*/
#define TM_MPC860_RECV_ERROR (unsigned short)0x00ff
#define TM_MPC860_RECV_E_TOOLONG (unsigned short)0x0020 /* frame too long */
#define TM_MPC860_RECV_E_NOTBYTE (unsigned short)0x0010 /* non-octet aligned */
#define TM_MPC860_RECV_E_SHORT (unsigned short)0x0008 /* short frame */
#define TM_MPC860_RECV_E_CRC (unsigned short)0x0004 /* receive CRC error */
#define TM_MPC860_RECV_E_OVERRUN (unsigned short)0x0002 /* receive overrun */
#define TM_MPC860_RECT_E_COLL (unsigned short)0x0001 /* collision */
/*
* Ethernet Interrupts
*/
#define TM_MPC860_INTR_ETHER_STOP (unsigned short)0x0080 /* graceful stop complete */
#define TM_MPC860_INTR_ETHER_E_XMIT (unsigned short)0x0010 /* transmit error */
#define TM_MPC860_INTR_ETHER_RECV_F (unsigned short)0x0008 /* receive frame */
#define TM_MPC860_INTR_ETHER_BUSY (unsigned short)0x0004 /* busy condition */
#define TM_MPC860_INTR_ETHER_XMIT_B (unsigned short)0x0002 /* transmit buffer */
#define TM_MPC860_INTR_ETHER_RECV_B (unsigned short)0x0001 /* receive buffer */
/*
* Serial Interrupts
*/
#define TM_MPC860_INTR_SERIAL_BUSY (unsigned short)0x0004 /* busy condition */
#define TM_MPC860_INTR_SERIAL_XMIT_B (unsigned short)0x0002 /* transmit buffer */
#define TM_MPC860_INTR_SERIAL_RECV_B (unsigned short)0x0001 /* receive buffer */
/*
* Ethernet mode register
*/
#define TM_MPC860_ETHER_IND_ADDR (unsigned short)0x1000 /* individual address mode */
#define TM_MPC860_ETHER_ENABLE_CRC (unsigned short)0x0800 /* Enable CRC */
#define TM_MPC860_ETHER_LOOPBACK (unsigned short)0x0040 /* Loop Back Mode */
#define TM_MPC860_ETHER_NBITS_IGNORED (unsigned short)0x000a /* # of ignored bits 22 */
#define TM_MPC860_ETHER_PROMISCUOUS (unsigned short)0x0200 /* promiscuous */
#define TM_MPC860_ETHER_BROADCAST (unsigned short)0x0100 /* broadcast address */
/* Uart Mode Register */
#define TM_MPC860_UART_FLOW (unsigned short)0x8000
#define TM_MPC860_STOP_2 (unsigned short)0x4000
#define TM_MPC860_CHAR_6 (unsigned short)0x1000
#define TM_MPC860_CHAR_7 (unsigned short)0x2000
#define TM_MPC860_CHAR_8 (unsigned short)0x3000
/*****************************************************************
General SCC mode register (GSMR)
*****************************************************************/
/* GSMR LOW */
/* SCC modes */
#define TM_MPC860_HDLC_PORT 0x0UL
#define TM_MPC860_HDLC_BUS 0x1UL
#define TM_MPC860_APPLE_TALK 0x2UL
#define TM_MPC860_SS_NO7 0x3UL
#define TM_MPC860_UART 0x4UL
#define TM_MPC860_PROFI_BUS 0x5UL
#define TM_MPC860_ASYNC_HDLC 0x6UL
#define TM_MPC860_V14 0x7UL
#define TM_MPC860_BISYNC_PORT 0x8UL
#define TM_MPC860_DDCMP_PORT 0x9UL
#define TM_MPC860_ETHERNET_PORT 0xcUL
#define TM_MPC860_ENABLE_XMIT 0x00000010UL
#define TM_MPC860_ENABLE_RECV 0x00000020UL
#define TM_MPC860_PREAMBLE_PAT_10 0x00080000UL
#define TM_MPC860_PREAMBLE_48 0x00800000UL
#define TM_MPC860_XMIT_CLOCK_INV 0x10000000UL
#define TM_MPC860_UART_XMIT_SAMPLE 0x00020000UL
#define TM_MPC860_UART_RECV_SAMPLE 0x00008000UL
/* GSMR HIGH */
#define TM_MPC860_TRANSPARENT_CRC 0x00008000UL
#define TM_MPC860_TRANSPARENT_RECV 0x00001000UL
#define TM_MPC860_TRANSPARENT_XMIT 0x00000800UL
#define TM_MPC860_CTS_SAMPLE 0x00000080UL
#define TM_MPC860_CD_SAMPLE 0x00000100UL
#define TM_MPC860_UART_RECV_FIFO_1 0x00000020UL
/*
* SDMA Defines
*/
#define TM_MPC860_SDMA_ARB_ID (unsigned short)0x0001
/*
* tbase and rbase registers
*/
#define TM_MPC860_XMIT_BD_ADDR(quicc,pram) ((ttMpc860BufDescPtr) \
(quicc->udata_bd_ucode +\
pram->tbase))
#define TM_MPC860_RECV_BD_ADDR(quicc,pram) ((ttMpc860BufDescPtr) \
(quicc->udata_bd_ucode +\
pram->rbase))
#define TTBD_ADDR(quicc,pram) ((ttMpc860BufDescPtr) \
(quicc->udata_bd_ucode +\
pram->tbptr))
/*****************************************************************
HDLC parameter RAM
*****************************************************************/
struct hdlc_pram {
/*
* SCC parameter RAM
*/
unsigned short rbase; /* RX BD base address */
unsigned short tbase; /* TX BD base address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* HDLC specific parameter RAM
*/
unsigned char RESERVED1[4]; /* Reserved area */
unsigned long c_mask; /* CRC constant */
unsigned long c_pres; /* CRC preset */
unsigned short disfc; /* discarded frame counter */
unsigned short crcec; /* CRC error counter */
unsigned short abtsc; /* abort sequence counter */
unsigned short nmarc; /* nonmatching address rx cnt */
unsigned short retrc; /* frame retransmission cnt */
unsigned short mflr; /* maximum frame length reg */
unsigned short max_cnt; /* maximum length counter */
unsigned short rfthr; /* received frames threshold */
unsigned short rfcnt; /* received frames count */
unsigned short hmask; /* user defined frm addr mask */
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