fxemu2c.asm

著名SFC模拟器Snes9x的源代码。

; Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
;
; Super FX assembler emulator code
; (c) Copyright 1998, 1999 zsKnight and _Demo_.
;
; Permission to use, copy, modify and distribute Snes9x in both binary and
; source form, for non-commercial purposes, is hereby granted without fee,
; providing that this license information and copyright notice appear with
; all copies and any derived work.
;
; This software is provided 'as-is', without any express or implied
; warranty. In no event shall the authors be held liable for any damages
; arising from the use of this software.
;
; Snes9x is freeware for PERSONAL USE only. Commercial users should
; seek permission of the copyright holders first. Commercial use includes
; charging money for Snes9x or software derived from Snes9x.
;
; The copyright holders request that bug fixes and improvements to the code
; should be forwarded to them so everyone can benefit from the modifications
; in future versions.
;
; Super NES and Super Nintendo Entertainment System are trademarks of
; Nintendo Co., Limited and its subsidiary companies.
;
%include "i386/macros.mac"
%include "i386/fxemu2.mac"
%include "i386/fxemu2b.mac"
%include "i386/fxemu2c.mac"
EXTSYM FXEndLoop,FlushCache,FxOp02,FxTable,FxTableb,FxTablec,FxTabled
EXTSYM NumberOfOpcodes,SfxB,SfxCBR,SfxCFGR,SfxCOLR,SfxCPB,SfxCROM
EXTSYM SfxCacheActive,SfxCarry,SfxLastRamAdr,SfxMemTable,SfxOverflow
EXTSYM SfxPBR,SfxPIPE,SfxPOR,SfxR0,SfxR1,SfxR11,SfxR12,SfxR13,SfxR14
EXTSYM SfxR15,SfxR2,SfxR4,SfxR6,SfxR7,SfxR8,SfxRAMBR,SfxRAMMem,SfxROMBR
EXTSYM SfxRomBuffer,SfxSCBR,SfxSCMR,SfxSFR,SfxSignZero,SfxnRamBanks,flagnz
EXTSYM sfx128lineloc,sfx160lineloc,sfx192lineloc,sfxobjlineloc,sfxramdata
EXTSYM withr15sk,sfxclineloc,SCBRrel
EXTSYM fxbit01pcal,fxbit23pcal,fxbit45pcal,fxbit67pcal

SECTION .text
ALIGN32
NEWSYM FxOpd00      ; STOP   stop GSU execution (and maybe generate an IRQ)     ; Verified.
   FETCHPIPE
   mov [SfxPIPE],cl
   and dword [SfxSFR],0FFFFh-32     ; Clear Go flag (set to 1 when the GSU is running)
   test dword [SfxCFGR],080h        ; Check if the interrupt generation is on
   jnz .NoIRQ
   or dword [SfxSFR],08000h         ; Set IRQ Flag
.NoIRQ
   CLRFLAGS
   inc ebp
   mov dword [NumberOfOpcodes],1
   jmp FXEndLoop
   FXReturn

NEWSYM FxOpd01      ; NOP    no operation       ; Verified.
   FETCHPIPE
   CLRFLAGS
   inc ebp                ; Increase program counter
   FXReturn

NEWSYM FxOpd02      ; CACHE  reintialize GSU cache
   mov eax,ebp
   FETCHPIPE
   sub eax,[SfxCPB]
   and eax,0FFF0h
   cmp dword [SfxCBR],eax
   je .SkipUpdate
   cmp byte [SfxCacheActive],1
   je .SkipUpdate
   mov dword [SfxCBR],eax
   mov dword [SfxCacheActive],1
   call FlushCache
.SkipUpdate
   CLRFLAGS
   inc ebp                ; Increase program counter
   FXReturn

NEWSYM FxOpd03      ; LSR    logic shift right  ; Verified.
   mov eax,[esi]            ; Read Source
   FETCHPIPE
   mov [SfxCarry],al
   and byte[SfxCarry],1
   shr ax,1                      ; logic shift right
   inc ebp                ; Increase program counter
   mov [edi],eax            ; Write Destination
   mov dword [SfxSignZero],eax
   CLRFLAGS
   FXReturn

NEWSYM FxOpd04      ; ROL    rotate left (RCL?) ; V
   shr byte[SfxCarry],1
   mov eax,[esi]            ; Read Source
   FETCHPIPE
   rcl ax,1
   rcl byte[SfxCarry],1
   inc ebp                ; Increase program counter
   mov [edi],eax            ; Write Destination
   mov [SfxSignZero],eax
   CLRFLAGS
   FXReturn

NEWSYM FxOpd05      ; BRA    branch always      ; Verified.
   movsx eax,byte[ebp]
   mov cl,[ebp+1]
   inc ebp
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd06      ; BGE    branch on greater or equals        ; Verified.
   movsx eax,byte[ebp]
   mov ebx,[SfxSignZero]
   shr ebx,15
   inc ebp
   xor bl,[SfxOverflow]
   mov cl,[ebp]
   test bl,01h
   jnz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd07      ; BLT    branch on lesss than       ; Verified.
   movsx eax,byte[ebp]
   mov ebx,[SfxSignZero]
   shr ebx,15
   inc ebp
   xor bl,[SfxOverflow]
   mov cl,[ebp]
   test bl,01h
   jz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd08      ; BNE    branch on not equal        ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test dword[SfxSignZero],0FFFFh
   mov cl,[ebp]
   jz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd09      ; BEQ    branch on equal (z=1)      ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test dword[SfxSignZero],0FFFFh
   mov cl,[ebp]
   jnz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0A      ; BPL    branch on plus     ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test dword[SfxSignZero],088000h
   mov cl,[ebp]
   jnz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0B      ; BMI    branch on minus    ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test dword[SfxSignZero],088000h
   mov cl,[ebp]
   jz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0C      ; BCC    branch on carry clear      ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test byte[SfxCarry],01h
   mov cl,[ebp]
   jnz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0D      ; BCS    branch on carry set        ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test byte[SfxCarry],01h
   mov cl,[ebp]
   jz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0E      ; BVC    branch on overflow clear   ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test byte[SfxOverflow],01h
   mov cl,[ebp]
   jnz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd0F      ; BVS    branch on overflow set     ; Verified.
   movsx eax,byte[ebp]
   inc ebp
   test byte[SfxOverflow],01h
   mov cl,[ebp]
   jz .nojump
   add ebp,eax
   call [FxTable+ecx*4]
   FXReturn2
.nojump
   inc ebp
   call [FxTable+ecx*4]
   FXReturn2

NEWSYM FxOpd10      ; TO RN  set register n as destination register
   TORNd 0
NEWSYM FxOpd11      ; TO RN  set register n as destination register
   TORNd 1   
NEWSYM FxOpd12      ; TO RN  set register n as destination register
   TORNd 2   
NEWSYM FxOpd13      ; TO RN  set register n as destination register
   TORNd 3   
NEWSYM FxOpd14      ; TO RN  set register n as destination register
   TORNd 4   
NEWSYM FxOpd15      ; TO RN  set register n as destination register
   TORNd 5   
NEWSYM FxOpd16      ; TO RN  set register n as destination register
   TORNd 6   
NEWSYM FxOpd17      ; TO RN  set register n as destination register
   TORNd 7   
NEWSYM FxOpd18      ; TO RN  set register n as destination register
   TORNd 8   
NEWSYM FxOpd19      ; TO RN  set register n as destination register
   TORNd 9   
NEWSYM FxOpd1A      ; TO RN  set register n as destination register
   TORNd 10   
NEWSYM FxOpd1B      ; TO RN  set register n as destination register
   TORNd 11   
NEWSYM FxOpd1C      ; TO RN  set register n as destination register
   TORNd 12   
NEWSYM FxOpd1D      ; TO RN  set register n as destination register
   TORNd 13
NEWSYM FxOpd1E      ; TO RN  set register n as destination register
   FETCHPIPE
   mov edi,SfxR0+14*4
   inc ebp
   call [FxTable+ecx*4]
   mov edi,SfxR0
   UpdateR14
   FXReturn
NEWSYM FxOpd1F      ; TO RN  set register n as destination register
   FETCHPIPE
   mov edi,SfxR0+15*4
   inc ebp
   call [FxTable+ecx*4]
   mov ebp,[SfxCPB]
   add ebp,[SfxR15]
   mov edi,SfxR0
   FXReturn

NEWSYM FxOpd20      ; WITH  set register n as source and destination register
   WITHc 0
NEWSYM FxOpd21      ; WITH  set register n as source and destination register
   WITHc 1
NEWSYM FxOpd22      ; WITH  set register n as source and destination register
   WITHc 2
NEWSYM FxOpd23      ; WITH  set register n as source and destination register
   WITHc 3
NEWSYM FxOpd24      ; WITH  set register n as source and destination register
   WITHc 4
NEWSYM FxOpd25      ; WITH  set register n as source and destination register
   WITHc 5
NEWSYM FxOpd26      ; WITH  set register n as source and destination register
   WITHc 6
NEWSYM FxOpd27      ; WITH  set register n as source and destination register
   WITHc 7
NEWSYM FxOpd28      ; WITH  set register n as source and destination register
   WITHc 8
NEWSYM FxOpd29      ; WITH  set register n as source and destination register
   WITHc 9
NEWSYM FxOpd2A      ; WITH  set register n as source and destination register
   WITHc 10
NEWSYM FxOpd2B      ; WITH  set register n as source and destination register
   WITHc 11
NEWSYM FxOpd2C      ; WITH  set register n as source and destination register
   WITHc 12
NEWSYM FxOpd2D      ; WITH  set register n as source and destination register
   WITHc 13
NEWSYM FxOpd2E      ; WITH  set register n as source and destination register
   FETCHPIPE
   mov esi,SfxR0+14*4
   mov edi,SfxR0+14*4
   mov dword [SfxB],1
   inc ebp
   call [FxTablec+ecx*4]
   mov dword [SfxB],0         ; Clear B Flag
   mov esi,SfxR0
   mov edi,SfxR0
   UpdateR14
   FXReturn
NEWSYM FxOpd2F      ; WITH  set register n as source and destination register
   FETCHPIPE
   mov esi,SfxR0+15*4
   mov edi,SfxR0+15*4
   mov dword [SfxB],1
   inc ebp
   mov eax,ebp
   sub eax,[SfxCPB]
   mov dword[withr15sk],0
   mov [SfxR15],eax
   call [FxTableb+ecx*4]
   cmp dword[withr15sk],1
   je .skip
   mov ebp,[SfxCPB]
   add ebp,[SfxR15]
.skip
   mov dword [SfxB],0         ; Clear B Flag
   mov esi,SfxR0
   mov edi,SfxR0
   FXReturn

NEWSYM FxOpd30      ; STW RN store word
   STWRNc 0
NEWSYM FxOpd31      ; STW RN store word
   STWRNc 1
NEWSYM FxOpd32      ; STW RN store word
   STWRNc 2
NEWSYM FxOpd33      ; STW RN store word
   STWRNc 3
NEWSYM FxOpd34      ; STW RN store word
   STWRNc 4
NEWSYM FxOpd35      ; STW RN store word
   STWRNc 5
NEWSYM FxOpd36      ; STW RN store word
   STWRNc 6
NEWSYM FxOpd37      ; STW RN store word
   STWRNc 7
NEWSYM FxOpd38      ; STW RN store word
   STWRNc 8
NEWSYM FxOpd39      ; STW RN store word
   STWRNc 9
NEWSYM FxOpd3A      ; STW RN store word
   STWRNc 10
NEWSYM FxOpd3B      ; STW RN store word
   STWRNc 11

NEWSYM FxOpd30A1    ; STB RN store byte
   STBRNc 0
NEWSYM FxOpd31A1    ; STB RN store byte
   STBRNc 1
NEWSYM FxOpd32A1    ; STB RN store byte
   STBRNc 2
NEWSYM FxOpd33A1    ; STB RN store byte
   STBRNc 3
NEWSYM FxOpd34A1    ; STB RN store byte
   STBRNc 4
NEWSYM FxOpd35A1    ; STB RN store byte
   STBRNc 5
NEWSYM FxOpd36A1    ; STB RN store byte
   STBRNc 6
NEWSYM FxOpd37A1    ; STB RN store byte
   STBRNc 7
NEWSYM FxOpd38A1    ; STB RN store byte
   STBRNc 8
NEWSYM FxOpd39A1    ; STB RN store byte
   STBRNc 9
NEWSYM FxOpd3AA1    ; STB RN store byte
   STBRNc 10
NEWSYM FxOpd3BA1    ; STB RN store byte
   STBRNc 11

NEWSYM FxOpd3C      ; LOOP   decrement loop counter, and branch on not zero ; V
   dec word [SfxR12]       ; decrement loop counter
   FETCHPIPE
   mov eax,[SfxR12]
   mov [SfxSignZero],eax
   or eax,eax
   jz .NoBranch
   mov eax,dword [SfxR13]
   mov ebp,[SfxCPB]
   add ebp,eax
   CLRFLAGS
   FXReturn
.NoBranch
   inc ebp
   CLRFLAGS
   FXReturn

NEWSYM FxOpd3D      ; ALT1   set alt1 mode      ; Verified.
   FETCHPIPE
   mov dword [SfxB],0
   or ch,01h
   inc ebp
   call [FxTable+ecx*4]
   xor ch,ch
   FXReturn

NEWSYM FxOpd3E      ; ALT2   set alt1 mode      ; Verified.
   FETCHPIPE
   mov dword [SfxB],0
   or ch,02h
   inc ebp
   call [FxTable+ecx*4]
   xor ch,ch
   FXReturn

NEWSYM FxOpd3F      ; ALT3   set alt3 mode      ; Verified.
   FETCHPIPE
   mov dword [SfxB],0
   or ch,03h
   inc ebp
   call [FxTable+ecx*4]
   xor ch,ch
   FXReturn

NEWSYM FxOpd40      ; LDW RN load word from RAM
   LDWRNc 0
NEWSYM FxOpd41      ; LDW RN load word from RAM
   LDWRNc 1
NEWSYM FxOpd42      ; LDW RN load word from RAM
   LDWRNc 2
NEWSYM FxOpd43      ; LDW RN load word from RAM
   LDWRNc 3
NEWSYM FxOpd44      ; LDW RN load word from RAM
   LDWRNc 4
NEWSYM FxOpd45      ; LDW RN load word from RAM
   LDWRNc 5
NEWSYM FxOpd46      ; LDW RN load word from RAM
   LDWRNc 6
NEWSYM FxOpd47      ; LDW RN load word from RAM
   LDWRNc 7