cpuops.cpp

著名SFC模拟器Snes9x的源代码。

#ifdef FAST_LSB_WORD_ACCESS    
    Int32 = (long) Registers.X.W - (long) *(uint16 *) CPU.PC;
#else
    Int32 = (long) Registers.X.W -
	    (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
    ICPU._Carry = Int32 >= 0;
    SetZN16 ((uint16) Int32);
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
}

static void OpE4X1 (void)
{
    Direct ();
    CMX8 ();
}

static void OpE4X0 (void)
{
    Direct ();
    CMX16 ();
}

static void OpECX1 (void)
{
    Absolute ();
    CMX8 ();
}

static void OpECX0 (void)
{
    Absolute ();
    CMX16 ();
}

/**********************************************************************************************/

/* CMY *************************************************************************************** */
static void OpC0X1 (void)
{
    Int32 = (int) Registers.YL - (int) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
    SetZN8 ((uint8) Int32);
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void OpC0X0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS    
    Int32 = (long) Registers.Y.W - (long) *(uint16 *) CPU.PC;
#else
    Int32 = (long) Registers.Y.W -
	    (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
    ICPU._Carry = Int32 >= 0;
    SetZN16 ((uint16) Int32);
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
}

static void OpC4X1 (void)
{
    Direct ();
    CMY8 ();
}

static void OpC4X0 (void)
{
    Direct ();
    CMY16 ();
}

static void OpCCX1 (void)
{
    Absolute ();
    CMY8 ();
}

static void OpCCX0 (void)
{
    Absolute ();
    CMY16 ();
}

/**********************************************************************************************/

/* DEC *************************************************************************************** */
static void Op3AM1 (void)
{
    A_DEC8 ();
}

static void Op3AM0 (void)
{
    A_DEC16 ();
}

static void OpC6M1 (void)
{
    Direct ();
    DEC8 ();
}

static void OpC6M0 (void)
{
    Direct ();
    DEC16 ();
}

static void OpD6M1 (void)
{
    DirectIndexedX ();
    DEC8 ();
}

static void OpD6M0 (void)
{
    DirectIndexedX ();
    DEC16 ();
}

static void OpCEM1 (void)
{
    Absolute ();
    DEC8 ();
}

static void OpCEM0 (void)
{
    Absolute ();
    DEC16 ();
}

static void OpDEM1 (void)
{
    AbsoluteIndexedX ();
    DEC8 ();
}

static void OpDEM0 (void)
{
    AbsoluteIndexedX ();
    DEC16 ();
}

/**********************************************************************************************/

/* EOR *************************************************************************************** */
static void Op49M1 (void)
{
    Registers.AL ^= *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.AL);
}

static void Op49M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.A.W ^= *(uint16 *) CPU.PC;
#else
    Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.A.W);
}

static void Op45M1 (void)
{
    Direct ();
    EOR8 ();
}

static void Op45M0 (void)
{
    Direct ();
    EOR16 ();
}

static void Op55M1 (void)
{
    DirectIndexedX ();
    EOR8 ();
}

static void Op55M0 (void)
{
    DirectIndexedX ();
    EOR16 ();
}

static void Op52M1 (void)
{
    DirectIndirect ();
    EOR8 ();
}

static void Op52M0 (void)
{
    DirectIndirect ();
    EOR16 ();
}

static void Op41M1 (void)
{
    DirectIndexedIndirect ();
    EOR8 ();
}

static void Op41M0 (void)
{
    DirectIndexedIndirect ();
    EOR16 ();
}

static void Op51M1 (void)
{
    DirectIndirectIndexed ();
    EOR8 ();
}

static void Op51M0 (void)
{
    DirectIndirectIndexed ();
    EOR16 ();
}

static void Op47M1 (void)
{
    DirectIndirectLong ();
    EOR8 ();
}

static void Op47M0 (void)
{
    DirectIndirectLong ();
    EOR16 ();
}

static void Op57M1 (void)
{
    DirectIndirectIndexedLong ();
    EOR8 ();
}

static void Op57M0 (void)
{
    DirectIndirectIndexedLong ();
    EOR16 ();
}

static void Op4DM1 (void)
{
    Absolute ();
    EOR8 ();
}

static void Op4DM0 (void)
{
    Absolute ();
    EOR16 ();
}

static void Op5DM1 (void)
{
    AbsoluteIndexedX ();
    EOR8 ();
}

static void Op5DM0 (void)
{
    AbsoluteIndexedX ();
    EOR16 ();
}

static void Op59M1 (void)
{
    AbsoluteIndexedY ();
    EOR8 ();
}

static void Op59M0 (void)
{
    AbsoluteIndexedY ();
    EOR16 ();
}

static void Op4FM1 (void)
{
    AbsoluteLong ();
    EOR8 ();
}

static void Op4FM0 (void)
{
    AbsoluteLong ();
    EOR16 ();
}

static void Op5FM1 (void)
{
    AbsoluteLongIndexedX ();
    EOR8 ();
}

static void Op5FM0 (void)
{
    AbsoluteLongIndexedX ();
    EOR16 ();
}

static void Op43M1 (void)
{
    StackRelative ();
    EOR8 ();
}

static void Op43M0 (void)
{
    StackRelative ();
    EOR16 ();
}

static void Op53M1 (void)
{
    StackRelativeIndirectIndexed ();
    EOR8 ();
}

static void Op53M0 (void)
{
    StackRelativeIndirectIndexed ();
    EOR16 ();
}

/**********************************************************************************************/

/* INC *************************************************************************************** */
static void Op1AM1 (void)
{
    A_INC8 ();
}

static void Op1AM0 (void)
{
    A_INC16 ();
}

static void OpE6M1 (void)
{
    Direct ();
    INC8 ();
}

static void OpE6M0 (void)
{
    Direct ();
    INC16 ();
}

static void OpF6M1 (void)
{
    DirectIndexedX ();
    INC8 ();
}

static void OpF6M0 (void)
{
    DirectIndexedX ();
    INC16 ();
}

static void OpEEM1 (void)
{
    Absolute ();
    INC8 ();
}

static void OpEEM0 (void)
{
    Absolute ();
    INC16 ();
}

static void OpFEM1 (void)
{
    AbsoluteIndexedX ();
    INC8 ();
}

static void OpFEM0 (void)
{
    AbsoluteIndexedX ();
    INC16 ();
}

/**********************************************************************************************/
/* LDA *************************************************************************************** */
static void OpA9M1 (void)
{
    Registers.AL = *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.AL);
}

static void OpA9M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.A.W = *(uint16 *) CPU.PC;
#else
    Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif

    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.A.W);
}

static void OpA5M1 (void)
{
    Direct ();
    LDA8 ();
}

static void OpA5M0 (void)
{
    Direct ();
    LDA16 ();
}

static void OpB5M1 (void)
{
    DirectIndexedX ();
    LDA8 ();
}

static void OpB5M0 (void)
{
    DirectIndexedX ();
    LDA16 ();
}

static void OpB2M1 (void)
{
    DirectIndirect ();
    LDA8 ();
}

static void OpB2M0 (void)
{
    DirectIndirect ();
    LDA16 ();
}

static void OpA1M1 (void)
{
    DirectIndexedIndirect ();
    LDA8 ();
}

static void OpA1M0 (void)
{
    DirectIndexedIndirect ();
    LDA16 ();
}

static void OpB1M1 (void)
{
    DirectIndirectIndexed ();
    LDA8 ();
}

static void OpB1M0 (void)
{
    DirectIndirectIndexed ();
    LDA16 ();
}

static void OpA7M1 (void)
{
    DirectIndirectLong ();
    LDA8 ();
}

static void OpA7M0 (void)
{
    DirectIndirectLong ();
    LDA16 ();
}

static void OpB7M1 (void)
{
    DirectIndirectIndexedLong ();
    LDA8 ();
}

static void OpB7M0 (void)
{
    DirectIndirectIndexedLong ();
    LDA16 ();
}

static void OpADM1 (void)
{
    Absolute ();
    LDA8 ();
}

static void OpADM0 (void)
{
    Absolute ();
    LDA16 ();
}

static void OpBDM1 (void)
{
    AbsoluteIndexedX ();
    LDA8 ();
}

static void OpBDM0 (void)
{
    AbsoluteIndexedX ();
    LDA16 ();
}

static void OpB9M1 (void)
{
    AbsoluteIndexedY ();
    LDA8 ();
}

static void OpB9M0 (void)
{
    AbsoluteIndexedY ();
    LDA16 ();
}

static void OpAFM1 (void)
{
    AbsoluteLong ();
    LDA8 ();
}

static void OpAFM0 (void)
{
    AbsoluteLong ();
    LDA16 ();
}

static void OpBFM1 (void)
{
    AbsoluteLongIndexedX ();
    LDA8 ();
}

static void OpBFM0 (void)
{
    AbsoluteLongIndexedX ();
    LDA16 ();
}

static void OpA3M1 (void)
{
    StackRelative ();
    LDA8 ();
}

static void OpA3M0 (void)
{
    StackRelative ();
    LDA16 ();
}

static void OpB3M1 (void)
{
    StackRelativeIndirectIndexed ();
    LDA8 ();
}

static void OpB3M0 (void)
{
    StackRelativeIndirectIndexed ();
    LDA16 ();
}

/**********************************************************************************************/

/* LDX *************************************************************************************** */
static void OpA2X1 (void)
{
    Registers.XL = *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.XL);
}

static void OpA2X0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.X.W = *(uint16 *) CPU.PC;
#else
    Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.X.W);
}

static void OpA6X1 (void)
{
    Direct ();
    LDX8 ();
}

static void OpA6X0 (void)
{
    Direct ();
    LDX16 ();
}

static void OpB6X1 (void)
{
    DirectIndexedY ();
    LDX8 ();
}

static void OpB6X0 (void)
{
    DirectIndexedY ();
    LDX16 ();
}

static void OpAEX1 (void)
{
    Absolute ();
    LDX8 ();
}

static void OpAEX0 (void)
{
    Absolute ();
    LDX16 ();
}

static void OpBEX1 (void)
{
    AbsoluteIndexedY ();
    LDX8 ();
}

static void OpBEX0 (void)
{
    AbsoluteIndexedY ();
    LDX16 ();
}
/**********************************************************************************************/

/* LDY *************************************************************************************** */
static void OpA0X1 (void)
{
    Registers.YL = *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.YL);
}

static void OpA0X0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.Y.W = *(uint16 *) CPU.PC;
#else
    Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif

    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.Y.W);
}

static void OpA4X1 (void)
{
    Direct ();
    LDY8 ();
}

static void OpA4X0 (void)
{
    Direct ();
    LDY16 ();
}

static void OpB4X1 (void)
{
    DirectIndexedX ();
    LDY8 ();
}

static void OpB4X0 (void)
{
    DirectIndexedX ();
    LDY16 ();
}

static void OpACX1 (void)
{
    Absolute ();
    LDY8 ();
}

static void OpACX0 (void)
{
    Absolute ();
    LDY16 ();
}

static void OpBCX1 (void)
{
    AbsoluteIndexedX ();
    LDY8 ();
}

static void OpBCX0 (void)
{
    AbsoluteIndexedX ();
    LDY16 ();
}
/**********************************************************************************************/

/* LSR *************************************************************************************** */
static void Op4AM1 (void)
{
    A_LSR8 ();
}

static void Op4AM0 (void)
{
    A_LSR16 ();
}

static void Op46M1 (void)
{
    Direct ();
    LSR8 ();
}

static void Op46M0 (void)
{
    Direct ();
    LSR16 ();
}

static void Op56M1 (void)
{
    DirectIndexedX ();
    LSR8 ();
}

static void Op56M0 (void)
{
    DirectIndexedX ();
    LSR16 ();
}

static void Op4EM1 (void)
{
    Absolute ();