cpuops.cpp

著名SFC模拟器Snes9x的源代码。

/*
 * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
 *
 * (c) Copyright 1996 - 2001 Gary Henderson ([e-mail]) and
 *                           Jerremy Koot ([e-mail])
 *
 * Super FX C emulator code 
 * (c) Copyright 1997 - 1999 Ivar ([e-mail]) and
 *                           Gary Henderson.
 * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
 *
 * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson.
 * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
 * C4 C code (c) Copyright 2001 Gary Henderson ([e-mail]).
 *
 * DOS port code contains the works of other authors. See headers in
 * individual files.
 *
 * Snes9x homepage: www.snes9x.com
 *
 * Permission to use, copy, modify and distribute Snes9x in both binary and
 * source form, for non-commercial purposes, is hereby granted without fee,
 * providing that this license information and copyright notice appear with
 * all copies and any derived work.
 *
 * This software is provided 'as-is', without any express or implied
 * warranty. In no event shall the authors be held liable for any damages
 * arising from the use of this software.
 *
 * Snes9x is freeware for PERSONAL USE only. Commercial users should
 * seek permission of the copyright holders first. Commercial use includes
 * charging money for Snes9x or software derived from Snes9x.
 *
 * The copyright holders request that bug fixes and improvements to the code
 * should be forwarded to them so everyone can benefit from the modifications
 * in future versions.
 *
 * Super NES and Super Nintendo Entertainment System are trademarks of
 * Nintendo Co., Limited and its subsidiary companies.
 */
/**********************************************************************************************/
/* CPU-S9xOpcodes.CPP                                                                            */
/* This file contains all the opcodes                                                         */
/**********************************************************************************************/

#include "snes9x.h"
#include "memmap.h"
#include "debug.h"
#include "missing.h"
#include "apu.h"
#include "sa1.h"

START_EXTERN_C
extern uint8 A1, A2, A3, A4, W1, W2, W3, W4;
extern uint8 Ans8;
extern uint16 Ans16;
extern uint32 Ans32;
extern uint8 Work8;
extern uint16 Work16;
extern uint32 Work32;
extern signed char Int8;
extern short Int16;
extern long Int32;
END_EXTERN_C

#include "cpuexec.h"
#include "cpuaddr.h"
#include "cpuops.h"
#include "cpumacro.h"
#include "apu.h"

/* ADC *************************************************************************************** */
static void Op69M1 (void)
{
    Immediate8 ();
    ADC8 ();
}

static void Op69M0 (void)
{
    Immediate16 ();
    ADC16 ();
}

static void Op65M1 (void)
{
    Direct ();
    ADC8 ();
}

static void Op65M0 (void)
{
    Direct ();
    ADC16 ();
}

static void Op75M1 (void)
{
    DirectIndexedX ();
    ADC8 ();
}

static void Op75M0 (void)
{
    DirectIndexedX ();
    ADC16 ();
}

static void Op72M1 (void)
{
    DirectIndirect ();
    ADC8 ();
}

static void Op72M0 (void)
{
    DirectIndirect ();
    ADC16 ();
}

static void Op61M1 (void)
{
    DirectIndexedIndirect ();
    ADC8 ();
}

static void Op61M0 (void)
{
    DirectIndexedIndirect ();
    ADC16 ();
}

static void Op71M1 (void)
{
    DirectIndirectIndexed ();
    ADC8 ();
}

static void Op71M0 (void)
{
    DirectIndirectIndexed ();
    ADC16 ();
}

static void Op67M1 (void)
{
    DirectIndirectLong ();
    ADC8 ();
}

static void Op67M0 (void)
{
    DirectIndirectLong ();
    ADC16 ();
}

static void Op77M1 (void)
{
    DirectIndirectIndexedLong ();
    ADC8 ();
}

static void Op77M0 (void)
{
    DirectIndirectIndexedLong ();
    ADC16 ();
}

static void Op6DM1 (void)
{
    Absolute ();
    ADC8 ();
}

static void Op6DM0 (void)
{
    Absolute ();
    ADC16 ();
}

static void Op7DM1 (void)
{
    AbsoluteIndexedX ();
    ADC8 ();
}

static void Op7DM0 (void)
{
    AbsoluteIndexedX ();
    ADC16 ();
}

static void Op79M1 (void)
{
    AbsoluteIndexedY ();
    ADC8 ();
}

static void Op79M0 (void)
{
    AbsoluteIndexedY ();
    ADC16 ();
}

static void Op6FM1 (void)
{
    AbsoluteLong ();
    ADC8 ();
}

static void Op6FM0 (void)
{
    AbsoluteLong ();
    ADC16 ();
}

static void Op7FM1 (void)
{
    AbsoluteLongIndexedX ();
    ADC8 ();
}

static void Op7FM0 (void)
{
    AbsoluteLongIndexedX ();
    ADC16 ();
}

static void Op63M1 (void)
{
    StackRelative ();
    ADC8 ();
}

static void Op63M0 (void)
{
    StackRelative ();
    ADC16 ();
}

static void Op73M1 (void)
{
    StackRelativeIndirectIndexed ();
    ADC8 ();
}

static void Op73M0 (void)
{
    StackRelativeIndirectIndexed ();
    ADC16 ();
}

/**********************************************************************************************/

/* AND *************************************************************************************** */
static void Op29M1 (void)
{
    Registers.AL &= *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.AL);
}

static void Op29M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.A.W &= *(uint16 *) CPU.PC;
#else
    Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.A.W);
}

static void Op25M1 (void)
{
    Direct ();
    AND8 ();
}

static void Op25M0 (void)
{
    Direct ();
    AND16 ();
}

static void Op35M1 (void)
{
    DirectIndexedX ();
    AND8 ();
}

static void Op35M0 (void)
{
    DirectIndexedX ();
    AND16 ();
}

static void Op32M1 (void)
{
    DirectIndirect ();
    AND8 ();
}

static void Op32M0 (void)
{
    DirectIndirect ();
    AND16 ();
}

static void Op21M1 (void)
{
    DirectIndexedIndirect ();
    AND8 ();
}

static void Op21M0 (void)
{
    DirectIndexedIndirect ();
    AND16 ();
}

static void Op31M1 (void)
{
    DirectIndirectIndexed ();
    AND8 ();
}

static void Op31M0 (void)
{
    DirectIndirectIndexed ();
    AND16 ();
}

static void Op27M1 (void)
{
    DirectIndirectLong ();
    AND8 ();
}

static void Op27M0 (void)
{
    DirectIndirectLong ();
    AND16 ();
}

static void Op37M1 (void)
{
    DirectIndirectIndexedLong ();
    AND8 ();
}

static void Op37M0 (void)
{
    DirectIndirectIndexedLong ();
    AND16 ();
}

static void Op2DM1 (void)
{
    Absolute ();
    AND8 ();
}

static void Op2DM0 (void)
{
    Absolute ();
    AND16 ();
}

static void Op3DM1 (void)
{
    AbsoluteIndexedX ();
    AND8 ();
}

static void Op3DM0 (void)
{
    AbsoluteIndexedX ();
    AND16 ();
}

static void Op39M1 (void)
{
    AbsoluteIndexedY ();
    AND8 ();
}

static void Op39M0 (void)
{
    AbsoluteIndexedY ();
    AND16 ();
}

static void Op2FM1 (void)
{
    AbsoluteLong ();
    AND8 ();
}

static void Op2FM0 (void)
{
    AbsoluteLong ();
    AND16 ();
}

static void Op3FM1 (void)
{
    AbsoluteLongIndexedX ();
    AND8 ();
}

static void Op3FM0 (void)
{
    AbsoluteLongIndexedX ();
    AND16 ();
}

static void Op23M1 (void)
{
    StackRelative ();
    AND8 ();
}

static void Op23M0 (void)
{
    StackRelative ();
    AND16 ();
}

static void Op33M1 (void)
{
    StackRelativeIndirectIndexed ();
    AND8 ();
}

static void Op33M0 (void)
{
    StackRelativeIndirectIndexed ();
    AND16 ();
}
/**********************************************************************************************/

/* ASL *************************************************************************************** */
static void Op0AM1 (void)
{
    A_ASL8 ();
}

static void Op0AM0 (void)
{
    A_ASL16 ();
}

static void Op06M1 (void)
{
    Direct ();
    ASL8 ();
}

static void Op06M0 (void)
{
    Direct ();
    ASL16 ();
}

static void Op16M1 (void)
{
    DirectIndexedX ();
    ASL8 ();
}

static void Op16M0 (void)
{
    DirectIndexedX ();
    ASL16 ();
}

static void Op0EM1 (void)
{
    Absolute ();
    ASL8 ();
}

static void Op0EM0 (void)
{
    Absolute ();
    ASL16 ();
}

static void Op1EM1 (void)
{
    AbsoluteIndexedX ();
    ASL8 ();
}

static void Op1EM0 (void)
{
    AbsoluteIndexedX ();
    ASL16 ();
}
/**********************************************************************************************/

/* BIT *************************************************************************************** */
static void Op89M1 (void)
{
    ICPU._Zero = Registers.AL & *CPU.PC++;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void Op89M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0;
#else
    ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
#endif	
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    CPU.PC += 2;
}

static void Op24M1 (void)
{
    Direct ();
    BIT8 ();
}

static void Op24M0 (void)
{
    Direct ();
    BIT16 ();
}

static void Op34M1 (void)
{
    DirectIndexedX ();
    BIT8 ();
}

static void Op34M0 (void)
{
    DirectIndexedX ();
    BIT16 ();
}

static void Op2CM1 (void)
{
    Absolute ();
    BIT8 ();
}

static void Op2CM0 (void)
{
    Absolute ();
    BIT16 ();
}

static void Op3CM1 (void)
{
    AbsoluteIndexedX ();
    BIT8 ();
}

static void Op3CM0 (void)
{
    AbsoluteIndexedX ();
    BIT16 ();
}
/**********************************************************************************************/

/* CMP *************************************************************************************** */
static void OpC9M1 (void)
{
    Int32 = (int) Registers.AL - (int) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
    SetZN8 ((uint8) Int32);
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void OpC9M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS    
    Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC;
#else
    Int32 = (long) Registers.A.W -
	    (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
    ICPU._Carry = Int32 >= 0;
    SetZN16 ((uint16) Int32);
    CPU.PC += 2;
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
}

static void OpC5M1 (void)
{
    Direct ();
    CMP8 ();
}

static void OpC5M0 (void)
{
    Direct ();
    CMP16 ();
}

static void OpD5M1 (void)
{
    DirectIndexedX ();
    CMP8 ();
}

static void OpD5M0 (void)
{
    DirectIndexedX ();
    CMP16 ();
}

static void OpD2M1 (void)
{
    DirectIndirect ();
    CMP8 ();
}

static void OpD2M0 (void)
{
    DirectIndirect ();
    CMP16 ();
}

static void OpC1M1 (void)
{
    DirectIndexedIndirect ();
    CMP8 ();
}

static void OpC1M0 (void)
{
    DirectIndexedIndirect ();
    CMP16 ();
}

static void OpD1M1 (void)
{
    DirectIndirectIndexed ();
    CMP8 ();
}

static void OpD1M0 (void)
{
    DirectIndirectIndexed ();
    CMP16 ();
}

static void OpC7M1 (void)
{
    DirectIndirectLong ();
    CMP8 ();
}

static void OpC7M0 (void)
{
    DirectIndirectLong ();
    CMP16 ();
}

static void OpD7M1 (void)
{
    DirectIndirectIndexedLong ();
    CMP8 ();
}

static void OpD7M0 (void)
{
    DirectIndirectIndexedLong ();
    CMP16 ();
}

static void OpCDM1 (void)
{
    Absolute ();
    CMP8 ();
}

static void OpCDM0 (void)
{
    Absolute ();
    CMP16 ();
}

static void OpDDM1 (void)
{
    AbsoluteIndexedX ();
    CMP8 ();
}

static void OpDDM0 (void)
{
    AbsoluteIndexedX ();
    CMP16 ();
}

static void OpD9M1 (void)
{
    AbsoluteIndexedY ();
    CMP8 ();
}

static void OpD9M0 (void)
{
    AbsoluteIndexedY ();
    CMP16 ();
}

static void OpCFM1 (void)
{
    AbsoluteLong ();
    CMP8 ();
}

static void OpCFM0 (void)
{
    AbsoluteLong ();
    CMP16 ();
}

static void OpDFM1 (void)
{
    AbsoluteLongIndexedX ();
    CMP8 ();
}

static void OpDFM0 (void)
{
    AbsoluteLongIndexedX ();
    CMP16 ();
}

static void OpC3M1 (void)
{
    StackRelative ();
    CMP8 ();
}

static void OpC3M0 (void)
{
    StackRelative ();
    CMP16 ();
}

static void OpD3M1 (void)
{
    StackRelativeIndirectIndexed ();
    CMP8 ();
}

static void OpD3M0 (void)
{
    StackRelativeIndirectIndexed ();
    CMP16 ();
}

/**********************************************************************************************/

/* CMX *************************************************************************************** */
static void OpE0X1 (void)
{
    Int32 = (int) Registers.XL - (int) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
    SetZN8 ((uint8) Int32);
#ifdef VAR_CYCLES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void OpE0X0 (void)
{