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📁 motor_control.zip
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123 

	RSEG  ?PR?_delay_s?BASE
L?0092:
	USING	0
	SETB 	SPOKER
	MOV  	R7,#01H
	LCALL	_delay_s
	CLR  	SPOKER
	MOV  	R7,#01H
_delay_s:
	USING	0
			; SOURCE LINE # 106
;---- Variable 'n?646' assigned to Register 'R1' ----
	XCH  	A,R1
	MOV  	A,R7
	XCH  	A,R1
; {	unsigned char i,j;
			; SOURCE LINE # 107
;   	for(i=0;i<200;i++)
			; SOURCE LINE # 108
;---- Variable 'i?647' assigned to Register 'R5' ----
	CLR  	A
	MOV  	R5,A
?C0015:
; 		for(j=0;j<25*n;j++)
			; SOURCE LINE # 109
;---- Variable 'j?648' assigned to Register 'R4' ----
	CLR  	A
	MOV  	R4,A
?C0018:
	MOV  	A,R1
	MOV  	B,#019H
	MUL  	AB
	MOV  	R7,A
	MOV  	A,R4
	CLR  	C
	SUBB 	A,R7
	MOV  	A,B
	XRL  	A,#080H
	MOV  	R0,A
	MOV  	A,#080H
	SUBB 	A,R0
	JC   	$ + 5H
	LJMP 	?C0017
; 		{
			; SOURCE LINE # 110
; 		 	DELAY_10US;
			; SOURCE LINE # 111
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; 			DELAY_10US;
			; SOURCE LINE # 112
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; 			DELAY_10US;
			; SOURCE LINE # 113
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; 			DELAY_10US;
			; SOURCE LINE # 114
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; 			DELAY_10US;
			; SOURCE LINE # 115
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; 			DELAY_10US;
			; SOURCE LINE # 116
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; 			DELAY_10US;
			; SOURCE LINE # 117
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; 			DELAY_10US;
			; SOURCE LINE # 118
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; 			DELAY_10US;
			; SOURCE LINE # 119
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; 			DELAY_10US;	//100us
			; SOURCE LINE # 120
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; 		} 
			; SOURCE LINE # 121
	INC  	R4
	LJMP 	?C0018
?C0017:
	INC  	R5
	MOV  	A,R5
	XRL  	A,#0C8H
	JZ   	$ + 5H
	LJMP 	?C0015
; 	
; 
; }
			; SOURCE LINE # 124
?C0021:
	RET  	
; END OF _delay_s

; void judgement (uchar modi,uchar modi1,uchar dem)

	RSEG  ?PR?_judgement?BASE
L?0093:
	USING	0
	MOV  	R3,#014H
	MOV  	R5,#014H
	MOV  	R7,#05AH
_judgement:
	USING	0
			; SOURCE LINE # 125
	MOV  	modi?749,R7
	MOV  	modi1?750,R5
	MOV  	dem?751,R3
; {			  uchar i;
			; SOURCE LINE # 126
; 	if((a&&bb==0&&c==0)||(a&&bb&&c==0))
			; SOURCE LINE # 127
	MOV  	A,a?
	JZ   	?C0024
	MOV  	A,bb
	JNZ  	?C0024
	MOV  	A,c?
	JZ   	?C0023
?C0024:
	MOV  	A,a?
	JZ   	?C0022
	MOV  	A,bb
	JZ   	?C0022
	MOV  	A,c?
	JNZ  	?C0022
?C0023:
; 	{	left=1;
			; SOURCE LINE # 128
	MOV  	left,#01H
; 		right=0;
			; SOURCE LINE # 129
	CLR  	A
	MOV  	right,A
; 		speedchange(modi1,1);
			; SOURCE LINE # 130
	MOV  	R5,#01H
	MOV  	R7,modi1?750
	LCALL	_speedchange
; 		speedchange(modi,0);
			; SOURCE LINE # 131
	CLR  	A
	MOV  	R5,A
; 		delayms(dem);
			; SOURCE LINE # 132
; 	}
			; SOURCE LINE # 133
	SJMP 	?C0086
?C0022:
; 	else if((a==0&&bb==0&&c)||(a==0&&bb&&c))
			; SOURCE LINE # 134
	MOV  	A,a?
	JNZ  	?C0028
	MOV  	A,bb
	JNZ  	?C0028
	MOV  	A,c?
	JNZ  	?C0027
?C0028:
	MOV  	A,a?
	JNZ  	?C0026
	MOV  	A,bb
	JZ   	?C0026
	MOV  	A,c?
	JZ   	?C0026
?C0027:
; 	{
			; SOURCE LINE # 135
; 		left=0;
			; SOURCE LINE # 136
	CLR  	A
	MOV  	left,A
; 		right=1;	 
			; SOURCE LINE # 137
	MOV  	right,#01H
; 	    speedchange(modi1,0);
			; SOURCE LINE # 138
	MOV  	R5,A
	MOV  	R7,modi1?750
	LCALL	_speedchange
; 		speedchange(modi,1);
			; SOURCE LINE # 139
	MOV  	R5,#01H
?C0085:
; 		delayms(dem);
			; SOURCE LINE # 140
; 	}
			; SOURCE LINE # 141
	SJMP 	?C0086
?C0026:
; 	else if(a==0&&bb&&c==0)
			; SOURCE LINE # 142
	MOV  	A,a?
	JNZ  	?C0030
	MOV  	A,bb
	JZ   	?C0030
	MOV  	A,c?
	JNZ  	?C0030
; 	{   
			; SOURCE LINE # 143
; 		left=0;
			; SOURCE LINE # 144
	MOV  	left,A
; 		right=0;
			; SOURCE LINE # 145
	MOV  	right,A
; 	    speedchange(modi,0);
			; SOURCE LINE # 146
	MOV  	R5,A
	MOV  	R7,modi?749
	LCALL	_speedchange
; 		speedchange(modi,1);
			; SOURCE LINE # 147
	MOV  	R5,#01H
?C0086:
	MOV  	R7,modi?749
	LCALL	_speedchange
; 		delayms(dem);
			; SOURCE LINE # 148
; 	}
			; SOURCE LINE # 149
	SJMP 	?C0087
?C0030:
; 	else if(a&&bb&&c)	 //停止&&(d||e)
			; SOURCE LINE # 150
	MOV  	A,a?
	JZ   	?C0032
	MOV  	A,bb
	JZ   	?C0032
	MOV  	A,c?
	JZ   	?C0032
;   	{
			; SOURCE LINE # 151
;   					
; 		START=0;
			; SOURCE LINE # 153
	CLR  	START
; 		LASTS=0;
			; SOURCE LINE # 154
	CLR  	LASTS
; 		forward=0;
			; SOURCE LINE # 155
	CLR  	A
	MOV  	forward,A
; 		stage_clk_flag=0;//stage_clk_stop();显示平衡后前进的时间
			; SOURCE LINE # 156
	MOV  	stage_clk_flag,A
; 		CH452_Write(CH452_TWINKLE | 0x30);
			; SOURCE LINE # 157
	MOV  	R7,#030H
	MOV  	R6,#06H
	LCALL	_CH452_Write
; 		for(i=5;i>0;i--)
			; SOURCE LINE # 158
	MOV  	i?752,#05H
?C0033:
; 	    {	
			; SOURCE LINE # 159
; 			CH452_Write(CH452_DIG7 | i);
			; SOURCE LINE # 160
	MOV  	R7,i?752
	MOV  	A,#0FH
	MOV  	R6,A
	LCALL	_CH452_Write
; 			SPOKER=1;
			; SOURCE LINE # 161
; 			delay_s(1);
			; SOURCE LINE # 162
; 			SPOKER=0;
			; SOURCE LINE # 163
; 			delay_s(1);
			; SOURCE LINE # 164
	LCALL	L?0092
; 		}
			; SOURCE LINE # 165
	DEC  	i?752
	MOV  	A,i?752
	SETB 	C
	SUBB 	A,#00H
	JNC  	?C0033
?C0034:
; 		CH452_Write(CH452_DIG7);
			; SOURCE LINE # 166
	MOV  	R7,#00H
	MOV  	R6,#0FH
	LCALL	_CH452_Write
; 		stage_clk_start();
			; SOURCE LINE # 167
	LCALL	stage_clk_start
;   		backward=1;
			; SOURCE LINE # 168
	MOV  	backward,#01H
;  	}	  
			; SOURCE LINE # 169
	RET  	
?C0032:
; 	else //if (a==0&&bb==0&&c==0)
; 	{
			; SOURCE LINE # 171
; 	     if(left==1)
			; SOURCE LINE # 172
	MOV  	A,left
	CJNE 	A,#01H,?C0037
; 		 {
			; SOURCE LINE # 173
; 		 	speedchange(modi1,0);
			; SOURCE LINE # 174
	CLR  	A
	MOV  	R5,A
	MOV  	R7,modi1?750
; 			speedchange(modi,1); }
			; SOURCE LINE # 175
	SJMP 	?C0088
?C0037:
; 		 else if(right==1)
			; SOURCE LINE # 176
	MOV  	A,right
	CJNE 	A,#01H,?C0039
; 		 {
			; SOURCE LINE # 177
; 		 	speedchange(modi,0);
			; SOURCE LINE # 178
	CLR  	A
	MOV  	R5,A
	MOV  	R7,modi?749
	LCALL	_speedchange
; 			speedchange(modi1,1);}
			; SOURCE LINE # 179
	MOV  	R5,#01H
	MOV  	R7,modi1?750
	SJMP 	?C0089
?C0039:
; 		 else
; 		 {
			; SOURCE LINE # 181
; 	        speedchange(modi,0);
			; SOURCE LINE # 182
	CLR  	A
	MOV  	R5,A
	MOV  	R7,modi?749
?C0088:
	LCALL	_speedchange
; 			speedchange(modi,1);}
			; SOURCE LINE # 183
	MOV  	R5,#01H
	MOV  	R7,modi?749
?C0089:
	LCALL	_speedchange
?C0038:
; 			delayms(dem);
			; SOURCE LINE # 184
?C0087:
	MOV  	R7,dem?751
	MOV  	R6,#00H
	LCALL	_delayms
; 	}
			; SOURCE LINE # 185
; }
			; SOURCE LINE # 186
?C0041:
	RET  	
; END OF _judgement

; void judgementback (uchar modi,uchar modi1,uchar dem)

	RSEG  ?PR?_judgementback?BASE
_judgementback:
	USING	0
			; SOURCE LINE # 187
	MOV  	modi?853,R7
	MOV  	modi1?854,R5
	MOV  	dem?855,R3
; {	 
			; SOURCE LINE # 188
; 	if(f==1&&g==0)
			; SOURCE LINE # 189
	MOV  	A,f
	CJNE 	A,#01H,?C0042
	MOV  	A,g
	JNZ  	?C0042
; 	{
			; SOURCE LINE # 190
; 	 speedchange(modi1,1);
			; SOURCE LINE # 191
	MOV  	R5,#01H
	MOV  	R7,modi1?854
; 	 speedchange(modi,0);
			; SOURCE LINE # 192
; 	 
; 	}
			; SOURCE LINE # 194
	SJMP 	?C0090
?C0042:
; 	else if(f==0&&g==1)
			; SOURCE LINE # 195
	MOV  	A,f
	JNZ  	?C0044
	MOV  	A,g
	CJNE 	A,#01H,?C0044
; 	{
			; SOURCE LINE # 196
; 	 speedchange(modi,1);
			; SOURCE LINE # 197
	MOV  	R5,#01H
	MOV  	R7,modi?853
	LCALL	_speedchange
; 	 speedchange(modi1,0);
			; SOURCE LINE # 198
	CLR  	A
	MOV  	R5,A
	MOV  	R7,modi1?854
; 	 
; 	}						
			; SOURCE LINE # 200
	SJMP 	?C0091
?C0044:
; 	else if(f==0&&g==0)
			; SOURCE LINE # 201
	MOV  	A,f
	JNZ  	?C0046
	MOV  	A,g
	JNZ  	?C0046
; 	{
			; SOURCE LINE # 202
; 		speedchange(modi,1);
			; SOURCE LINE # 203
	MOV  	R5,#01H
	MOV  	R7,modi?853
?C0090:
	LCALL	_speedchange
; 	 	speedchange(modi,0);
			; SOURCE LINE # 204
	CLR  	A
	MOV  	R5,A
	MOV  	R7,modi?853
?C0091:
	LCALL	_speedchange
; 	}
			; SOURCE LINE # 205
	SJMP 	?C0043
?C0046:
; 	else 
; 	{
			; SOURCE LINE # 207
; 	 START=0;
			; SOURCE LINE # 208
	CLR  	START
; 	 LASTS=0;
			; SOURCE LINE # 209
	CLR  	LASTS
; 	 stage_clk_flag=0;//stage_clk_stop();
			; SOURCE LINE # 210
	CLR  	A
	MOV  	stage_clk_flag,A
; 	 CH452_Write(CH452_TWINKLE | 0x30);
			; SOURCE LINE # 211
	MOV  	R7,#030H
	MOV  	R6,#06H
	LCALL	_CH452_Write
; 	 TR0=0;
			; SOURCE LINE # 212
	CLR  	TR0
; 	}					
			; SOURCE LINE # 213
?C0043:
; 	delayms(dem);
			; SOURCE LINE # 214
	MOV  	R7,dem?855
	MOV  	R6,#00H
	LJMP 	_delayms
; END OF _judgementback

; }
; 
; 
; void main(void)

	RSEG  ?PR?main?BASE
main:
	USING	0
			; SOURCE LINE # 218
; {	
			; SOURCE LINE # 219
; 	uchar chazhi=4;
			; SOURCE LINE # 220
	MOV  	chazhi?956,#04H
; 	uchar chazhi1;
; 	Init_Device();
			; SOURCE LINE # 222
	LCALL	Init_Device
; 	CH452_Init();	  /* CH452初始化 */
			; SOURCE LINE # 223
	LCALL	CH452_Init
; 	LEDG=0; 
			; SOURCE LINE # 224
	CLR  	LEDG
; 	SPOKER=0;
			; SOURCE LINE # 225
	CLR  	SPOKER
; 	IN0=1;
			; SOURCE LINE # 226
	SETB 	IN0
123

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