keylogo.asm

cypressusb2.0.zip

;******************************************************
;
;	file: USB Library with selftest
;	Date: July 2, 1997
;	Description:  	Selftest code modified for use with the keyboard
;			register definitions and instruction set. 
;			Ver.4 does some extra verification of USB register
;			values.
;
;			M8 BX1.1, KEYIO R2.0, ROMs B1.1
;
;		copyright 1997 Cypress Corporation
;****************************************************** 

;**************** assembler directives ***************** 

	CPU	63413

	XPAGEON

; processor registers
Port0:			equ  0h
Port1:			equ  1h
Port0Int:		equ  4h
Port1Int:		equ  5h
usb_address:		equ  10h
end0_count:		equ  11h
end0_mode:		equ  12h
end1_count:		equ  13h
end1_mode:		equ  14h
global_int:		equ  20h
endpoint_int:		equ  21h
watchdog:		equ  26h
timer_lo:		equ  24h
timer_hi:		equ  25h
control:		equ  FFh

endp1_dmabuff0:	equ  F0h
endp1_dmabuff1:	equ  F1h
endp1_dmabuff2:	equ  F2h
endp1_dmabuff3:	equ  F3h
endp1_dmabuff4:	equ  F4h
endp1_dmabuff5:	equ  F5h
endp1_dmabuff6:	equ  F6h
endp1_dmabuff7:	equ  F7h
endp0_dmabuff0:	equ  F8h
endp0_dmabuff1:	equ  F9h
endp0_dmabuff2:	equ  FAh
endp0_dmabuff3:	equ  FBh
endp0_dmabuff4:	equ  FCh
endp0_dmabuff5:	equ  FDh
endp0_dmabuff6:	equ  FEh
endp0_dmabuff7:	equ  FFh

; mode encoding
disabled:	equ  00h
nak:		equ  01h
stall:		equ  03h
ignore:		equ  04h
con_rd_ack:	equ  0Fh
con_rd_nak:	equ  0Eh
con_rd_stall:	equ  02h
con_wr_ack:	equ  0Bh
con_wr_nak:	equ  0Ah
con_wr_stall:	equ  06h
out_ack:	equ  09h
out_nak:	equ  08h
out_iso:	equ  05h
in_ack:		equ  0Dh
in_nak:		equ  0Ch
in_iso:		equ  07h

; request types
get_status:		equ  00h
clear_feature:		equ  01h
set_feature:		equ  03h
set_address:		equ  05h
get_descriptor:		equ  06h
set_descriptor: 	equ  07h
get_configuration: 	equ  08h
set_configuration: 	equ  09h
get_interface:		equ  0Ah
set_interface:		equ  0Bh
synch_frame:		equ  0Ch
device_status:		equ  00h
endpoint_status: 	equ  00h
endpoint_stalled:	equ  00h
device_remote_wakeup:	equ  01h

;descriptor types
device:			equ  01h
configuration:		equ  02h
string:			equ  03h
interface:		equ  04h
endpoint:		equ  05h
report:			equ  22h

; data memory variables
temp:			equ  11h
button_buff:		equ  12h
loop_counter:		equ  13h
bus_active:		equ  14h
suspend_port:		equ  15h
horiz_state:		equ  16h
vert_state:		equ  17h
port_temp:		equ  18h
endp1_data_toggle:	equ  19h
endp0_data_toggle: 	equ  1Ah
data_start:		equ  1Bh
data_count:		equ  1Ch
endpoint_stall:		equ  1Dh
logo_position:		equ  1Eh

;*************** interrupt vector table ****************

ORG 	00h			

jmp	reset			; reset vector		

jmp	bus_reset		; bus reset interrupt

jmp	check_input		; 128us interrupt

jmp	1ms_clear_control	; 1024ms interrupt

jmp	endpoint_zero		; endpoint 0 interrupt

jmp	endpoint_one		; endpoint 1 interrupt

jmp	error			; not implemented in this version
jmp	error			; not implemented in this version
jmp	error			; not implemented in this version
jmp	error			; not implemented in this version
jmp	error			; not implemented in this version

jmp	error			; general purpose I/0 interrupt (not enabled) 

jmp	error			; not implemented in this version

;************** program listing ************************

ORG  1Ah

error: halt

;*******************************************************
;
;	Interrupt handler: reset
;	Purpose: The program jumps to this routine when
;		 the microcontroller has a power on reset.
;
;*******************************************************

reset:
	mov A, 68h
	swap A, dsp		; sets data memory stack pointer
	mov A, 00h
	mov [logo_position], A
	mov [button_buff], A
	mov [endp1_data_toggle], A
	mov [endpoint_stalled], A
	mov [bus_active], A
	iowr Port0Int		; no ints on port 0 

	mov A, 07h		; enable bus reset, timer interrupts
	iowr global_int
	mov A, 03h		; enable endpoint interrupts
	iowr endpoint_int
	ei			; enable interrupts
wait:
	iord end1_mode
	and A, 0Fh
	cmp A, 00h		; test if configured
	jnz gpio		; if so, poll port 0
	jmp wait


;*******************************************************
;
;	Interrupt handler: bus_reset
;	Purpose: The program jumps to this routine when
;		 the microcontroller has a bus reset.
;
;*******************************************************

bus_reset:
	mov A, stall		; set to STALL INs&OUTs
	iowr end0_mode
	iord end0_mode		; check that mode was written 
	and A, 0Fh
	cmp A, 00h
	jz bus_reset

	mov A, 80h		; enable USB address = 0
	iowr usb_address
	mov A, disabled		; disable endpoint1
	iowr end1_mode
	mov A, 00h
	mov psp,a	
	jmp reset

;*******************************************************
;
;	Interrupt handler: check_input
;	Purpose: If the 128us interrupt is enabled, the 
;		program will jump to here every 128us.
;		In this program the 128us interrupt is
;		not used.
;
;*******************************************************

check_input:
	reti
	
;*******************************************************
;
;	Interrupt handler: 1ms_clear_control
;	Purpose: Every 1ms this interrupt handler clears
;		the watchdog timer.
;
;*******************************************************

1ms_clear_control:
	push A
	mov A, 41h
	iowr watchdog		; clear watchdog timer
	pop A
	reti

;*******************************************************
;
;	Interrupt handler: endpoint_zero
;	Purpose: This interrupt routine handles the specially
;		 reserved control endpoint 0 and parses setup 
;		 packets.  If a IN or OUT is received, this 
;		 handler returns to the control_read
;		 or no_data_control routines to send more data.
;
;*******************************************************

endpoint_zero:
	push A
	iord end0_mode
	and A, 80h		; check if SETUP packet received
	jz no_setup
	iord end0_mode		; check mode for valid SETUP
	and A, 9Fh
	cmp A, 91h
	jnz bad_setup
	iord end0_count		; check count for valid SETUP
	and A, CFh
	cmp A, 4Ah
	jnz bad_setup
	call host2dev_devrecip	; SETUP ...goto parsing 
no_setup:
	pop A
	reti			; IN or OUT, or SETUP completed
bad_setup:
	mov A,03h		; stall following an bad SETUP
	iowr end0_mode
	jmp no_setup

;*************stage one..determine type of transfer (bmRequestType)

host2dev_devrecip:
	mov A, nak		; clear the setup flag leave in Nak mode
	iowr end0_mode
	iord end0_mode		; retry write if needed
	cmp A, nak
	jnz host2dev_devrecip

	mov A, [endp0_dmabuff0]	; parse packet
	cmp A, 00h
	jnz host2dev_intrecip

	mov A, [endp0_dmabuff1]
	cmp A, clear_feature
	jz clear_feat

	mov A, [endp0_dmabuff1]
	cmp A, set_feature
	jz set_feat

	mov A, [endp0_dmabuff1]
	cmp A, set_address
	jz set_addr

	mov A, [endp0_dmabuff1]
	cmp A, set_configuration
	jz set_config

h2dd_stall:
	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	iord end0_mode		; write retry
	cmp A, stall	
	jnz h2dd_stall
	ret

host2dev_intrecip:
	mov A, [endp0_dmabuff0]
	cmp A, 01h
	jnz host2dev_endprecip

	mov A, [endp0_dmabuff1]	; parse packet
	cmp A, set_interface
	jz set_interf

h2di_stall:
	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	iord end0_mode		; write retry
	cmp A, stall	
	jnz h2di_stall
	ret

host2dev_endprecip:
	mov A, [endp0_dmabuff0]
	cmp A, 02h
	jnz dev2host_devrecip

	mov A, [endp0_dmabuff1]	; parse
	cmp A, set_feature
	jz set_feat

	cmp A, clear_feature
	jz clear_feat

	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	ret
	
dev2host_devrecip:
	mov A, [endp0_dmabuff0]	; read the first byte of the buffer
	cmp A, 80h		; compare to 80h
	jnz dev2host_intrecip

	mov A, [endp0_dmabuff1]	; parse
	cmp A, get_configuration
	jz get_config
	
	mov A, [endp0_dmabuff1]
	cmp A, get_status
	jz get_stat

	mov A, [endp0_dmabuff1]
	cmp A, get_descriptor
	jz get_desc

	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	ret

dev2host_intrecip:
	mov A, [endp0_dmabuff0]
	cmp A, 81h
	jnz dev2host_endprecip

	mov A, [endp0_dmabuff1]	; parse
	cmp A, get_interface
	jz get_interf	

	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	ret

dev2host_endprecip:
	mov A, [endp0_dmabuff0]
	cmp A, 82h
	jz match
	ret
  match:
	mov A, [endp0_dmabuff1]	; get HID class descriptor
	cmp A, get_descriptor
	jz get_desc

	mov A, [endp0_dmabuff1]	; parse
	cmp A, endpoint_status
	jz endp_status

	mov A, stall		; send a stall to indicate that the requested
	iowr end0_mode		; function is not supported
	ret


;************stage two..determine request type (bRequest)



set_addr:
	call no_data_control
	mov A, [endp0_dmabuff2]		; get address
	or A, 80h				; address enable bit
	iowr usb_address		; set usb address register
	ret

set_feat:
	mov A, [endp0_dmabuff2]
	cmp A, endpoint_stalled
	jnz remote_wakeup
	mov A, 01h
	mov [endpoint_stall], A
	call no_data_control	
	ret
	remote_wakeup:
	call no_data_control
	ret

clear_feat:
	mov A, [endp0_dmabuff2]
	cmp A, endpoint_stalled
	jnz not_endp_clear 
	mov A, 00h
	mov [endpoint_stall], A
	not_endp_clear:
	call no_data_control
	ret

get_interf:
	mov A, 69h
	mov [data_start], A
	mov A, [endp0_dmabuff6]
	mov [data_count], A
	call control_read
	ret

set_interf:
	call no_data_control
	ret

get_config:
	mov A, 68h
	mov [data_start], A
	mov A, [endp0_dmabuff6]
	mov [data_count], A	 
	call control_read
	ret

set_config:
	call no_data_control
	ret

get_stat:
	mov A, [endp0_dmabuff7]
	cmp A, device_status
	jz dev_status

	mov A, stall		; send a stall to indicate that the requested