cyclone32.csf

ALTERA的NIOS处理器！文件直接可以打开直接选择器件重新编译！

	fl_a[16] : LOCATION = Pin_139;
	fl_a[17] : LOCATION = Pin_143;
	fl_a[18] : LOCATION = Pin_141;
	fl_a[1] : LOCATION = Pin_48;
	fl_a[2] : LOCATION = Pin_49;
	fl_a[3] : LOCATION = Pin_50;
	fl_a[4] : LOCATION = Pin_125;
	fl_a[5] : LOCATION = Pin_127;
	fl_a[6] : LOCATION = Pin_131;
	fl_a[7] : LOCATION = Pin_133;
	fl_a[8] : LOCATION = Pin_158;
	fl_a[9] : LOCATION = Pin_16;
	fl_d[0] : LOCATION = Pin_46;
	fl_d[1] : LOCATION = Pin_45;
	fl_d[2] : LOCATION = Pin_44;
	fl_d[3] : LOCATION = Pin_165;
	fl_d[4] : LOCATION = Pin_164;
	fl_d[5] : LOCATION = Pin_17;
	fl_d[6] : LOCATION = Pin_18;
	fl_d[7] : LOCATION = Pin_19;
	fl_ncs : LOCATION = Pin_37;
	fl_ncsb : LOCATION = Pin_23;
	fl_noe : LOCATION = Pin_24;
	fl_nwe : LOCATION = Pin_15;
	fl_rdy : LOCATION = Pin_29;
	freeio : LOCATION = Pin_21;
	io_b[10] : LOCATION = Pin_124;
	io_b[1] : LOCATION = Pin_58;
	io_b[2] : LOCATION = Pin_59;
	io_b[3] : LOCATION = Pin_60;
	io_b[4] : LOCATION = Pin_61;
	io_b[5] : LOCATION = Pin_62;
	io_b[6] : LOCATION = Pin_120;
	io_b[7] : LOCATION = Pin_121;
	io_b[8] : LOCATION = Pin_122;
	io_b[9] : LOCATION = Pin_123;
	io_l[10] : LOCATION = Pin_13;
	io_l[11] : LOCATION = Pin_38;
	io_l[12] : LOCATION = Pin_39;
	io_l[13] : LOCATION = Pin_41;
	io_l[14] : LOCATION = Pin_42;
	io_l[15] : LOCATION = Pin_43;
	io_l[16] : LOCATION = Pin_53;
	io_l[17] : LOCATION = Pin_54;
	io_l[18] : LOCATION = Pin_55;
	io_l[19] : LOCATION = Pin_56;
	io_l[1] : LOCATION = Pin_2;
	io_l[20] : LOCATION = Pin_57;
	io_l[2] : LOCATION = Pin_3;
	io_l[3] : LOCATION = Pin_4;
	io_l[4] : LOCATION = Pin_5;
	io_l[5] : LOCATION = Pin_6;
	io_l[6] : LOCATION = Pin_7;
	io_l[7] : LOCATION = Pin_8;
	io_l[8] : LOCATION = Pin_11;
	io_l[9] : LOCATION = Pin_12;
	io_r[10] : LOCATION = Pin_162;
	io_r[11] : LOCATION = Pin_161;
	io_r[12] : LOCATION = Pin_160;
	io_r[13] : LOCATION = Pin_159;
	io_r[14] : LOCATION = Pin_140;
	io_r[15] : LOCATION = Pin_138;
	io_r[16] : LOCATION = Pin_136;
	io_r[17] : LOCATION = Pin_134;
	io_r[18] : LOCATION = Pin_132;
	io_r[19] : LOCATION = Pin_128;
	io_r[1] : LOCATION = Pin_176;
	io_r[20] : LOCATION = Pin_126;
	io_r[2] : LOCATION = Pin_175;
	io_r[3] : LOCATION = Pin_174;
	io_r[4] : LOCATION = Pin_173;
	io_r[5] : LOCATION = Pin_170;
	io_r[6] : LOCATION = Pin_169;
	io_r[7] : LOCATION = Pin_168;
	io_r[8] : LOCATION = Pin_167;
	io_r[9] : LOCATION = Pin_163;
	io_t[1] : LOCATION = Pin_1;
	io_t[2] : LOCATION = Pin_240;
	io_t[3] : LOCATION = Pin_239;
	io_t[4] : LOCATION = Pin_181;
	io_t[5] : LOCATION = Pin_180;
	io_t[6] : LOCATION = Pin_179;
	rama_a[0] : LOCATION = Pin_64;
	rama_a[10] : LOCATION = Pin_118;
	rama_a[11] : LOCATION = Pin_116;
	rama_a[12] : LOCATION = Pin_114;
	rama_a[13] : LOCATION = Pin_108;
	rama_a[14] : LOCATION = Pin_106;
	rama_a[15] : LOCATION = Pin_67;
	rama_a[16] : LOCATION = Pin_65;
	rama_a[17] : LOCATION = Pin_63;
	rama_a[1] : LOCATION = Pin_66;
	rama_a[2] : LOCATION = Pin_68;
	rama_a[3] : LOCATION = Pin_74;
	rama_a[4] : LOCATION = Pin_76;
	rama_a[5] : LOCATION = Pin_107;
	rama_a[6] : LOCATION = Pin_113;
	rama_a[7] : LOCATION = Pin_115;
	rama_a[8] : LOCATION = Pin_117;
	rama_a[9] : LOCATION = Pin_119;
	rama_d[0] : LOCATION = Pin_82;
	rama_d[10] : LOCATION = Pin_95;
	rama_d[11] : LOCATION = Pin_93;
	rama_d[12] : LOCATION = Pin_87;
	rama_d[13] : LOCATION = Pin_85;
	rama_d[14] : LOCATION = Pin_83;
	rama_d[15] : LOCATION = Pin_79;
	rama_d[1] : LOCATION = Pin_84;
	rama_d[2] : LOCATION = Pin_86;
	rama_d[3] : LOCATION = Pin_88;
	rama_d[4] : LOCATION = Pin_94;
	rama_d[5] : LOCATION = Pin_98;
	rama_d[6] : LOCATION = Pin_100;
	rama_d[7] : LOCATION = Pin_104;
	rama_d[8] : LOCATION = Pin_101;
	rama_d[9] : LOCATION = Pin_99;
	rama_ncs : LOCATION = Pin_78;
	rama_nlb : LOCATION = Pin_77;
	rama_noe : LOCATION = Pin_73;
	rama_nub : LOCATION = Pin_75;
	rama_nwe : LOCATION = Pin_105;
	ramb_a[0] : LOCATION = Pin_237;
	ramb_a[10] : LOCATION = Pin_183;
	ramb_a[11] : LOCATION = Pin_185;
	ramb_a[12] : LOCATION = Pin_187;
	ramb_a[13] : LOCATION = Pin_193;
	ramb_a[14] : LOCATION = Pin_195;
	ramb_a[15] : LOCATION = Pin_234;
	ramb_a[16] : LOCATION = Pin_236;
	ramb_a[17] : LOCATION = Pin_238;
	ramb_a[1] : LOCATION = Pin_235;
	ramb_a[2] : LOCATION = Pin_233;
	ramb_a[3] : LOCATION = Pin_227;
	ramb_a[4] : LOCATION = Pin_225;
	ramb_a[5] : LOCATION = Pin_194;
	ramb_a[6] : LOCATION = Pin_188;
	ramb_a[7] : LOCATION = Pin_186;
	ramb_a[8] : LOCATION = Pin_184;
	ramb_a[9] : LOCATION = Pin_182;
	ramb_d[0] : LOCATION = Pin_219;
	ramb_d[10] : LOCATION = Pin_206;
	ramb_d[11] : LOCATION = Pin_208;
	ramb_d[12] : LOCATION = Pin_214;
	ramb_d[13] : LOCATION = Pin_216;
	ramb_d[14] : LOCATION = Pin_218;
	ramb_d[15] : LOCATION = Pin_222;
	ramb_d[1] : LOCATION = Pin_217;
	ramb_d[2] : LOCATION = Pin_215;
	ramb_d[3] : LOCATION = Pin_213;
	ramb_d[4] : LOCATION = Pin_207;
	ramb_d[5] : LOCATION = Pin_203;
	ramb_d[6] : LOCATION = Pin_201;
	ramb_d[7] : LOCATION = Pin_197;
	ramb_d[8] : LOCATION = Pin_200;
	ramb_d[9] : LOCATION = Pin_202;
	ramb_ncs : LOCATION = Pin_223;
	ramb_nlb : LOCATION = Pin_224;
	ramb_noe : LOCATION = Pin_228;
	ramb_nub : LOCATION = Pin_226;
	ramb_nwe : LOCATION = Pin_196;
	ser_ncts : LOCATION = Pin_28;
	ser_nrts : LOCATION = Pin_177;
	ser_rxd : LOCATION = Pin_153;
	ser_txd : LOCATION = Pin_178;
	wd : LOCATION = Pin_166;
	RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED";
	HEXOUT_FILE_START_ADDRESS = 0;
	GENERATE_HEX_FILE = OFF;
	GENERATE_RBF_FILE = OFF;
	GENERATE_TTF_FILE = OFF;
	RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
	RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED";
	RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO";
	RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO";
	RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO";
	DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF;
	AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
	EPROM_USE_CHECKSUM_AS_USERCODE = OFF;
	FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	STRATIX_CONFIGURATION_DEVICE = AUTO;
	FLEX10K_CONFIGURATION_DEVICE = AUTO;
	FLEX6K_CONFIGURATION_DEVICE = AUTO;
	MERCURY_CONFIGURATION_DEVICE = AUTO;
	EXCALIBUR_CONFIGURATION_DEVICE = AUTO;
	APEX20K_CONFIGURATION_DEVICE = AUTO;
	USE_CONFIGURATION_DEVICE = OFF;
	ENABLE_INIT_DONE_OUTPUT = OFF;
	FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
	ENABLE_DEVICE_WIDE_OE = OFF;
	ENABLE_DEVICE_WIDE_RESET = OFF;
	RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
	AUTO_RESTART_CONFIGURATION = OFF;
	ENABLE_VREFB_PIN = OFF;
	ENABLE_VREFA_PIN = OFF;
	SECURITY_BIT = OFF;
	USER_START_UP_CLOCK = OFF;
	APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	STRATIX_UPDATE_MODE = STANDARD;
	USE_CHECKSUM_AS_USERCODE = OFF;
	MAX7000_USE_CHECKSUM_AS_USERCODE = OFF;
	MAX7000_JTAG_USER_CODE = FFFFFFFF;
	FLEX10K_JTAG_USER_CODE = 7F;
	MERCURY_JTAG_USER_CODE = FFFFFFFF;
	APEX20K_JTAG_USER_CODE = FFFFFFFF;
	STRATIX_JTAG_USER_CODE = FFFFFFFF;
	RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO";
	FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
	FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF;
	ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
	MAX7000_ENABLE_JTAG_BST_SUPPORT = ON;
	ENABLE_JTAG_BST_SUPPORT = OFF;
	CONFIGURATION_CLOCK_DIVISOR = 1;
	CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ";
	CLOCK_SOURCE = INTERNAL;
	COMPRESSION_MODE = OFF;
	DEVICE_FILTER_SPEED_GRADE = ANY;
	DEVICE_FILTER_PIN_COUNT = ANY;
	DEVICE_FILTER_PACKAGE = ANY;
	BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF;
	DEVICE = EP1C6Q240C8;
	MAX7000S_JTAG_USER_CODE = FFFF;
	CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	CYCLONE_CONFIGURATION_DEVICE = AUTO;
	ON_CHIP_BITSTREAM_DECOMPRESSION = OFF;
	HEXOUT_FILE_COUNT_DIRECTION = UP;
	STRATIX_DEVICE_IO_STANDARD = LVTTL;
}
COMPILER_SETTINGS
{
	DRC_FANOUT_EXCEEDING = 30;
	DRC_REPORT_FANOUT_EXCEEDING = OFF;
	DRC_TOP_FANOUT = 50;
	DRC_REPORT_TOP_FANOUT = OFF;
	RUN_DRC_DURING_COMPILATION = OFF;
	ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON;
	ADV_NETLIST_OPT_FIT_LE_DUPLICATION = OFF;
	ADV_NETLIST_OPT_FIT_LE_RETIME = OFF;
	ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF;
	ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF;
	ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF;
	SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF;
	RUN_TIMING_ANALYSES = ON;
	MERGE_HEX_FILE = OFF;
	FOCUS_ENTITY_NAME = |cyclone32;
	SEED = 1;
	FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY;
	FAMILY = Cyclone;
	DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
	DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1";
	DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
	DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1";
	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1";
	DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2";
	DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
	DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1";
	DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
	DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
	DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
	DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3";
	DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
	DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB";
	DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB";
	DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3";
	DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
	DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4";
	DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4";
	DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3";
	DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS";
	DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS";
	DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS";
	STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
	PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2";
	PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2";
	STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1";
	FAST_FIT_COMPILATION = OFF;
	OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON;
	OPTIMIZE_TIMING = NORMAL_COMPILATION;
	COMPILATION_LEVEL = FULL;
	SAVE_DISK_SPACE = ON;
	SPEED_DISK_USAGE_TRADEOFF = NORMAL;
	LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF;
	SIGNALPROBE_ALLOW_OVERUSE = OFF;
	IO_PLACEMENT_OPTIMIZATION = ON;
	ENABLE_DRC_SETTINGS = OFF;
	PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF;
	PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF;
	PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF;
	TRUE_WYSIWYG_FLOW = OFF;
	SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF;
	OPTIMIZE_HOLD_TIMING = "IO PATHS AND MINIMUM TPD PATHS";
}