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	/* TCTL2 bit definitions 0x1E */

	#define EDG4B bit7
	#define EDG4A bit6
	#define EDG1B bit5
	#define EDG1A bit4
	#define EDG2B bit3
	#define EDG2A bit2
	#define EDG3B bit1
	#define EDG3A bit0

<a name="tmsk1bits">	/* TMSK1 bit definitions 0x20 */</a>

	#define IC1I bit8
	#define IC2I bit9
	#define IC3I bit10
	#define OC1I bit11
	#define OC2I bit12
	#define OC3I bit13
	#define OC4I bit14
	#define I4O5I bit15

	/* TMSK2 bit definitions 0x20 */

	#define TOI  bit7
	#define PAOVI bit5
	#define PAII bit4
	#define CPROUT bit3
	#define CPR2 bit2
	#define CPR1 bit1
	#define CPR0 bit0

	/* TFLG1 bit definitions 0x22 */

	#define IC1F bit8
	#define IC2F bit9
	#define IC3F bit10
	#define OC1F bit11 
	#define OC2F bit12
	#define OC3F bit13
	#define OC4F bit14
	#define I4O5F bit15

	/* TFLG2 bit definitions 0x22 */

	#define TOF  bit7
	#define PAOVF bit5
	#define PAIF bit4

	/* CFORC bit definitions 0x24*/

	#define FOC1 bit15
	#define FOC2 bit14
	#define FOC3 bit13
	#define FOC4 bit12
	#define FOC5 bit11
	#define FPWMA bit9
	#define FPWMB bit8

<a name="pwmcbits">	/* PWMC Bit definitions 0x24*/</a>

	#define PPROUT bit7
	#define PPR2 bit6
	#define PPR1 bit5
	#define PPR0 bit4
	#define SFA bit3
	#define SFB bit2
	#define F1A bit1
	#define F1B bit0

	#endif
</code></pre>
 
<h4><a name="mcci_h">MultiChannel Communications Interface--MCCI</a></h4>
<pre><code>
	#ifndef MCCI_H
	#define MCCI_H

	#ifdef _PAGE0
	#define _MEM @indir
	#else
	#ifdef _PAGEF
	#define _MEM
	#else 
	#define _MEM @far
	#endif
	#endif

	typedef struct 
	{
		unsigned INTV :8;
		unsigned ILSCIA :3;
		unsigned ILSCIB :3;

	}Ilsci;

	typedef struct
	{
		unsigned NU :11 ;
		unsigned ILSPI :3;
	} Ilspi;

	typedef struct
	{
		unsigned BAUD :8;
		unsigned SIZE :1;
		unsigned LSBF :1;
		unsigned CPHA :1;
		unsigned CPOL :1;
		unsigned MSTR :1;
		unsigned WOMP :1;
		unsigned SPE  :1;
		unsigned SPIE :1;
	}Spcr;

	typedef struct
	{
		unsigned LOWB :8;
		unsigned UPPB :8;
	} Spdr;

<a name="sccr0">	typedef struct</a>
	{
		unsigned BR :13;
	} Sccr0;

<a name="scdr">	typedef struct</a>
	{
		unsigned DATA :8;
		unsigned BIT8 :1;
	} Scdr;

	#define MCCI_MCR (*(_MEM MCR_Register*)(MCCI_Register+0x00))
	#define ILSCI (*(_MEM Ilsci *)(MCCI_Register+0x04))
	#define MIVR ILSCI
	#define ILSPI (*(_MEM Ilspi *)(MCCI_Register+0x06))
	#define MPAR (*(_MEM Char_Register*)(MCCI_Register+0x09))
	#define MCCR (*(_MEM Char_Register*)(MCCI_Register+0x0b
	#define PORTMC (*(_MEM Char_Register*)(MCCI_Register+0x0c))
	#define PORTMCP (*(_MEM Char_Register*)(MCCI_Register+0x0e))
<a name="sccr0a">	#define SCCR0A (*(_MEM Sccr0    *)(MCCI_Register+0x18))</a>
<a name="sccr1a">	#define SCCR1A (*(_MEM Register *)(MCCI_Register+0x1a))</a>
<a name="scsra">	#define SCSRA (*(_MEM Register *)(MCCI_Register+0x1c))</a>
<a name="scdra">	#define SCDRA (*(_MEM Scdr *)(MCCI_Register+0x1e))</a>
	#define SCCR0B (*(_MEM Sccr0    *)(MCCI_Register+0x28))
	#define SCCR1B (*(_MEM Register *)(MCCI_Register+0x2a))
	#define SCSRB (*(_MEM Register *)(MCCI_Register+0x2c))
	#define SCDRB (*(_MEM Scdr *)(MCCI_Register+0x2e))
	#define SPCR (*(_MEM Spcr *)(MCCI_Register+0x38))
	#define SPSR (*(_MEM Register*)(MCCI_Register+0x3c))
	#define SPDR (*(_MEM Spdr *)(MCCI_Register+0x3e))

	/* some useful values */

	#define BAUD_4800       109     /* Baud rate codes for the HC16 */
	#define BAUD_9600       55
	#define BAUD_19K        27

	/* PORTMCP bits */
	#define MISO bit0
	#define MOSI bit1
	#define SCK bit2
	#define SS bit3
	#define RXDB bit4
	#define TXDB bit5
	#define RXDA bit6
	#define TXDB bit7

	/* SPSR bits */
	#define MODF bit12
	#define WCOL bit14
	#define SPIF bit15

<a name="sccs1">	/* SCCR1 bits */</a>
	#define SBK bit0
	#define RWU bit1
	#define RE bit2
	#define TE bit3
	#define ILIE bit4
	#define RIE bit5
	#define TCIE bit6
	#define TIE bit7
	#define WAKE bit8
	#define M bit9
	#define PE bit10
	#define PT bit11
	#define ILT bit12
	#define WOMC bit13
	#define LOOPS bit14

<a name="scsr_reg">	/* SCSR bits */</a>
	#define PF bit0
	#define FE bit1
	#define NF bit2
	#define OR bit3
	#define IDLE bit4
	#define RAF bit5
	#define RDRF bit6
	#define TC bit7
	#define TDRE bit8

	#endif
</code></pre>
 
<h4><a name="qsm_h">Queued Serial Module--QSM</a></h4>

<p>	The QSM is used on the M68HC16Z1 only.  This header file is included for 
reference only.

<pre><code>
	#ifndef QSM_H
	#define QSM_H

	#ifdef _PAGE0
	#define _MEM @indir
	#else
	#ifdef _PAGEF
	#define _MEM
	#else 
	#define _MEM @far
	#endif
	#endif

	typedef struct
	{
	     unsigned INTV   :8;
	     unsigned ILSCI  :3;
	     unsigned ILQSPI :3;
	     unsigned NUL1   :2;
	} Qilr;

	typedef struct
	{
	     unsigned SP    :8;
	     unsigned CPHA  :1;
	     unsigned CPOL  :1;
	     unsigned BITS  :4;
	     unsigned WOMQ  :1;
	     unsigned MSTR  :1;
	} Spcr0;

	typedef struct
	{
	     unsigned DTL   :8;
	     unsigned DSCLK :7;
	     unsigned SPE   :1;
	} Spcr1;

	typedef struct
	{
	     unsigned NEWQP :4;
	     unsigned NUL2  :4;
	     unsigned ENDQP :4;
	     unsigned NUL3 :1;
	     unsigned WRTO  :1;
	     unsigned WREN  :1;
	     unsigned SPIFIE:1;
	}  Spcr2;

	typedef struct
	{
	     unsigned char PCS   :4;
	     unsigned char DSCK  :1;
	     unsigned char DT    :1;
	     unsigned char BITSE :1;
	     unsigned char CONT  :1;
	}Cr;

	typedef struct
	{
	     unsigned SCBR   :13;
	     unsigned NUL4   :3;
	} Sccr0;

	#define QSMCR (*(_MEM MCR_Register*)(QSM_Register+0x00))
	#define QILR (*(_MEM Qilr*)(QSM_Register + 0x04))
	#define QIVR QILR
	#define SCCR0 (*(_MEM Sccr0*)(QSM_Register+0x08))
	#define SCCR1 (*(_MEM Register*)(QSM_Register+0x0a))
	#define SCSR (*(_MEM volatile Register*)(QSM_Register+0x0c))
	#define SCDR (*(_MEM volatile int*)(QSM_Register+0x0e))
	#define PORTQS (*(_MEM volatile Register*)(QSM_Register +0x14))
	#define PQSPAR (*(_MEM volatile Register*)(QSM_Register +0x16))
	#define DDRQS PQSPAR
	#define SPCR0 (*(_MEM Spcr0*)(QSM_Register + 0x18))
	#define SPCR1 (*(_MEM Spcr1*)(QSM_Register +0x1a))
	#define SPCR2 (*(_MEM SPCR2*)(QSM_Register +0x1c))
	#define SPCR3 (*(_MEM MCR_Register)(QSM_Register+0x1e))
	#define RR ((_MEM int*)(QSM_Register+0x100))
	#define TR ((_MEM int*)(QSM_Register+0x120))
	#define CR ((_MEM Cr*)(QSM_Register+0x140))

	/*QSMCR bit definitions */


	#define SUPV bit7
	#define FRZ0 bit13
	#define FRZ1 bit14
	#define STOP bit15

	/* SPCR3 bit definitions */
	#define CPTQP iarb
	#define HALTA bit5
	#define MODF  bit6
	#define SPIF  bit7
	#define HALT  bit8
	#define HMIE  bit9
	#define LOOPQ bit10


	#define SCCR2 SCCR1
	/* SCCR1 bit definitions */
	#define SBK   bit0
	#define RWU   bit1
	#define RE    bit2
	#define TE    bit3
	#define ILIE  bit4
	#define RIE   bit5
	#define TCIE  bit6
	#define TIE   bit7
	#define WAKE  bit8
	#define M     bit9
	#define PE    bit10
	#define PT    bit11
	#define ILT   bit12
	#define WOMS  bit13
	#define LOOPS bit14

	/* SCSR bit definitions */
	#define PF   bit0
	#define FE   bit1
	#define NF   bit2
	#define OR   bit3
	#define IDLE bit4
	#define RAF  bit5
	#define RDRF bit6
	#define TC   bit7
	#define TDRE bit8

	#endif
</code></pre>

 
<h4><a name="sim_h">The System Integration Module -- SIM</a></h4>
	
<p>	The SIM is used with the M68HC16Z1 part.  There are a few significant 
differences between the SIM and the SCIM, Single Chip Integration Module, which 
follows this one.
<pre><code>

	#ifndef SIM
	#define SIM 1

	#ifdef _PAGE0
	#define _MEM @indir
	#else
	#ifdef _PAGEF
	#define _MEM
	#else 
	#define _MEM @far
	#endif
	#endif

<a name="syncrbits">	typedef struct</a>
	{
	     unsigned STEXT :1;
	     unsigned STSIM :1;
	     unsigned RSTEN :1;
	     unsigned SLOCK :1;
	     unsigned SLIMP :1;
	     unsigned NO1 :2;
	     unsigned EDIV  :1;
	     unsigned Y     :6;
	     unsigned X     :1;
	     unsigned W     :1;
	} Syncr;

	typedef struct
	{
	     unsigned BMT :2;
	     unsigned BME :1;
	     unsigned HME :1;
	     unsigned SWT :2;
	     unsigned SWP :1;
	     unsigned SWE :1;
	}Sypcr; 

	typedef struct
	{
	     unsigned PIV   :8;
	     unsigned PIRQL :3;
	     unsigned NO2  :5;
	} Picr;

	typedef struct
	{
	     unsigned PITM  :8;
	     unsigned PTP   :1;
	     unsigned NO3  :7;
	}Pitr;

	typedef struct
	{
	     unsigned pr0 :2;
	     unsigned pr1 :2;
	     unsigned pr2 :2;
	     unsigned pr3 :2;
	     unsigned pr4 :2;
	     unsigned pr5 :2;
	     unsigned pr6 :2;
	     unsigned pr7 :2;
	} Cspar;

	typedef struct
	{
	     unsigned BLKSZ :3;
	     unsigned HIADDR :13;
	} Csbar;

	typedef struct
	{
	     unsigned AVEC :1;
	     unsigned IPL :3;
	     unsigned SPACE :2;
	     unsigned DSACK :4;
	     unsigned STRB :1;
	     unsigned RSW :2;
	     unsigned BYTE :2;
	     unsigned MODE :1;
	} Csor;

	#define SIM_MCR (*(_MEM MCR_Register*)(SIM_Register))
<a  name="syncr">	#define SYNCR (*(_MEM Syncr*)(SIM_Register+0x4))</a>
	#define RSR (*(_MEM Register*)(SIM_Register+0x6))
	#define SIMTRE (*(_MEM Register*)(SIM_Register+0x8))
	#define PORTE0 (*(_MEM Register*)(SIM_Register+0x10))