📄 udma.c
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#include "stdio.h"
#include "dos.h"
#include "process.h"
#include "stdlib.h"
#include "time.h"
#include "conio.h"
#define CMD_BASE 0Xdc00
#define CTL_BASE 0Xd880
#define IO_BASE 0Xd400
void ddelay(unsigned int);
void InitRamW(void);
void InitRamR(void);
void Write(void);
void Read(void);
void main()
{
unsigned int i, j=0;
clock_t start,end;
clrscr();
start = clock();
while(1)
{
printf("\n%X\n",j++);
InitRamW();
Write();
InitRamR();
Read();
for(i = 0; i < 256; i++)
{
if(peek(0x9fc0, i) != peek(0x9f90, i))
{
exit(0);
printf("not equl!!!!\n");
}
}
end = clock();
printf("the time was: %f\n",(end-start)/(CLK_TCK * 60));
}
}
/*******************************************************/
void ddelay(unsigned int del)
{
unsigned int delay,i;
delay = del;
for(i = 0; i<delay; i++)
{
del = delay;
while( del-- );
}
}
/*******************************************************/
void InitRamW()
{
unsigned int addr;
unsigned char data;
poke(0x9fbf,0x0008,0xfc00);
poke(0x9fbf,0x000a,0x0009);
poke(0x9fbf,0x000c,0x0200);
poke(0x9fbf,0x000e,0x8000);
data = 0;
for(addr = 0; addr <256; addr++)
{
pokeb(0x9fc0, addr,data);
data++;
}
}
/*******************************************************/
void InitRamR()
{
poke(0x9fbf,0x0008,0xf900);
poke(0x9fbf,0x000a,0x0009);
poke(0x9fbf,0x000c,0x0200);
poke(0x9fbf,0x000e,0x8000);
}
/*******************************************************/
void Write()
{
int state;
outp(CMD_BASE+06,0xb0);
state = (int) inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50)
{
printf("ERRORw1\n ");
exit(0);
}
outport(IO_BASE+64, 0x4e31);/*set timing for UDMA*/
outport(IO_BASE+66, 0x1645);
outp(CMD_BASE+06, 0xb0);
outp(CMD_BASE+02, 0x44); /*set transfer mode */
outp(CMD_BASE+01, 0x03);
outp(CMD_BASE+07, 0xef);
/*------------------------*/
ddelay(0x1FFF);
state = (int) inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50)
{
printf("\nERROw2 ");
exit(0);
}
/*-------------------------*/
outport(IO_BASE+04, 0xfbf8);/*set SG base address*/
outport(IO_BASE+06, 0x9);
state = inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50 ) {
printf("\n The disk is not ready _w !!!");
return;
}
outp(CMD_BASE+02, 0x1);
outp(CMD_BASE+03, 0x0);
outp(CMD_BASE+04, 0x0);
outp(CMD_BASE+05, 0x0);
outp(CMD_BASE+06, 0x50);
outp(CMD_BASE+07, 0xca);
outp(IO_BASE+00, 1);
ddelay(0x1FFF);
outp(IO_BASE+00, 0);
state = (int) inp(CMD_BASE+07);
printf("the last state_w = %x",state);
if(state != 0x50)
{
printf("\nERRORw\n");
exit(0);
}
}
/*******************************************************/
void Read()
{
int state;
outp(CMD_BASE+06, 0xb0);
state = (int) inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50)
{
printf("ERROR1\n ");
exit(0);
}
outport(IO_BASE+64, 0x4e31);/*set timing for UDMA*/
outport(IO_BASE+66, 0x1645);
outp(CMD_BASE+06, 0xb0);
outp(CMD_BASE+02, 0x44); /*set transfer mode */
outp(CMD_BASE+01, 0x03);
outp(CMD_BASE+07, 0xef);
/*------------------------*/
ddelay(0x1FFF);
state = (int) inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50)
{
printf("\nERROR ");
exit(0);
}
/*-------------------------*/
outport(IO_BASE+04, 0xfbf8);/*set SG base address*/
outport(IO_BASE+06, 0x9);
state = inp(CMD_BASE+07);
printf("state = %x\n",state);
if(state != 0x50 ) {
printf("\n The disk is not ready!!!");
exit(0);
}
outp(CMD_BASE+02, 0x1);
outp(CMD_BASE+03, 0x0);
outp(CMD_BASE+04, 0x0);
outp(CMD_BASE+05, 0x0);
outp(CMD_BASE+06, 0x50);
outp(CMD_BASE+07, 0xc8);
outp(IO_BASE+00, 9);
ddelay(0x1FFF);
outp(IO_BASE+00, 0);
state = (int) inp(IO_BASE+07);
printf("the last state = %x",state);
if(state != 0x50)
{
printf("\nERROR\n");
exit(0);
}
}
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