c8051f020.h

C8051F.rar

  00F6          +1   130     EIP1     DATA  0F6H   ; EXTERNAL INTERRUPT PRIORITY REGISTER 1
  00F7          +1   131     EIP2     DATA  0F7H   ; EXTERNAL INTERRUPT PRIORITY REGISTER 2
  00F8          +1   132     SPI0CN   DATA  0F8H   ; SERIAL PERIPHERAL INTERFACE 0 CONTROL 
  00F9          +1   133     PCA0H    DATA  0F9H   ; PCA 0 TIMER - HIGH BYTE
  00FA          +1   134     PCA0CPH0 DATA  0FAH   ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 0 - HIGH BYTE
  00FB          +1   135     PCA0CPH1 DATA  0FBH   ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 1 - HIGH BYTE
  00FC          +1   136     PCA0CPH2 DATA  0FCH   ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 2 - HIGH BYTE
  00FD          +1   137     PCA0CPH3 DATA  0FDH   ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 3 - HIGH BYTE
  00FE          +1   138     PCA0CPH4 DATA  0FEH   ; CAPTURE/COMPARE REGISTER FOR PCA 0 MODULE 4 - HIGH BYTE
  00FF          +1   139     WDTCN    DATA  0FFH   ; WATCHDOG TIMER CONTROL 
                +1   140     ;
                +1   141     ;------------------------------------------------------------------------------
                +1   142     ;BIT DEFINITIONS
                +1   143     ;
                +1   144     ; TCON 88H
  0088          +1   145     IT0      BIT   TCON.0 ; EXT. INTERRUPT 0 TYPE
  0089          +1   146     IE0      BIT   TCON.1 ; EXT. INTERRUPT 0 EDGE FLAG
  008A          +1   147     IT1      BIT   TCON.2 ; EXT. INTERRUPT 1 TYPE
  008B          +1   148     IE1      BIT   TCON.3 ; EXT. INTERRUPT 1 EDGE FLAG
  008C          +1   149     TR0      BIT   TCON.4 ; TIMER 0 ON/OFF CONTROL
  008D          +1   150     TF0      BIT   TCON.5 ; TIMER 0 OVERFLOW FLAG
  008E          +1   151     TR1      BIT   TCON.6 ; TIMER 1 ON/OFF CONTROL
  008F          +1   152     TF1      BIT   TCON.7 ; TIMER 1 OVERFLOW FLAG
                +1   153     ;
                +1   154     ; SCON0 98H
  0098          +1   155     RI       BIT   SCON0.0 ; RECEIVE INTERRUPT FLAG
  0099          +1   156     TI       BIT   SCON0.1 ; TRANSMIT INTERRUPT FLAG
  009A          +1   157     RB8      BIT   SCON0.2 ; RECEIVE BIT 8
  009B          +1   158     TB8      BIT   SCON0.3 ; TRANSMIT BIT 8
  009C          +1   159     REN      BIT   SCON0.4 ; RECEIVE ENABLE
  009D          +1   160     SM2      BIT   SCON0.5 ; MULTIPROCESSOR COMMUNICATION ENABLE
  009E          +1   161     SM1      BIT   SCON0.6 ; SERIAL MODE CONTROL BIT 1
  009F          +1   162     SM0      BIT   SCON0.7 ; SERIAL MODE CONTROL BIT 0
                +1   163     ; 
                +1   164     ; IE A8H
  00A8          +1   165     EX0      BIT   IE.0   ; EXTERNAL INTERRUPT 0 ENABLE
  00A9          +1   166     ET0      BIT   IE.1   ; TIMER 0 INTERRUPT ENABLE
  00AA          +1   167     EX1      BIT   IE.2   ; EXTERNAL INTERRUPT 1 ENABLE
  00AB          +1   168     ET1      BIT   IE.3   ; TIMER 1 INTERRUPT ENABLE
  00AC          +1   169     ES       BIT   IE.4   ; SERIAL PORT INTERRUPT ENABLE
  00AD          +1   170     ET2      BIT   IE.5   ; TIMER 2 INTERRUPT ENABLE
  00AF          +1   171     EA       BIT   IE.7   ; GLOBAL INTERRUPT ENABLE
                +1   172     ;
                +1   173     ; IP B8H
  00B8          +1   174     PX0      BIT   IP.0   ; EXTERNAL INTERRUPT 0 PRIORITY
  00B9          +1   175     PT0      BIT   IP.1   ; TIMER 0 PRIORITY
  00BA          +1   176     PX1      BIT   IP.2   ; EXTERNAL INTERRUPT 1 PRIORITY
  00BB          +1   177     PT1      BIT   IP.3   ; TIMER 1 PRIORITY
  00BC          +1   178     PS       BIT   IP.4   ; SERIAL PORT PRIORITY
  00BD          +1   179     PT2      BIT   IP.5   ; TIMER 2 PRIORITY
                +1   180     ;
                +1   181     ; SMB0CN C0H
  00C0          +1   182     SMBTOE   BIT   SMB0CN.0 ; SMBUS 0 TIMEOUT ENABLE
  00C1          +1   183     SMBFTE   BIT   SMB0CN.1 ; SMBUS 0 FREE TIMER ENABLE
  00C2          +1   184     AA       BIT   SMB0CN.2 ; SMBUS 0 ASSERT/ACKNOWLEDGE FLAG
  00C3          +1   185     SI       BIT   SMB0CN.3 ; SMBUS 0 INTERRUPT PENDING FLAG
  00C4          +1   186     STO      BIT   SMB0CN.4 ; SMBUS 0 STOP FLAG
  00C5          +1   187     STA      BIT   SMB0CN.5 ; SMBUS 0 START FLAG
  00C6          +1   188     ENSMB    BIT   SMB0CN.6 ; SMBUS 0 ENABLE 
                +1   189     ;
A51 MACRO ASSEMBLER  ISD4004PLAY                                                          11/08/2005 16:12:09 PAGE     4

                +1   190     ; T2CON C8H
  00C8          +1   191     CPRL2    BIT   T2CON.0 ; CAPTURE OR RELOAD SELECT
  00C9          +1   192     CT2      BIT   T2CON.1 ; TIMER OR COUNTER SELECT
  00CA          +1   193     TR2      BIT   T2CON.2 ; TIMER 2 ON/OFF CONTROL
  00CB          +1   194     EXEN2    BIT   T2CON.3 ; TIMER 2 EXTERNAL ENABLE FLAG
  00CC          +1   195     TCLK     BIT   T2CON.4 ; TRANSMIT CLOCK FLAG
  00CD          +1   196     RCLK     BIT   T2CON.5 ; RECEIVE CLOCK FLAG
  00CE          +1   197     EXF2     BIT   T2CON.6 ; EXTERNAL FLAG
  00CF          +1   198     TF2      BIT   T2CON.7 ; TIMER 2 OVERFLOW FLAG
                +1   199     ;
                +1   200     ; PSW D0H
  00D0          +1   201     P        BIT   PSW.0  ; ACCUMULATOR PARITY FLAG
  00D1          +1   202     F1       BIT   PSW.1  ; USER FLAG 1
  00D2          +1   203     OV       BIT   PSW.2  ; OVERFLOW FLAG
  00D3          +1   204     RS0      BIT   PSW.3  ; REGISTER BANK SELECT 0
  00D4          +1   205     RS1      BIT   PSW.4  ; REGISTER BANK SELECT 1
  00D5          +1   206     F0       BIT   PSW.5  ; USER FLAG 0
  00D6          +1   207     AC       BIT   PSW.6  ; AUXILIARY CARRY FLAG
  00D7          +1   208     CY       BIT   PSW.7  ; CARRY FLAG
                +1   209     ;
                +1   210     ; PCA0CN D8H
  00D8          +1   211     CCF0     BIT   PCA0CN.0 ; PCA 0 MODULE 0 INTERRUPT FLAG
  00D9          +1   212     CCF1     BIT   PCA0CN.1 ; PCA 0 MODULE 1 INTERRUPT FLAG
  00DA          +1   213     CCF2     BIT   PCA0CN.2 ; PCA 0 MODULE 2 INTERRUPT FLAG
  00DB          +1   214     CCF3     BIT   PCA0CN.3 ; PCA 0 MODULE 3 INTERRUPT FLAG
  00DC          +1   215     CCF4     BIT   PCA0CN.4 ; PCA 0 MODULE 4 INTERRUPT FLAG
  00DE          +1   216     CR       BIT   PCA0CN.6 ; PCA 0 COUNTER RUN CONTROL BIT
  00DF          +1   217     CF       BIT   PCA0CN.7 ; PCA 0 COUNTER OVERFLOW FLAG
                +1   218     ;
                +1   219     ; ADC0CN E8H
  00E8          +1   220     AD0LJST  BIT   ADC0CN.0 ; ADC 0 RIGHT JUSTIFY DATA BIT
  00E9          +1   221     AD0WINT  BIT   ADC0CN.1 ; ADC 0 WINDOW COMPARE INTERRUPT FLAG
  00EA          +1   222     AD0STM0  BIT   ADC0CN.2 ; ADC 0 START OF CONVERSION MODE BIT 0
  00EB          +1   223     AD0STM1  BIT   ADC0CN.3 ; ADC 0 START OF CONVERSION MODE BIT 1
  00EC          +1   224     AD0BUSY  BIT   ADC0CN.4 ; ADC 0 BUSY FLAG
  00ED          +1   225     AD0INT   BIT   ADC0CN.5 ; ADC 0 CONVERISION COMPLETE INTERRUPT FLAG 
  00EE          +1   226     AD0TM    BIT   ADC0CN.6 ; ADC 0 TRACK MODE
  00EF          +1   227     AD0EN    BIT   ADC0CN.7 ; ADC 0 ENABLE
                +1   228     ;
                +1   229     ; SPI0CN F8H
  00F8          +1   230     SPIEN    BIT   SPI0CN.0 ; SPI 0 SPI ENABLE
  00F9          +1   231     MSTEN    BIT   SPI0CN.1 ; SPI 0 MASTER ENABLE
  00FA          +1   232     SLVSEL   BIT   SPI0CN.2 ; SPI 0 SLAVE SELECT
  00FB          +1   233     TXBSY    BIT   SPI0CN.3 ; SPI 0 TX BUSY FLAG
  00FC          +1   234     RXOVRN   BIT   SPI0CN.4 ; SPI 0 RX OVERRUN FLAG
  00FD          +1   235     MODF     BIT   SPI0CN.5 ; SPI 0 MODE FAULT FLAG
  00FE          +1   236     WCOL     BIT   SPI0CN.6 ; SPI 0 WRITE COLLISION FLAG
  00FF          +1   237     SPIF     BIT   SPI0CN.7 ; SPI 0 INTERRUPT FLAG
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