galil_1800.c

galil1800 linux驱动程序演示

/* Copyright (C) 2002, 2003 Shell Technologies s.r.l.
   Authors: Marco Cesati <[e-mail]>
   
   driver for the Galil 1800 PCI motion controllers (http://www.galilmc.com/)
   
   loosely inspired by Galil's own Linux driver, as well as by a bunch of
   PCI drivers in the kernel source code
   
   This program is free software; you can redistribute  it and/or modify it
   under  the terms of  the GNU General  Public License as published by the
   Free Software Foundation;  either version 2 of the  License, or (at your
   option) any later version.
   
   Programmers list: 
   
   		MC: Marco Cesati
        
   Revision history:
   
     8 November 2002 - ver. 0.1 (MC): first release (kernel 2.4.19)
    12 December 2002 - ver. 0.2 (MC): support for secondary communication
                                             channel (kernel 2.4.20)
    13 December 2002 - ver. 0.3 (MC): ioctl() command to fetch interrupt
                                             stack
    30 January 2003  - ver. 0.4 (MC): fixed race condition in 
                                             galil_1800_send_signals()
*/

#include <linux/version.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/hardirq.h>

#include "galil_ioctl.h"

#define GALIL_1800_MODULE_NAME "Galil 1800"
#define PFX GALIL_1800_MODULE_NAME ": "

#define GALIL_1800_READ_TIMEOUT      10 /* ticks (1 tick = ~10ms) */
#define GALIL_1800_WRITE_TIMEOUT     10 /* ticks (1 tick = ~10ms) */

#define PLX_PCI_VENDOR_ID            0x10B5
#define PLX_PCI_DEVICE_ID            0x9050
#define GALIL_SUB_VENDOR             0x1079
#define GALIL_SUB_DEVICE_1800        0x1800

#define GALIL_1800_READ_FIFO_SIZE    256
#define GALIL_1800_WRITE_FIFO_SIZE   256
#define GALIL_1800_READ_FIFO2_SIZE   256


/* main device driver descriptor, one for every registered device */

struct galil_1800_state {
    struct list_head devs;       /* list of Galil 1800 devices */
    struct pci_dev *dev;         /* the PCI main device descriptor */
    unsigned long io;            /* base I/O address */
    unsigned long ctrl_reg;      /* control register I/O address */
    unsigned long irq_reg;       /* irq register I/O address */
    unsigned long chan2_reg;     /* secondary channel register I/O address */
    unsigned int irq;            /* IRQ line number */
    int index;                   /* index (== minor number) of the device */
    int opens;                   /* how many processes have opened the device
                                    file; protected by open_sem */
    struct semaphore open_sem;   /* semaphore for concurrent open requests */
    mode_t open_mode;            /* the read/write mode of the device file */
    wait_queue_head_t open_wait; /* waiting for an open to complete */
    spinlock_t hwlock;           /* spin lock for low-level fiddling */
    rwlock_t siglock;            /* r/w spin lock for the list of processes */
    unsigned char irqstack[GALIL_1800_IRQ_STACK_SZ]; /* stack of IRQ values */
    int irqstack_sz;             /* current number of values in the stack */
    spinlock_t irqlock;          /* spin lock for the interrupt handler */
    struct list_head siglist;    /* processes to be signaled on interrupts */
    struct tasklet_struct tlet;  /* tasklet handling the siglist list of 
                                    processes to be signaled */
    unsigned long serial;        /* the serial number read from the device */
};

/* element of the list of processes to be signaled on interrupt occurrences */

struct galil_1800_siglist_t {
    struct list_head list;    /* pointers for the next and previous elements */
    struct task_struct * owner;  /* pointer to the process descriptor */
    pid_t pid;               /* pid of the process descriptor (safety check) */
    char *ubuf;                  /* buffer in the User Mode space for the interrupt values */
};

#define GALIL_1800_READ_REG(A)         ((A)->io)
#define GALIL_1800_WRITE_REG(A)        GALIL_1800_READ_REG(A)
#define GALIL_1800_CONTROL_REG(A)      ((A)->ctrl_reg)
#define GALIL_1800_IRQ_REG(A)          ((A)->irq_reg)
#define GALIL_1800_RESET_REG(A)        GALIL_1800_IRQ_REG(A)
#define GALIL_1800_2CHAN_REG(A)        ((A)->chan2_reg)

#define GALIL_1800_FIFO_FULL_FLAG      (0x01)
#define GALIL_1800_FIFO_HALF_FLAG      (0x02)
#define GALIL_1800_FIFO_EMPTY_FLAG     (0x04)
#define GALIL_1800_FIFO2_BUSY_FLAG     (0x08)
#define GALIL_1800_FIFO2_FREEZE_FLAG   (0x10)
#define GALIL_1800_IRQ_STATUS_FLAG     (0x20)
#define GALIL_1800_IRQ_ENABLE_FLAG     (0x40)
#define GALIL_1800_FIFO2_EMPTY_FLAG    (0x80)

/* the list of galil_1800_state descriptors */
static LIST_HEAD(galil_1800_devs);

/* a read/write spin lock that protects the above list in MP */
static rwlock_t galil_1800_devs_lock = RW_LOCK_UNLOCKED;

/* index (minor number) of the next device yet to be registered */
static unsigned int devindex = 0;

/* major number of associated device files */
static int major = -1;


/* 
   readwrite == 0: clear both read and write FIFO
   readwrite == 1: clear read FIFO only
   readwrite == 2: clear write FIFO only
*/

static inline void __galil_1800_clear_FIFO(struct galil_1800_state *dev, 
                                           int readwrite)
{
    char mask = (!readwrite ? 6 : (readwrite == 1 ? 2 : 4));
    outb(mask, GALIL_1800_RESET_REG(dev));    
}

static inline void galil_1800_clear_FIFO(struct galil_1800_state *dev, 
                                         int readwrite)
{
    unsigned long flags;
    spin_lock_irqsave(&dev->hwlock, flags);
    __galil_1800_clear_FIFO(dev, readwrite);
    spin_unlock_irqrestore(&dev->hwlock, flags);
}

static inline void galil_1800_enable_IRQ(struct galil_1800_state *dev)
{
    char t;
    unsigned long flags;
    
    spin_lock_irqsave(&dev->hwlock, flags);
     (void) inb(GALIL_1800_IRQ_REG(dev)); /* useless ?! */
    t = inb(GALIL_1800_CONTROL_REG(dev));
     outb(t|GALIL_1800_IRQ_ENABLE_FLAG, GALIL_1800_CONTROL_REG(dev));
     (void) inb(GALIL_1800_IRQ_REG(dev)); /* useless ?! */
    spin_unlock_irqrestore(&dev->hwlock, flags);
}

static inline void galil_1800_disable_IRQ(struct galil_1800_state *dev)
{
    unsigned long flags;
    char t;
    
    spin_lock_irqsave(&dev->hwlock, flags);
    t = inb(GALIL_1800_CONTROL_REG(dev)) & ~GALIL_1800_IRQ_ENABLE_FLAG;
    outb(t, GALIL_1800_CONTROL_REG(dev));
    spin_unlock_irqrestore(&dev->hwlock, flags);
}

/* Wait for a byte in the Read FIFO, or until a timeout occurs.
   Return 1 if a byte is available in the FIFO, 0 otherwise. 
   Interrupts MUST be enabled, or the kernel will freeze */

static inline int galil_1800_may_read(struct galil_1800_state *dev)
{
    unsigned long timeout = jiffies + GALIL_1800_READ_TIMEOUT;
    
    do {
        char t = inb(GALIL_1800_CONTROL_REG(dev)) & GALIL_1800_FIFO_EMPTY_FLAG;
        if (!t)
            return 1;
    } while (jiffies < timeout);
    return 0;
}

/* Wait for a free slot in the Write FIFO, or until a timeout occurs.
   Return 2 if FIFO is less than half full (at least 128 free slots),
   1 if a slot is available in the FIFO, 0 otherwise.
   Interrupts MUST be enabled, or the kernel will freeze */

static inline int galil_1800_may_write(struct galil_1800_state *dev)
{
    unsigned long timeout = jiffies + GALIL_1800_WRITE_TIMEOUT;
    
    do {
        char t = inb(GALIL_1800_CONTROL_REG(dev));
        if (!(t & GALIL_1800_FIFO_HALF_FLAG))
            return 2;
        if (!(t & GALIL_1800_FIFO_FULL_FLAG))
            return 1;
    } while (jiffies < timeout);
    return 0;    
}

/* Secondary Communication Channel: 

    - on DMC-1800, SCC can be used in polling FIFO mode only: data goes in
      the secondary FIFO of the controller, and then transferred to the UM
      address space by the driver
    - SCC is not active by default, it must be enabled by using the DR command
      with a negative argument -n (2^n samples between updates)
    - DR0 command disables SCC
    - SCC provide information at a fixed rate about position, position error,
      auxiliary position, velocity, torque, axis status, input line status,
      output line status, segment count for coordinate moves, and controller
      status
    - official docs are particularly obscure about SCC in 1800 devices, as 
      they fail in stating the differences between 1800 and 1802 devices;
      some information has been gathered from the buggy Galil original driver
    - our handshake procedure for accessing the secondary FIFO:
        1. "wait for data": read GALIL_1800_FIFO2_EMPTY_FLAG bit in 
           GALIL_1800_CONTROL_REG until it is equal to 0
        2. "freeze 2nd FIFO": set GALIL_1800_FIFO2_FREEZE_FLAG bit in
           GALIL_1800_CONTROL_REG
        3. "wait for complete": read GALIL_1800_FIFO2_BUSY_FLAG bit in 
           GALIL_1800_CONTROL_REG until it is equal to 0
        4. "fetch data": read byte at GALIL_1800_2CHAN_REG
        5. "check for data": read GALIL_1800_FIFO2_EMPTY_FLAG bit in 
           GALIL_1800_CONTROL_REG; if it is equal to 0, goto step 4.
        6. "unfreeze 2nd FIFO": clear GALIL_1800_FIFO2_FREEZE_FLAG bit in
           GALIL_1800_CONTROL_REG
      that's different from the procedure in the Galil original driver, and it's
      different from what's described in the official docs, but it has a slightly
      better chance to work, IMHO
*/
    
/* Wait for a byte in the secondary FIFO, or until a timeout occurs.
   Return 1 if a byte is available in the 2nd FIFO, 0 otherwise. 
   Interrupts MUST be enabled, or the kernel will freeze */

static inline int galil_1800_may_read_FIFO2(struct galil_1800_state *dev)
{
    unsigned long timeout = jiffies + GALIL_1800_READ_TIMEOUT;
    
    do {
        char t = inb(GALIL_1800_CONTROL_REG(dev)) & GALIL_1800_FIFO2_EMPTY_FLAG;
        if (!t)
            return 1;
    } while (jiffies < timeout);
    return 0;
}

/* Freeze and unfreeze the secondary communication channel */

static inline void galil_1800_freeze_FIFO2(struct galil_1800_state *dev)
{
 	char t = inb(GALIL_1800_CONTROL_REG(dev));
    t |= GALIL_1800_FIFO2_FREEZE_FLAG;
    outb(t, GALIL_1800_CONTROL_REG(dev));   
}

static inline void galil_1800_unfreeze_FIFO2(struct galil_1800_state *dev)
{
 	char t = inb(GALIL_1800_CONTROL_REG(dev));
    t &= ~GALIL_1800_FIFO2_FREEZE_FLAG;
    outb(t, GALIL_1800_CONTROL_REG(dev));
}

/* Wait until the controller ends transferring a data in the 2nd FIFO */

static inline void galil_1800_wait_transfer_FIFO2(struct galil_1800_state *dev)
{
	char t;
    
    do {
        t = inb(GALIL_1800_CONTROL_REG(dev)) & GALIL_1800_FIFO2_BUSY_FLAG;
    } while (t);    
}

/* Read from the secondary communication channel (2nd FIFO)
   - data are written in %buf%, a preallocated buffer of size %max%
   - return the number of bytes read (even 0) */

static inline int galil_1800_read_FIFO2(struct galil_1800_state *dev, 
                                        char *buf, int max)
{
	char *p = buf;
    char t;
    int n = 0;
	
    if (!galil_1800_may_read_FIFO2(dev))
        return n;
	galil_1800_freeze_FIFO2(dev);
	galil_1800_wait_transfer_FIFO2(dev);
	do {
        t = inb(GALIL_1800_2CHAN_REG(dev));
        *p++ = t;
        ++n;
        t = inb(GALIL_1800_CONTROL_REG(dev)) & GALIL_1800_FIFO2_EMPTY_FLAG;
    } while (!t && n<max);
    galil_1800_unfreeze_FIFO2(dev);
	return n;                
}

/* This feature is undocumented, info from the Galil's Linux driver. 
   It appears that they would use the S/N of their cards as a "private key"
   known only to licensed user. Of course, this is yet another example of the
   "security by hiding" approach, which is very weak and useless for any
   practical purpose. Anyway, Galil has published the source code of its 
   Linux driver... */

/* Return <0 in case of errors, 0 otherwise. 
  The serial number is written into %buf% */
 
static int galil_1800_get_serial_number(struct galil_1800_state *dev, 
                                        char *buf)
{
    unsigned long flags;
    int t, i;
    unsigned long tot = 0;
    char *p = buf;
    
    if (!buf)
        return -EINVAL;
        
    galil_1800_clear_FIFO(dev, 0);
    
    t = galil_1800_may_write(dev);
    
    if (t == 0 || t == 1) {
        printk(KERN_ERR PFX "cannot flush the Write FIFO (code=%d) \n", t);
        return -ENOSPC;
    }

    spin_lock_irqsave(&dev->hwlock, flags);    
    outb( 'M',  GALIL_1800_WRITE_REG(dev) );
    outb( 'G',  GALIL_1800_WRITE_REG(dev) );
    outb( '_',  GALIL_1800_WRITE_REG(dev) );
    outb( 'B',  GALIL_1800_WRITE_REG(dev) );
    outb( 'N',  GALIL_1800_WRITE_REG(dev) );
    outb( '\r', GALIL_1800_WRITE_REG(dev) );
    spin_unlock_irqrestore(&dev->hwlock, flags);
    
    for (i=60; i>0; --i) {
        char c;
        
        if (!galil_1800_may_read(dev)) {
            printk(KERN_INFO PFX "waiting for serial number on Read FIFO\n");
            ++i;
            schedule();
            continue;
        }
        c = inb(GALIL_1800_READ_REG(dev));
        if (c == '.' || c == 0x0d)
            break;
        if (c >= '0' && c <= '9')
            tot = tot * 10 + c - '0';
        *p++ = c;
    }
    
    if (!i) {
    	printk(KERN_INFO PFX "device #%d didn't return its serial number\n", 
                             dev->index);
        return -1;   
    }

    *p = '\0';
    
    if (dev->serial != tot) {
        printk(KERN_INFO PFX "device #%d has serial number %lu (\"%s\")\n", 
                dev->index, tot, buf);
        dev->serial = tot;
    }
    return 0;
}


/* This is the interrupt handler.
   It sends a signal to any process in the siglist.
   Actually, this is done later in a deferrable function 
    (galil_1800_send_signals()). */

static void galil_1800_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
    struct galil_1800_state *dev = dev_id;
    unsigned long flags;
    unsigned char status, t;
    int i;
    
    spin_lock_irqsave(&dev->hwlock, flags);

#if 0
    /* tech docs are not straightforward on how to get the interrupt status;
     in particular, should we write 0x06 in GALIL_1800_IRQ_REG before 
     reading the status? */
    
    outb(0x06, GALIL_1800_IRQ_REG(dev));
#endif
    
    status = inb(GALIL_1800_IRQ_REG(dev));
    t = inb(GALIL_1800_CONTROL_REG(dev));
    outb(t | GALIL_1800_IRQ_STATUS_FLAG, GALIL_1800_CONTROL_REG(dev));
    spin_unlock_irqrestore(&dev->hwlock, flags);
    
    if (!(t & GALIL_1800_IRQ_STATUS_FLAG))
        return;    /* shared interrupt raised by someone else */
    
    
    /* save the status value in the device descriptor's stack */

    i = dev->irqstack_sz++;
    if (i < GALIL_1800_IRQ_STACK_SZ)
        dev->irqstack[i] = status;
    else {
         printk(KERN_INFO PFX
               "IRQ stack is full, discarding value...\n");
        dev->irqstack_sz = GALIL_1800_IRQ_STACK_SZ;
    }

    /* schedule execution of galil_1800_send_signals() */
    
    tasklet_schedule(&dev->tlet);
}

static void galil_1800_send_signals(unsigned long device)
{
    struct galil_1800_state * dev = (struct galil_1800_state *) device;
    struct siginfo sinfo;
    struct list_head *list;
    struct list_head *head = &dev->siglist;
    struct galil_1800_siglist_t *elem;
    unsigned long flags;
    int sz, i;
    
    sinfo.si_signo = SIGUSR1;
    sinfo.si_errno = 0;

    sz = dev->irqstack_sz;    /* should irqstack_sz be atomic_t ? */

    read_lock(&dev->siglock); /* it's safe to leave interrupts enabled, 
                                 because no asynchronous function
                                 (interrupt handler or deferrable 
                                 function) gets the write siglock */
    list_for_each(list, head) {
         elem = list_entry(list, struct galil_1800_siglist_t, list);
         if (copy_to_user(elem->ubuf, dev->irqstack, sz))
             printk(KERN_ERR PFX "error while copying irq values, PID=%d buffer=%p\n",
                elem->pid, elem->ubuf);
         sinfo.si_code = sz;
         send_sig_info(SIGUSR1, &sinfo, elem->owner);
    }