gpif.c

The purpose of this code is to demonstrate how to utilize EZUSB FX GPIF interface.

    EA = 0;                  // protect DMA from interrupts occurring in Block0
    DMAGO = 0xFF;
    while( !( DMAGO & 0x80 ) )
    {
       ;                     // wait here for the DMA to complete
    }
    EA = 1;                  // Enable interrupts...
  }
}

Peripheral_DMAtoAOUTDATA( BYTE xdata *pEndpSrc, BYTE len )
{
  DMALEN = len;
  // the DMA engine will actually transfer 256 bytes of data when DMALEN=0
  if( DMALEN == 0x00 )
  {  // DO NOT DMA the data...
    // ...handle special case for zero len pkt...
  }
  else
  {
    DMASRC = pEndpSrc;       // Typically points to endp buffer
    DMADEST = &AOUTDATA;     // point to FIFO-A
    EA = 0;                  // protect DMA from interrupts occurring in Block0
    DMAGO = 0xFF;
    while( !( DMAGO & 0x80 ) )
    {
       ;                     // wait here for the DMA to complete
    }
    EA = 1;                  // Enable interrupts...
  }
}

Peripheral_SetAddress( BYTE gaddr )
{
  GPIFADRL = gaddr;
}

Peripheral_SetAOUTFIFOGPIFTC( BYTE xfrcnt )
{
  AOUTTC = xfrcnt;
}

Peripheral_SetAINFIFOGPIFTC( BYTE xfrcnt )
{
  AINTC = xfrcnt;
}

// write byte(s) to PERIPHERAL, using GPIF and slave FIFOA
Peripheral_AFIFOByteWrite( void )
{
  BYTE axfr;
  
  while( !( IDLE_CS & 0x80 ) )      // poll IDLE_CS.7 Done bit
  {                                 // transaction completed
    ;
  }                                 // write to ATRIG initiates
  ATRIG = axfr;                     // ...FIFO -> GPIF transaction(s)
}

// read byte(s) from PERIPHERAL, using GPIF and slave FIFOA
Peripheral_AFIFOByteRead( void )
{
  BYTE axfr;

  while( !( IDLE_CS & 0x80 ) )      // poll IDLE_CS.7 GPIF Done bit
  {
    ;
  }                                 // read from ATRIG initiates
  axfr = ATRIG;                     // ...GPIF -> FIFO transaction(s)
}

// write byte to PERIPHERAL, using GPIF
bit Peripheral_SingleByteWrite( BYTE gaddr, BYTE gdata )
{
  BYTE transaction_err = 0x00;

  GPIFADRL = gaddr;                  // setup GPIF address ADR0-ADR5
  SGLDATLTRIG = gdata;               // initiate GPIF write transaction

  while( !( IDLE_CS & 0x80 ) )       // poll IDLE_CS.7 Done bit
  {
    if( ++transaction_err > TMOUT )  // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                   // error has occurred
    }
  }

  return( 1 );
}

// write word to PERIPHERAL, using GPIF
bit Peripheral_SingleWordWrite( BYTE gaddr, WORD gdata )
{
  BYTE transaction_err = 0x00;

  GPIFADRL = gaddr;                  // setup GPIF address ADR0-ADR5
  SGLDATH = gdata >> 8;
  SGLDATLTRIG = gdata;               // initiate GPIF write transaction

  while( !( IDLE_CS & 0x80 ) )       // poll IDLE_CS.7 Done bit
  {
    if( ++transaction_err > TMOUT )  // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                   // error has occurred
    }
  }

  return( 1 );
}

// read byte from PERIPHERAL, using GPIF
bit Peripheral_SingleByteRead( BYTE gaddr, BYTE xdata *gdata )
{
  BYTE g_data = 0x00;
  BYTE transaction_err = 0x00;

  GPIFADRL = gaddr;                  // setup GPIF address ADR0-ADR5
  g_data = SGLDATLTRIG;               // initiate GPIF read transaction

  while( !( IDLE_CS & 0x80 ) )       // poll IDLE_CS.7 Done bit
  {
    if( ++transaction_err > TMOUT )  // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                   // error has occurred
    }
  }

  *gdata = SGLDATLNTRIG;

  return( 1 );
}

// read word from PERIPHERAL, using GPIF
bit Peripheral_SingleWordRead( BYTE gaddr, WORD xdata *gdata )
{
  BYTE g_data = 0x00;
  BYTE transaction_err = 0x00;

  GPIFADRL = gaddr;                  // setup GPIF address ADR0-ADR5
  g_data = SGLDATLTRIG;               // initiate GPIF read transaction

  while( !( IDLE_CS & 0x80 ) )       // poll IDLE_CS.7 Done bit
  {
    if( ++transaction_err > TMOUT )  // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                   // error has occurred
    }
  }

  *gdata = ( ( WORD )SGLDATH << 8 ) | ( WORD )SGLDATLNTRIG;

  return( 1 );
}

// write word(s) to PERIPHERAL, using GPIF, DMA, and slave FIFOA
bit Peripheral_AFIFOWordWrite( BYTE gaddr, BYTE xfrcnt, BYTE xdata *outbuf )
{
  BYTE transaction_err = 0x00;

  GPIFADRL = gaddr;     // setup GPIF address ADR0-ADR5
  DMASRC = outbuf;       // Typically points to endp buffer
  DMADEST = &AOUTDATA;  // point to FIFO-A
  DMALEN = xfrcnt;
  EA = 0;               // protect DMA from interrupts occurring in Block0
  DMAGO = xfrcnt;
  AOUTTC = xfrcnt >> 1; // divide by 2 for 16 bit transactions
  ATRIG = xfrcnt;       // write to ATRIG initiates
                        // FIFO -> GPIF transaction(s)
  while( !( DMAGO & 0x80 ) )
  {
    ; // wait here for the DMA to complete
  }
  EA = 1;                           // Enable interrupts...

  while( !( IDLE_CS & 0x80 ) )      // poll IDLE_CS.7 Done bit
  {                                 // transaction completed
    if( ++transaction_err > TMOUT)  // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                  // error has occurred
    }
  }

  return( 1 );
}

// read word(s) from PERIPHERAL, using GPIF, DMA, and slave FIFOA
bit Peripheral_AFIFOWordRead( BYTE gaddr, BYTE xfrcnt, BYTE xdata *inbuf)
{
  BYTE transaction_err = 0x00;
  BYTE gxfr = 0x00;

  GPIFADRL = gaddr;                 // setup GPIF address ADR0-ADR5
  AINTC = xfrcnt >> 1;              // divide by 2 for 16 bit interface
  gxfr = ATRIG;                     // read from ATRIG initiates
                                    // GPIF -> FIFO transaction(s)
  while( !( IDLE_CS & 0x80 ) )      // poll IDLE_CS.7 GPIF Done bit
  {
    if( ++transaction_err > TMOUT ) // trap GPIF transaction for TMOUT
    {
      ABORT = 0xFF;
      return( 0 );                  // an error has occurred
    }
  }

  DMASRC = &AINDATA;                // point to FIFO-A
  DMADEST = inbuf;                  // Typically points to endp buffer
  DMALEN = xfrcnt;

  EA = 0;            // protect DMA from interrupts occurring in Block0
  DMAGO = xfrcnt;    // writing any value to DMAGO starts the DMA

  while( !( DMAGO & 0x80 ) )
  {
    ; // wait here for the DMA to complete
  }
  EA = 1;                           // Enable interrupts...

  return( 1 );
}

void main( void )
{
  WORD xdata wData;
  BYTE xdata bData;
  
  bit bResult;

  GpifInit();
  OtherInit();

  if(IFCONFIG&0x04) // If 16-bit mode
  { // illustrate use of efficient 16 bit functions
    bResult = Peripheral_SingleWordWrite(0x00, 0xAA55);
    bResult = Peripheral_SingleWordRead(0x00, &wData);
  }
  else
  {
  bResult = Peripheral_SingleByteWrite(0x00, 0xAA);
  bResult = Peripheral_SingleByteRead(0x00, &bData);
  }
}

#endif
// TESTING_GPIF