📄 os_core.s
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.file 1 "../../Source/os_core.c"
gcc2_compiled.:
__gnu_compiled_c:
.globl OSMapTbl
.rdata
.align 2
.type OSMapTbl,@object
OSMapTbl:
.byte 1
.byte 2
.byte 4
.byte 8
.byte 16
.byte 32
.byte 64
.byte 128
.size OSMapTbl,8
.globl OSUnMapTbl
.align 2
.type OSUnMapTbl,@object
OSUnMapTbl:
.byte 0
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 5
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 6
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 5
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 7
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 5
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 6
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 5
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 4
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.byte 3
.byte 0
.byte 1
.byte 0
.byte 2
.byte 0
.byte 1
.byte 0
.size OSUnMapTbl,256
.text
.align 2
.globl OSEventTaskRdy
.text
.ent OSEventTaskRdy
OSEventTaskRdy:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
move $11,$4
lbu $2,9($11)
lui $3,%hi(OSUnMapTbl) # high
addiu $3,$3,%lo(OSUnMapTbl) # low
addu $2,$2,$3
lbu $7,0($2)
addu $8,$11,4
addu $8,$8,$7
lbu $9,0($8)
lui $5,%hi(OSMapTbl) # high
addu $3,$9,$3
lbu $4,0($3)
addiu $5,$5,%lo(OSMapTbl) # low
addu $3,$4,$5
la $2,OSRdyTbl
addu $13,$7,$2
lbu $12,0($3)
sll $2,$7,3
addu $4,$4,$2
addu $7,$7,$5
nor $3,$0,$12
lui $10,%hi(OSTCBPrioTbl) # high
lbu $7,0($7)
andi $4,$4,0x00ff
and $9,$9,$3
addiu $10,$10,%lo(OSTCBPrioTbl) # low
andi $6,$6,0x00ff
sll $4,$4,2
sb $9,0($8)
nor $6,$0,$6
nor $5,$0,$7
.set noreorder
.set nomacro
bne $9,$0,$L5
addu $3,$4,$10
.set macro
.set reorder
lbu $2,9($11)
#nop
and $2,$2,$5
sb $2,9($11)
$L5:
lw $3,0($3)
#nop
lbu $2,18($3)
sh $0,16($3)
and $2,$2,$6
sw $0,12($3)
.set noreorder
.set nomacro
bne $2,$0,$L7
sb $2,18($3)
.set macro
.set reorder
lbu $3,OSRdyGrp
lbu $2,0($13)
or $3,$7,$3
or $2,$12,$2
sb $2,0($13)
sb $3,OSRdyGrp
$L7:
j $31
.end OSEventTaskRdy
.align 2
.globl OSEventTaskWait
.text
.ent OSEventTaskWait
OSEventTaskWait:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
lw $5,OSTCBCur
move $6,$4
lbu $4,21($5)
la $2,OSRdyTbl
addu $4,$4,$2
sw $6,12($5)
lbu $2,22($5)
lbu $3,0($4)
nor $2,$0,$2
and $3,$3,$2
addu $7,$6,4
.set noreorder
.set nomacro
bne $3,$0,$L9
sb $3,0($4)
.set macro
.set reorder
lbu $2,23($5)
lbu $3,OSRdyGrp
nor $2,$0,$2
and $3,$3,$2
sb $3,OSRdyGrp
$L9:
lbu $3,21($5)
lbu $4,22($5)
addu $3,$7,$3
lbu $2,0($3)
#nop
or $2,$2,$4
sb $2,0($3)
lw $4,OSTCBCur
lbu $2,9($6)
lbu $3,23($4)
#nop
or $2,$2,$3
.set noreorder
.set nomacro
j $31
sb $2,9($6)
.set macro
.set reorder
.end OSEventTaskWait
.align 2
.globl OSEventTO
.text
.ent OSEventTO
OSEventTO:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
lw $5,OSTCBCur
move $6,$4
lbu $3,21($5)
addu $4,$6,4
addu $4,$4,$3
lbu $2,22($5)
lbu $3,0($4)
nor $2,$0,$2
and $3,$3,$2
.set noreorder
.set nomacro
bne $3,$0,$L11
sb $3,0($4)
.set macro
.set reorder
lw $4,OSTCBCur
lbu $3,9($6)
lbu $2,23($4)
#nop
nor $2,$0,$2
and $3,$3,$2
sb $3,9($6)
$L11:
lw $2,OSTCBCur
#nop
sb $0,18($2)
lw $3,OSTCBCur
.set noreorder
.set nomacro
j $31
sw $0,12($3)
.set macro
.set reorder
.end OSEventTO
.align 2
.globl OSEventWaitListInit
.text
.ent OSEventWaitListInit
OSEventWaitListInit:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
sb $0,9($4)
addu $6,$4,4
move $5,$0
$L16:
addu $2,$5,1
addu $4,$6,$5
andi $5,$2,0x00ff
sltu $3,$5,2
.set noreorder
.set nomacro
bne $3,$0,$L16
sb $0,0($4)
.set macro
.set reorder
j $31
.end OSEventWaitListInit
.align 2
.globl OSInit
.text
.ent OSInit
OSInit:
.frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, extra= 0
.mask 0x80000000,-8
.fmask 0x00000000,0
subu $sp,$sp,24
sw $31,16($sp)
sw $0,OSTime
sb $0,OSIntNesting
sb $0,OSLockNesting
sb $0,OSTaskCtr
sb $0,OSRunning
sw $0,OSIdleCtr
sw $0,OSCtxSwCtr
sb $0,OSRdyGrp
move $5,$0
la $6,OSRdyTbl
$L23:
addu $2,$5,1
addu $4,$5,$6
andi $5,$2,0xffff
sltu $3,$5,2
.set noreorder
.set nomacro
bne $3,$0,$L23
sb $0,0($4)
.set macro
.set reorder
lui $2,%hi(OSTCBPrioTbl) # high
sb $0,OSPrioCur
sb $0,OSPrioHighRdy
sw $0,OSTCBHighRdy
sw $0,OSTCBCur
sw $0,OSTCBList
addiu $4,$2,%lo(OSTCBPrioTbl) # low
move $5,$0
$L28:
addu $2,$5,1
sll $3,$5,2
andi $5,$2,0xffff
addu $3,$3,$4
sltu $2,$5,13
.set noreorder
.set nomacro
bne $2,$0,$L28
sw $0,0($3)
.set macro
.set reorder
lui $2,%hi(OSTCBTbl+4) # high
addiu $6,$2,%lo(OSTCBTbl+4) # low
move $5,$0
li $8,24 # 0x18
addu $7,$6,20
$L33:
mult $5,$8
addu $2,$5,1
andi $5,$2,0xffff
sltu $4,$5,12
mflo $3
addu $2,$3,$7
addu $3,$3,$6
.set noreorder
.set nomacro
bne $4,$0,$L33
sw $2,0($3)
.set macro
.set reorder
lui $9,%hi(OSEventTbl) # high
lui $2,%hi(OSTCBTbl) # high
addiu $2,$2,%lo(OSTCBTbl) # low
addiu $6,$9,%lo(OSEventTbl) # low
sw $2,OSTCBFreeList
move $5,$0
sw $0,292($2)
li $8,12 # 0xc
addu $7,$6,12
$L38:
mult $5,$8
addu $3,$5,1
andi $5,$3,0xffff
mflo $2
addu $4,$2,$7
addu $2,$2,$6
.set noreorder
.set nomacro
beq $5,$0,$L38
sw $4,0($2)
.set macro
.set reorder
addiu $2,$9,%lo(OSEventTbl) # low
lui $4,%hi(OSTaskIdle) # high
lui $6,%hi(OSTaskIdleStk+2044) # high
addiu $4,$4,%lo(OSTaskIdle) # low
addiu $6,$6,%lo(OSTaskIdleStk+2044) # low
move $5,$0
sw $0,12($2)
sw $2,OSEventFreeList
.set noreorder
.set nomacro
jal OSTaskCreate
li $7,12 # 0xc
.set macro
.set reorder
lui $4,%hi(OSTaskStat) # high
lui $6,%hi(OSTaskStatStk+2044) # high
addiu $4,$4,%lo(OSTaskStat) # low
addiu $6,$6,%lo(OSTaskStatStk+2044) # low
move $5,$0
.set noreorder
.set nomacro
jal OSTaskCreate
li $7,11 # 0xb
.set macro
.set reorder
lw $31,16($sp)
#nop
.set noreorder
.set nomacro
j $31
addu $sp,$sp,24
.set macro
.set reorder
.end OSInit
.align 2
.globl OSIntEnter
.text
.ent OSIntEnter
OSIntEnter:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
#APP
mfc0 $2,$12 # Get status register
nop # and return it in $v0
srl $4,$2,1 # Clear the IE bit
sll $4,$4,1 # ...
mtc0 $4,$12 # Restore status register
#NO_APP
lbu $3,OSIntNesting
sw $2,vect_level
addu $3,$3,1
sb $3,OSIntNesting
la $2,vect_level
#APP
lw $2,0($2) # Get old interrupt mask
mfc0 $4,$12 # Get status register
and $2,$2,1 # Extract IE bit
or $4,$4,$2 # Merge it into the status register
srl $4,$4,1 # Clear the IE bit
sll $4,$3,1 # ...
mtc0 $4,$12 # Restore status register
#NO_APP
j $31
.end OSIntEnter
.align 2
.globl OSIntExit
.text
.ent OSIntExit
OSIntExit:
.frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, extra= 0
.mask 0x80000000,-8
.fmask 0x00000000,0
subu $sp,$sp,24
sw $31,16($sp)
#APP
mfc0 $4,$12 # Get status register
nop # and return it in $v0
srl $3,$4,1 # Clear the IE bit
sll $3,$3,1 # ...
mtc0 $3,$12 # Restore status register
#NO_APP
lui $2,%hi(OSUnMapTbl) # high
lbu $3,OSIntNesting
addiu $7,$2,%lo(OSUnMapTbl) # low
lbu $2,OSLockNesting
addu $3,$3,255
or $2,$3,$2
andi $2,$2,0x00ff
sw $4,vect_level
sb $3,OSIntNesting
.set noreorder
.set nomacro
bne $2,$0,$L49
lui $2,%hi(OSTCBPrioTbl) # high
.set macro
.set reorder
lbu $3,OSRdyGrp
la $4,OSRdyTbl
addu $3,$3,$7
lbu $5,0($3)
#nop
andi $3,$5,0x00ff
sb $5,OSIntExitY
addu $3,$3,$4
addiu $8,$2,%lo(OSTCBPrioTbl) # low
lbu $2,0($3)
sll $5,$5,3
addu $2,$2,$7
lbu $3,0($2)
lbu $6,OSPrioCur
addu $3,$3,$5
andi $2,$3,0x00ff
sb $3,OSPrioHighRdy
.set noreorder
.set nomacro
beq $2,$6,$L49
sll $2,$2,2
.set macro
.set reorder
lw $3,OSCtxSwCtr
addu $2,$2,$8
lw $4,0($2)
addu $3,$3,1
sw $3,OSCtxSwCtr
sw $4,OSTCBHighRdy
jal OSIntCtxSw
$L49:
la $2,vect_level
#APP
lw $2,0($2) # Get old interrupt mask
mfc0 $4,$12 # Get status register
and $2,$2,1 # Extract IE bit
or $4,$4,$2 # Merge it into the status register
srl $4,$4,1 # Clear the IE bit
sll $4,$3,1 # ...
mtc0 $4,$12 # Restore status register
#NO_APP
lw $31,16($sp)
#nop
.set noreorder
.set nomacro
j $31
addu $sp,$sp,24
.set macro
.set reorder
.end OSIntExit
.align 2
.globl OSSched
.text
.ent OSSched
OSSched:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
#APP
mfc0 $4,$12 # Get status register
nop # and return it in $v0
srl $3,$4,1 # Clear the IE bit
sll $3,$3,1 # ...
mtc0 $3,$12 # Restore status register
#NO_APP
lui $2,%hi(OSUnMapTbl) # high
addiu $6,$2,%lo(OSUnMapTbl) # low
lbu $3,OSLockNesting
lbu $2,OSIntNesting
sw $4,vect_level
or $3,$3,$2
bne $3,$0,$L54
lbu $3,OSRdyGrp
lui $2,%hi(OSTCBPrioTbl) # high
addu $3,$3,$6
lbu $4,0($3)
addiu $7,$2,%lo(OSTCBPrioTbl) # low
la $2,OSRdyTbl
addu $2,$4,$2
lbu $3,0($2)
sll $4,$4,3
addu $3,$3,$6
lbu $2,0($3)
lbu $5,OSPrioCur
addu $2,$2,$4
andi $3,$2,0x00ff
sb $2,OSPrioHighRdy
beq $3,$5,$L54
move $2,$3
sll $2,$2,2
lw $3,OSCtxSwCtr
addu $2,$2,$7
lw $4,0($2)
addu $3,$3,1
sw $3,OSCtxSwCtr
sw $4,OSTCBHighRdy
#APP
break uCOS
#NO_APP
$L54:
la $2,vect_level
#APP
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