msp430dcospec.h

tinyos-2.x.rar

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/**
 * Override default dco clock spec.
 * 
 * SMCLK runs on 1MHz for this platform, its * source may be the radio -- a
 * more reliable source.
 *
 * @author: Andreas Koepke ([e-mail])
 */


#ifndef MS430DCOSPEC_H
#define MS430DCOSPEC_H

#define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz)
#define ACLK_KHZ 32 // the ACLK rate in binary kHz
#endif