i2c_master.c

CNC.rar

//*****************************************************************************
//
// i2c_master.c - I2C master interface for the user interface microcontroller.
//
// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.
//
// Software License Agreement
//
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's microcontroller products.
//
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws.  All rights are reserved.  Any use in violation
// of the foregoing restrictions may subject the user to criminal sanctions
// under applicable laws, as well as to civil liability for the breach of the
// terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
//
// This is part of revision 220 of sw01246.
//
//*****************************************************************************

#include "hw_i2c.h"
#include "hw_ints.h"
#include "hw_memmap.h"
#include "hw_types.h"
#include "gpio.h"
#include "i2c.h"
#include "interrupt.h"

//*****************************************************************************
//
//! \page ui_i2c_master_intro Introduction
//!
//! The user interface microcontroller sends command to the main
//! microcontroller via an I2C link.  The I2C interface on the user interface
//! microcontroller is run in master mode; I2C writes are used to send
//! configuration and commands, and I2C reads are used to query status of the
//! CNC machine.
//!
//! The I2C interface is operated in interrupt driven mode so that it incurs a
//! minimal overhead to the remainder of the application.  Since the I2C
//! interface operates on byte per interrupt, special handling is required for
//! multi-byte commands and status.  A full command or configuration item is
//! constructed and provided for transmission, and the individual bytes are
//! written to the I2C slave on each interrupt from the I2C master.  For status
//! reads, a new byte is read from the I2C slave on each interrupt from the I2C
//! master and the data is stored in a buffer.
//!
//! The code for the I2C master interface is contained in
//! <tt>ui_micro/i2c_master.c</tt>, with <tt>ui_micro/i2c_master.h</tt>
//! containing the API definitions for use by the remainder of the application.
//
//*****************************************************************************

//*****************************************************************************
//
//! \defgroup ui_i2c_master_api Definitions
//! @{
//
//*****************************************************************************

//*****************************************************************************
//
//! The GPIO pin on port B that is used for the I2C clock signal.
//
//*****************************************************************************
#define I2C_SCL                 GPIO_PIN_2

//*****************************************************************************
//
//! The GPIO pin on port B that is used for the I2C data signal.
//
//*****************************************************************************
#define I2C_SDA                 GPIO_PIN_3

//*****************************************************************************
//
//! The current state of the interrupt handler state machine.  Must one of
//! #STATE_IDLE, #STATE_WRITE_NEXT, #STATE_WRITE_FINAL, #STATE_WRITE_FINISH,
//! #STATE_READ_NEXT, #STATE_READ_FINAL, or #STATE_READ_WAIT.
//
//*****************************************************************************
static volatile unsigned long g_ulState;

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine is idle.
//
//*****************************************************************************
#define STATE_IDLE              0

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine is in the middle of writing data to the I2C slave.
//
//*****************************************************************************
#define STATE_WRITE_NEXT        1

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine should write the final data byte to the I2C slave on the next
//! I2C master interrupt.
//
//*****************************************************************************
#define STATE_WRITE_FINAL       2

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine will be done writing data to the I2C slave on the next I2C
//! master interrupt.
//
//*****************************************************************************
#define STATE_WRITE_FINISH      3

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine is in the middle of reading data from the I2C slave.
//
//*****************************************************************************
#define STATE_READ_NEXT         4

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine should issue the final data read request from the I2C slave
//! on the next I2C master interrupt.
//
//*****************************************************************************
#define STATE_READ_FINAL        5

//*****************************************************************************
//
//! This I2C master state, for use in #g_ulState, indicates that the I2C master
//! state machine is waiting for the final byte of data to be returned from the
//! I2C slave.
//
//*****************************************************************************
#define STATE_READ_WAIT         6

//*****************************************************************************
//
//! A pointer to the data buffer containing the data to be transmitted to the
//! I2C slave, or where data read from the I2C slave should be stored.
//
//*****************************************************************************
static unsigned char *g_pucData;

//*****************************************************************************
//
//! A count of the number of bytes left to be transmitted to the I2C slave or
//! to be read from the I2C slave.
//
//*****************************************************************************
static unsigned long g_ulCount;

//*****************************************************************************
//
//! Handles the I2C master interrupt.
//!
//! This function is called when the I2C master generates an interrupt; it is
//! responsible for continuing or completing the I2C transfer, which occurs
//! one byte at a time per interrupt.
//!
//! \return None.
//
//*****************************************************************************
void
I2CIntHandler(void)
{
    //
    // Clear the I2C interrupt.
    //
    I2CMasterIntClear(I2C_MASTER_BASE);

    //
    // Determine what to do based on the current state.
    //
    switch(g_ulState)
    {
        //
        // The idle state.
        //
        case STATE_IDLE:
        {
            //
            // There is nothing to be done.
            //
            break;
        }

        //
        // The state for the middle of a burst write.
        //
        case STATE_WRITE_NEXT:
        {
            //
            // Write the next byte to the data register.
            //
            I2CMasterDataPut(I2C_MASTER_BASE, *g_pucData++);
            g_ulCount--;

            //
            // Continue the burst write.
            //
            I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);

            //
            // If there is one byte left, set the next state to the final write
            // state.
            //
            if(g_ulCount == 1)
            {
                g_ulState = STATE_WRITE_FINAL;
            }

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the final write of a burst sequence.
        //
        case STATE_WRITE_FINAL:
        {
            //
            // Write the final byte to the data register.
            //
            I2CMasterDataPut(I2C_MASTER_BASE, *g_pucData++);
            g_ulCount--;

            //
            // Finish the burst write.
            //
            I2CMasterControl(I2C_MASTER_BASE,
                             I2C_MASTER_CMD_BURST_SEND_FINISH);

            //
            // The next state is to wait for the burst write to complete.
            //
            g_ulState = STATE_WRITE_FINISH;

            //
            // This state is done.
            //
            break;
        }

        //
        // The state at the end of a write sequence.
        //
        case STATE_WRITE_FINISH:
        {
            //
            // The next state is the idle state.
            //
            g_ulState = STATE_IDLE;

            //
            // This state is done.
            //
            break;
        }

        //
        // The state for the middle of a burst read.
        //