stm32_eth.c

stm32-eth例子

  * @arg ETH_MAC_IT_MMCR : MMC receive interrupt  
  * @arg ETH_MAC_IT_MMC  : MMC interrupt 
  * @arg ETH_MAC_IT_PMT  : PMT interrupt 
  * @retval : The new state of ETHERNET MAC interrupt (SET or RESET).
  */
ITStatus ETH_GetMACITStatus(uint32_t ETH_MAC_IT)
{
  ITStatus bitstatus = RESET;
  /* Check the parameters */
  assert_param(IS_ETH_MAC_GET_IT(ETH_MAC_IT)); 
  if ((ETH->MACSR & ETH_MAC_IT) != (uint32_t)RESET)
  {
    bitstatus = SET;
  }
  else
  {
    bitstatus = RESET;
  }
  return bitstatus;
}

/**
  * @brief  Enables or disables the specified ETHERNET MAC interrupts.
  * @param ETH_MAC_IT: specifies the ETHERNET MAC interrupt sources to be
  *   enabled or disabled.
  *   This parameter can be any combination of the following values:
  * @arg ETH_MAC_IT_TST : Time stamp trigger interrupt 
  * @arg ETH_MAC_IT_PMT : PMT interrupt 
  * @param NewState: new state of the specified ETHERNET MAC interrupts.
  *   This parameter can be: ENABLE or DISABLE.
  * @retval : None
  */
void ETH_MACITConfig(uint32_t ETH_MAC_IT, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ETH_MAC_IT(ETH_MAC_IT));
  assert_param(IS_FUNCTIONAL_STATE(NewState));  
  
  if (NewState != DISABLE)
  {
    /* Enable the selected ETHERNET MAC interrupts */
    ETH->MACIMR &= (~(uint32_t)ETH_MAC_IT);
  }
  else
  {
    /* Disable the selected ETHERNET MAC interrupts */
    ETH->MACIMR |= ETH_MAC_IT;
  }
}

/**
  * @brief  Configures the selected MAC address.
  * @param MacAddr: The MAC addres to configure.
  *   This parameter can be one of the following values:
  * @arg ETH_MAC_Address0 : MAC Address0 
  * @arg ETH_MAC_Address1 : MAC Address1 
  * @arg ETH_MAC_Address2 : MAC Address2
  * @arg ETH_MAC_Address3 : MAC Address3
  * @param Addr: Pointer on MAC address buffer data (6 bytes).
  * @retval : None
  */
void ETH_MACAddressConfig(uint32_t MacAddr, uint8_t *Addr)
{
  uint32_t tmpreg;
  /* Check the parameters */
  assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr));
  
  /* Calculate the selectecd MAC address high register */
  tmpreg = ((uint32_t)Addr[5] << 8) | (uint32_t)Addr[4];
  /* Load the selectecd MAC address high register */
  (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) = tmpreg;
  /* Calculate the selectecd MAC address low register */
  tmpreg = ((uint32_t)Addr[3] << 24) | ((uint32_t)Addr[2] << 16) | ((uint32_t)Addr[1] << 8) | Addr[0];
 
  /* Load the selectecd MAC address low register */
  (*(__IO uint32_t *) (ETH_MAC_AddrLowBase + MacAddr)) = tmpreg;
}

/**
  * @brief  Get the selected MAC address.
  * @param MacAddr: The MAC addres to return.
  *   This parameter can be one of the following values:
  * @arg ETH_MAC_Address0 : MAC Address0 
  * @arg ETH_MAC_Address1 : MAC Address1 
  * @arg ETH_MAC_Address2 : MAC Address2
  * @arg ETH_MAC_Address3 : MAC Address3
  * @param Addr: Pointer on MAC address buffer data (6 bytes).
  * @retval : None
  */
void ETH_GetMACAddress(uint32_t MacAddr, uint8_t *Addr)
{
  uint32_t tmpreg;
  /* Check the parameters */
  assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr));
  
  /* Get the selectecd MAC address high register */
  tmpreg =(*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr));
 
  /* Calculate the selectecd MAC address buffer */
  Addr[5] = ((tmpreg >> 8) & (uint8_t)0xFF);
  Addr[4] = (tmpreg & (uint8_t)0xFF);
  /* Load the selectecd MAC address low register */
  tmpreg =(*(__IO uint32_t *) (ETH_MAC_AddrLowBase + MacAddr));
  /* Calculate the selectecd MAC address buffer */
  Addr[3] = ((tmpreg >> 24) & (uint8_t)0xFF);
  Addr[2] = ((tmpreg >> 16) & (uint8_t)0xFF);
  Addr[1] = ((tmpreg >> 8 ) & (uint8_t)0xFF);
  Addr[0] = (tmpreg & (uint8_t)0xFF);
}

/**
  * @brief  Enables or disables the Address filter module uses the specified
  *   ETHERNET MAC address for perfect filtering 
  * @param MacAddr: specifies the ETHERNET MAC address to be used for prfect filtering.
  *   This parameter can be one of the following values: 
  * @arg ETH_MAC_Address1 : MAC Address1 
  * @arg ETH_MAC_Address2 : MAC Address2
  * @arg ETH_MAC_Address3 : MAC Address3
  * @param NewState: new state of the specified ETHERNET MAC address use.
  *   This parameter can be: ENABLE or DISABLE.
  * @retval : None
  */
void ETH_MACAddressPerfectFilterCmd(uint32_t MacAddr, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ETH_MAC_ADDRESS123(MacAddr));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
    
  if (NewState != DISABLE)
  {
    /* Enable the selected ETHERNET MAC address for perfect filtering */
    (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) |= ETH_MACA1HR_AE;
  }
  else
  {
    /* Disable the selected ETHERNET MAC address for perfect filtering */
    (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) &=(~(uint32_t)ETH_MACA1HR_AE);
  }
}

/**
  * @brief  Set the filter type for the specified ETHERNET MAC address 
  * @param MacAddr: specifies the ETHERNET MAC address 
  *   This parameter can be one of the following values: 
  * @arg ETH_MAC_Address1 : MAC Address1 
  * @arg ETH_MAC_Address2 : MAC Address2
  * @arg ETH_MAC_Address3 : MAC Address3
  * @param Filter: specifies the used frame received field for comparaison 
  *   This parameter can be one of the following values: 
  * @arg ETH_MAC_AddressFilter_SA : MAC Address is used to compare 
  *   with the SA fields of the received frame.
  * @arg ETH_MAC_AddressFilter_DA : MAC Address is used to compare 
  *   with the DA fields of the received frame.
  * @retval : None
  */
void ETH_MACAddressFilterConfig(uint32_t MacAddr, uint32_t Filter)
{
  /* Check the parameters */
  assert_param(IS_ETH_MAC_ADDRESS123(MacAddr));
  assert_param(IS_ETH_MAC_ADDRESS_FILTER(Filter));
  
  if (Filter != ETH_MAC_AddressFilter_DA)
  {
    /* The selected ETHERNET MAC address is used to compare with the SA fields of the
       received frame. */
    (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) |= ETH_MACA1HR_SA;
  }
  else
  {
    /* The selected ETHERNET MAC address is used to compare with the DA fields of the
       received frame. */
    (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) &=(~(uint32_t)ETH_MACA1HR_SA);
  }
}

/**
  * @brief  Set the filter type for the specified ETHERNET MAC address 
  * @param MacAddr: specifies the ETHERNET MAC address 
  *   This parameter can be one of the following values: 
  * @arg ETH_MAC_Address1 : MAC Address1 
  * @arg ETH_MAC_Address2 : MAC Address2
  * @arg ETH_MAC_Address3 : MAC Address3
  * @param MaskByte: specifies the used address bytes for comparaison 
  *   This parameter can be any combination of the following values: 
  * @arg ETH_MAC_AddressMask_Byte6 : Mask MAC Address high reg bits [15:8].
  * @arg ETH_MAC_AddressMask_Byte5 : Mask MAC Address high reg bits [7:0].
  * @arg ETH_MAC_AddressMask_Byte4 : Mask MAC Address low reg bits [31:24].
  * @arg ETH_MAC_AddressMask_Byte3 : Mask MAC Address low reg bits [23:16].
  * @arg ETH_MAC_AddressMask_Byte2 : Mask MAC Address low reg bits [15:8].
  * @arg ETH_MAC_AddressMask_Byte1 : Mask MAC Address low reg bits [7:0].
  * @retval : None
  */
void ETH_MACAddressMaskBytesFilterConfig(uint32_t MacAddr, uint32_t MaskByte)
{
  /* Check the parameters */
  assert_param(IS_ETH_MAC_ADDRESS123(MacAddr));
  assert_param(IS_ETH_MAC_ADDRESS_MASK(MaskByte));
  
  /* Clear MBC bits in the selected MAC address  high register */
  (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) &=(~(uint32_t)ETH_MACA1HR_MBC);
  /* Set the selected Filetr mask bytes */
  (*(__IO uint32_t *) (ETH_MAC_AddrHighBase + MacAddr)) |= MaskByte;
}
/*------------------------  DMA Tx/Rx Desciptors -----------------------------*/

/**
  * @brief  Initializes the DMA Tx descriptors in chain mode.
  * @param DMATxDescTab: Pointer on the first Tx desc list 
  * @param TxBuff: Pointer on the first TxBuffer list
  * @param TxBuffCount: Number of the used Tx desc in the list
  * @retval : None
  */
void ETH_DMATxDescChainInit(ETH_DMADESCTypeDef *DMATxDescTab, uint8_t* TxBuff, uint32_t TxBuffCount)
{
  uint32_t i = 0;
  ETH_DMADESCTypeDef *DMATxDesc;
  
  /* Set the DMATxDescToSet pointer with the first one of the DMATxDescTab list */
  DMATxDescToSet = DMATxDescTab;
  /* Fill each DMATxDesc descriptor with the right values */   
  for(i=0; i < TxBuffCount; i++)
  {
    /* Get the pointer on the ith member of the Tx Desc list */
    DMATxDesc = DMATxDescTab + i;
    /* Set Second Address Chained bit */
    DMATxDesc->Status = ETH_DMATxDesc_TCH;  
       
    /* Set Buffer1 address pointer */
    DMATxDesc->Buffer1Addr = (uint32_t)(&TxBuff[i*ETH_MAX_PACKET_SIZE]);
    
    /* Initialize the next descriptor with the Next Desciptor Polling Enable */
    if(i < (TxBuffCount-1))
    {
      /* Set next descriptor address register with next descriptor base address */
      DMATxDesc->Buffer2NextDescAddr = (uint32_t)(DMATxDescTab+i+1);
    }
    else
    {
      /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ 
      DMATxDesc->Buffer2NextDescAddr = (uint32_t) DMATxDescTab;  
    }
  }
   
  /* Set Transmit Desciptor List Address Register */
  ETH->DMATDLAR = (uint32_t) DMATxDescTab;
}

/**
  * @brief  Initializes the DMA Tx descriptors in ring mode.
  * @param DMATxDescTab: Pointer on the first Tx desc list 
  * @param TxBuff1: Pointer on the first TxBuffer1 list 
  * @param TxBuff2: Pointer on the first TxBuffer2 list
  * @param TxBuffCount: Number of the used Tx desc in the list
  *   Note: see decriptor skip length defined in ETH_DMA_InitStruct
  *   for the number of Words to skip between two unchained descriptors.  
  * @retval : None
  */
void ETH_DMATxDescRingInit(ETH_DMADESCTypeDef *DMATxDescTab, uint8_t *TxBuff1, uint8_t *TxBuff2, uint32_t TxBuffCount)
{
  uint32_t i = 0;
  ETH_DMADESCTypeDef *DMATxDesc;
 
  /* Set the DMATxDescToSet pointer with the first one of the DMATxDescTab list */
  DMATxDescToSet = DMATxDescTab;
  /* Fill each DMATxDesc descriptor with the right values */  
  for(i=0; i < TxBuffCount; i++)
  {
    /* Get the pointer on the ith member of the Tx Desc list */
    DMATxDesc = DMATxDescTab + i;
    /* Set Buffer1 address pointer */
    DMATxDesc->Buffer1Addr = (uint32_t)(&TxBuff1[i*ETH_MAX_PACKET_SIZE]);
    
    /* Set Buffer2 address pointer */
    DMATxDesc->Buffer2NextDescAddr = (uint32_t)(&TxBuff2[i*ETH_MAX_PACKET_SIZE]);
    
    /* Set Transmit End of Ring bit for last descriptor: The DMA returns to the base
       address of the list, creating a Desciptor Ring */
    if(i == (TxBuffCount-1))
    {
      /* Set Transmit End of Ring bit */
      DMATxDesc->Status = ETH_DMATxDesc_TER;
    }
  }
   
  /* Set Transmit Desciptor List Address Register */
  ETH->DMATDLAR =  (uint32_t) DMATxDescTab;
}

/**
  * @brief  Checks whether the specified ETHERNET DMA Tx Desc flag is set or not.
  * @param DMATxDesc: pointer on a DMA Tx descriptor
  * @param ETH_DMATxDescFlag: specifies the flag to check.
  *   This parameter can be one of the following values:
  * @arg ETH_DMATxDesc_OWN : OWN bit: descriptor is owned by DMA engine
  * @arg ETH_DMATxDesc_IC  : Interrupt on completetion
  * @arg ETH_DMATxDesc_LS  : Last Segment
  * @arg ETH_DMATxDesc_FS  : First Segment
  * @arg ETH_DMATxDesc_DC  : Disable CRC
  * @arg ETH_DMATxDesc_DP  : Disable Pad
  * @arg ETH_DMATxDesc_TTSE: Transmit Time Stamp Enable
  * @arg ETH_DMATxDesc_TER : Transmit End of Ring
  * @arg ETH_DMATxDesc_TCH : Second Address Chained
  * @arg ETH_DMATxDesc_TTSS: Tx Time Stamp Status
  * @arg ETH_DMATxDesc_IHE : IP Header Error
  * @arg ETH_DMATxDesc_ES  : Error summary
  * @arg ETH_DMATxDesc_JT  : Jabber Timeout
  * @arg ETH_DMATxDesc_FF  : Frame Flushed: DMA/MTL flushed the frame due to SW flush
  * @arg ETH_DMATxDesc_PCE : Payload Checksum Error
  * @arg ETH_DMATxDesc_LCA : Loss of Carrier: carrier lost during tramsmission
  * @arg ETH_DMATxDesc_NC  : No Carrier: no carrier signal from the tranceiver
  * @arg ETH_DMATxDesc_LCO : Late Collision: transmission aborted due to collision
  * @arg ETH_DMATxDesc_EC  : Excessive Collision: transmission aborted after 16 collisions
  * @arg ETH_DMATxDesc_VF  : VLAN Frame
  * @arg ETH_DMATxDesc_CC  : Collision Count 
  * @arg ETH_DMATxDesc_ED  : Excessive Deferral
  * @arg ETH_DMATxDesc_UF  : Underflow Error: late data arrival from the memory
  * @arg ETH_DMATxDesc_DB  : Deferred Bit
  * @retval : The new state of ETH_DMATxDescFlag (SET or RESET).
  */
FlagStatus ETH_GetDMATxDescFlagStatus(ETH_DMADESCTypeDef *DMATxDesc, uint32_t ETH_DMATxDescFlag)
{
  FlagStatus bitstatus = RESET;
  /* Check the parameters */