📄 periph.lst
字号:
250 1 // Loop the data to the IN endpoint
251 1 for (i=0; i < OUT1BC; i++)
252 1 {
253 2 IN1BUF[i] = ~OUT1BUF[i];
254 2 }
255 1
256 1 // Arm the IN endpoint
257 1 IN1BC = i;
C51 COMPILER V5.50, PERIPH 26/07/00 13:53:27 PAGE 5
258 1
259 1 // Arm the OUT so it can receive the next packet
260 1 OUT1BC = 0;
261 1
262 1
263 1 // clear the IRQ
264 1 EZUSB_IRQ_CLEAR();
265 1 OUT07IRQ = bmEP1;
266 1 }
267
268 void ISR_Ep2in(void) interrupt 0
269 {
270 1 }
271
272 void ISR_Ep2out(void) interrupt 0
273 //HID code start
274 //This is the only Out endpoint used by the HID interface.
275 //Endpoint 1 IN is also used.
276 //Changed IN2 to IN1 in this routine
277 {
278 1 int i;
279 1
280 1 if (EPIO[IN1BUF_ID].cntrl & bmEPBUSY)
281 1 {
282 2 TOGCTL = 0x08 | IN1BUF_ID;
283 2 WRITEDELAY();
284 2 if (TOGCTL & 0x80)
285 2 TOGCTL |= 0x20;
286 2 else
287 2 TOGCTL |= 0x40;
288 2 }
289 1
290 1 // Loop the data to the IN endpoint
291 1 for (i=0; i < OUT2BC; i++)
292 1 {
293 2 // Send the complement of the received data back to the host.
294 2 IN1BUF[i] = ~OUT2BUF[i];
295 2 }
296 1
297 1 // Arm the IN endpoint
298 1 // I commented this line out and instead re-armed endpoint 1 after each In transfer
299 1 // in the In endpoint's ISR.
300 1 // This enables the host software to do In transfers only if desired.
301 1 //IN1BC = i;
302 1
303 1 // Arm the OUT endpoint so it can receive the next packet. (Write any value.)
304 1 OUT2BC = 0;
305 1
306 1 // clear the IRQ
307 1 EZUSB_IRQ_CLEAR();
308 1 OUT07IRQ = bmEP2;
309 1 }
310
311 void ISR_Ep3in(void) interrupt 0
312 {
313 1 }
314
315 void ISR_Ep3out(void) interrupt 0
316 {
317 1 int i;
318 1
319 1 if (EPIO[IN3BUF_ID].cntrl & bmEPBUSY)
320 1 {
321 2 TOGCTL = 0x08 | IN3BUF_ID;
322 2 WRITEDELAY();
323 2 if (TOGCTL & 0x80)
C51 COMPILER V5.50, PERIPH 26/07/00 13:53:27 PAGE 6
324 2 TOGCTL |= 0x20;
325 2 else
326 2 TOGCTL |= 0x40;
327 2 }
328 1
329 1 // Loop the data to the IN endpoint
330 1 for (i=0; i < OUT3BC; i++)
331 1 {
332 2 IN3BUF[i] = ~OUT3BUF[i];
333 2 }
334 1
335 1 // Arm the IN endpoint
336 1 IN3BC = i;
337 1
338 1 // Arm the OUT so it can receive the next packet
339 1 OUT3BC = 0;
340 1
341 1 // clear the IRQ
342 1 EZUSB_IRQ_CLEAR();
343 1 OUT07IRQ = bmEP3;
344 1 }
345
346 void ISR_Ep4in(void) interrupt 0
347 {
348 1 }
349
350 void ISR_Ep4out(void) interrupt 0
351 {
352 1 int i;
353 1
354 1 if (EPIO[IN4BUF_ID].cntrl & bmEPBUSY)
355 1 {
356 2 TOGCTL = 0x08 | IN4BUF_ID;
357 2 WRITEDELAY();
358 2 if (TOGCTL & 0x80)
359 2 TOGCTL |= 0x20;
360 2 else
361 2 TOGCTL |= 0x40;
362 2 }
363 1
364 1 // Loop the data to the IN endpoint
365 1 for (i=0; i < OUT4BC; i++)
366 1 {
367 2 IN4BUF[i] = ~OUT4BUF[i];
368 2 }
369 1
370 1 // Arm the IN endpoint
371 1 IN4BC = i;
372 1
373 1 // Arm the OUT so it can receive the next packet
374 1 OUT4BC = 0;
375 1
376 1 // clear the IRQ
377 1 EZUSB_IRQ_CLEAR();
378 1 OUT07IRQ = bmEP4;
379 1 }
380
381 void ISR_Ep5in(void) interrupt 0
382 {
383 1 }
384
385 void ISR_Ep5out(void) interrupt 0
386 {
387 1 int i;
388 1
389 1 if (EPIO[IN5BUF_ID].cntrl & bmEPBUSY)
C51 COMPILER V5.50, PERIPH 26/07/00 13:53:27 PAGE 7
390 1 {
391 2 TOGCTL = 0x08 | IN5BUF_ID;
392 2 WRITEDELAY();
393 2 if (TOGCTL & 0x80)
394 2 TOGCTL |= 0x20;
395 2 else
396 2 TOGCTL |= 0x40;
397 2 }
398 1
399 1 // Loop the data to the IN endpoint
400 1 for (i=0; i < OUT5BC; i++)
401 1 {
402 2 IN5BUF[i] = ~OUT5BUF[i];
403 2 }
404 1
405 1 // Arm the IN endpoint
406 1 IN5BC = i;
407 1
408 1 // Arm the OUT so it can receive the next packet
409 1 OUT5BC = 0;
410 1
411 1 // clear the IRQ
412 1 EZUSB_IRQ_CLEAR();
413 1 OUT07IRQ = bmEP5;
414 1 }
415
416 void ISR_Ep6in(void) interrupt 0
417 {
418 1 }
419
420 void ISR_Ep6out(void) interrupt 0
421 {
422 1 int i;
423 1
424 1 if (EPIO[IN6BUF_ID].cntrl & bmEPBUSY)
425 1 {
426 2 TOGCTL = 0x08 | IN6BUF_ID;
427 2 WRITEDELAY();
428 2 if (TOGCTL & 0x80)
429 2 TOGCTL |= 0x20;
430 2 else
431 2 TOGCTL |= 0x40;
432 2 }
433 1
434 1 // Loop the data to the IN endpoint
435 1 for (i=0; i < OUT6BC; i++)
436 1 {
437 2 IN6BUF[i] = ~OUT6BUF[i];
438 2 }
439 1
440 1 // Arm the IN endpoint
441 1 IN6BC = i;
442 1
443 1 // Arm the OUT so it can receive the next packet
444 1 OUT6BC = 0;
445 1
446 1 // clear the IRQ
447 1 EZUSB_IRQ_CLEAR();
448 1 OUT07IRQ = bmEP6;
449 1 }
450
451 void ISR_Ep7in(void) interrupt 0
452 {
453 1 }
454
455 void ISR_Ep7out(void) interrupt 0
C51 COMPILER V5.50, PERIPH 26/07/00 13:53:27 PAGE 8
456 {
457 1 int i;
458 1
459 1 if (EPIO[IN7BUF_ID].cntrl & bmEPBUSY)
460 1 {
461 2 TOGCTL = 0x08 | IN7BUF_ID;
462 2 WRITEDELAY();
463 2 if (TOGCTL & 0x80)
464 2 TOGCTL |= 0x20;
465 2 else
466 2 TOGCTL |= 0x40;
467 2 }
468 1
469 1 // Loop the data to the IN endpoint
470 1 for (i=0; i < OUT7BC; i++)
471 1 {
472 2 IN7BUF[i] = ~OUT7BUF[i];
473 2 }
474 1
475 1 // // BUGBUG If 63 bytes was written, inject an error
476 1 // if (OUT7BC == 63)
477 1 // {
478 1 // IN7BUF[3] = IN7BUF[4];
479 1 // }
480 1
481 1 // Arm the IN endpoint
482 1 IN7BC = i;
483 1
484 1 // Arm the OUT so it can receive the next packet
485 1 OUT7BC = 0;
486 1
487 1 // clear the IRQ
488 1 EZUSB_IRQ_CLEAR();
489 1 OUT07IRQ = bmEP7;
490 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1459 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 7 7
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -