processing_isr.asm

ADI-219x dsp的回声消除代码

/* **************************************************************************************************

				    AD1885 SPORT0 RX ECHO INTERRUPT SERVICE ROUTINE

Receives LINEIN input from the AD1885 via SPORT0, processes the data, and then transmits the audio data 
back out to the AD1885 Stereo DACs/Head-phone Outputs

Data is valid for every audio frame in this ISR.  Therefore, TAG slot info and ADC valid bit 
synchronization is not as critical, since the tag bits and ADC valid bits are being set by the AD1885 
and the DSP every time there is a new audio frame (and thus a new interrupt) Therefore, the RX 
Interrupt can be used for audio processing after codec initialization.  This makes it somewhat easier 
to initialize the codec.

Modified: 07/12/2001 - GJO

***************************************************************************************************** 

   Serial Port 0 Receive Interrupt Service Routine performs arithmetic computations on SPORT0 receive 
   data buffer (rx_buf) and sends results to SPORT0 transmit data buffer (tx_buf) 			     		
										     		
 rx_buf[16] - DSP SPORT recieve buffer
 Slot # Description                         	DSP Data Memory Address
 ------ --------------------------------------	-------------------------------------------------
 0		AD1885 Tag Phase						DM(rx_buf + 0) = DM(rx_buf + TAG_PHASE) 
 1      Status Address Port   					DM(rx_buf + 1) = DM(rx_buf + STATUS_ADDRESS_SLOT)
 2      Status Data Port   						DM(rx_buf + 2) = DM(rx_buf + STATUS_DATA_SLOT)
 3      Master PCM Capture (Record) Left Chan.	DM(rx_buf + 3) = DM(rx_buf + LEFT)
 4      Master PCM Capture Right Channel		DM(rx_buf + 4) = DM(rx_buf + RIGHT)
5-15 	Not Used

 tx_buf[16] - DSP SPORT transmit buffer
 Slot # Description                   				DSP Data Memory Address
 ------ --------------------------------------  --------------------------------------------------
 0		ADSP-219x Tag Phase						DM(tx_buf + 0) = DM(tx_buf + TAG_PHASE) 
 1      Command Address Port   					DM(tx_buf + 1) = DM(rx_buf + COMMAND_ADDRESS_SLOT) 
 2      Command Data Port  						DM(tx_buf + 2) = DM(rx_buf + COMMAND_DATA_SLOT) 
 3      Master PCM Playback Left Channel		DM(tx_buf + 3) = DM(rx_buf + LEFT) 
 4      Master PCM Playback Right Channel		DM(tx_buf + 4) = DM(rx_buf + RIGHT) 
5-15 	Not Used

*****************************************************************************************************/

#include 	<def2191.h>
#include 	"2191_EZ_KIT.h"
/*****************************************************************************************************/

/*****************************************************************************************************
   CONSTANT & MACRO DEFINITIONS
*****************************************************************************************************/
/* AD1885 TDM Timeslot Definitions */
#define		TAG_PHASE				0
#define		COMMAND_ADDRESS_SLOT	1
#define		COMMAND_DATA_SLOT		2
#define		STATUS_ADDRESS_SLOT		1
#define		STATUS_DATA_SLOT		2
#define		LEFT					3
#define		RIGHT					4

/* Left and Right ADC valid Bits used for testing of valid audio data in current TDM frame */
#define		M_Valid_ADC				15
#define		M_Left_ADC				12
#define		M_Right_ADC				11

/*****************************************************************************************************
   GLOBAL & EXTERNAL DECLARATIONS
*****************************************************************************************************/
.GLOBAL		Process_AD1885_Audio_Samples;
.GLOBAL		move_disp;
.EXTERN		tx_buf;
.EXTERN		rx_buf;
.EXTERN		beta;
.EXTERN		delay_val;
.EXTERN		sync_value;

/************************************************************************************************/
/* 				PROGRAM CODE																	*/
/************************************************************************************************/
.section/pm program;
Process_AD1885_Audio_Samples: 	
        ax0 = 0x8000;               				/* Clear all AC97 link Audio Output Frame slots */
        dm(tx_buf + TAG_PHASE) = ax0;				/* and set Valid Frame bit in SLOT '0' TAG phase  */
        ax0 = 0;
        dm(tx_buf + COMMAND_ADDRESS_SLOT) = ax0;
        dm(tx_buf + COMMAND_DATA_SLOT) = ax0;
        dm(tx_buf + LEFT) = ax0;
        dm(tx_buf + RIGHT) = ax0;

        ax0 = dm(rx_buf + TAG_PHASE);   /* Get ADC valid bits from tag phase slot*/
		AR = TSTBIT M_Valid_ADC of ax0;	/* Check Valid ADC frame bit */
		IF EQ JUMP Valid_Frame;   		

Check_AD1885_ADC_Left:                         		
		AR = TSTBIT M_Left_ADC of ax0;	/* Check Left ADC valid bit */
		IF EQ JUMP Valid_Frame;   		/* If valid data then process ADC sample */

	    AR = 0x9800;            		/* Set TX valid bits based on Recieve TAG info */
		dm(tx_buf + TAG_PHASE) = ar;


codec_rx:
	  sr0 = dm(rx_buf + LEFT);		/* Get data from CODEC0 */
echo_start:
      ay0 = dm(i0,m0);          	/* Read the oldest echo value */
	  dm(i0,m1) = sr0;          	/* Write over the oldest echo value */
	  dm(i1,m1) = ay0;          	/* Write over the oldest display value */
      
      call fir1;              	 	/* REGION FILTER to add echo*/

      ay0 = mr1;					/* Transfer to ALU */
      si = dm(i3,m1);				/* Generate delay for canceller */
      dm(i2,m1) = si;				/* Write over the oldest input value */
      
    call fir2;						/* Perform n-TAP transversal filter */

    ar = ay0 - mr1, ay0 = sr0;    	/* Compute error and get latest sample */
    mx0 = ar, ar = ar + ay0;      	/* Copy into mx and add latest sample */
  	dm(tx_buf + LEFT) = ar;  		/* Output Audio Sample*/

    call lms;               		/* Adapts n coefficients */

	jump Valid_Frame; 			/* Bypass Sync Pulse Code */

/****************** sync pulse code here ***************/
   	dis sr;  
	ax0=i6;                       /* AX0 equals the current position of DAG pointer in a_coeff buffer */
    ar=ax0-ay0;                   /* AY0 equals thevalue of the first location of a_coeff buffer */
    if eq jump write_sync_pulse;  /* If i6 points to the top of a_coeff buffer, write a sync pulse out to CODEC */
 	ena sr;
/********* original code here *********/
 	ena m_mode;
    mx1=pm(i6,m5);              /* Otherwise, write out a coefficient to scope */
	my0=4;
	mr=mx1*my0(ss);
    dm(tx_buf + RIGHT)=mr0;		/* Output adaptive filter coefficient to the scope */
	dis m_mode;
	jump Valid_Frame;

/**************************************/
write_sync_pulse:
  
    modify(i6,m5);              /* Increment DAG pointer to point to next location in a_coeff buffer */
    ax1=dm(sync_value);         /* AX1 = 0x7fff, which is the value of the sync pulse (full scale positive) */
  	dm(tx_buf + RIGHT)=ax1;     /*            write out a sync pulse to the buffer */

/* ...house keeping prior to RTI */
Valid_Frame:
	ar=3;						/* Clear TX Interrupts */
  	io(SP0DR_IRQ)=ar;
	IOPG = ay1;
	DIS SR;						/* Disable Secondary Registers */
	RTI;
	
Process_AD1885_Audio_Samples.end:


/************************************************************************************************/
/* 				FIR1 and FIR2 subroutines														*/
/************************************************************************************************/
/* FIR1 subroutine */
fir1:	cntr = m-1;               /* Perform m - tap x dispersive */
	  mr = 0, mx0 = dm(i1,m1), my0 = pm(i4,m5);
	  do sop1 until ce;
sop1:    mr = mr + mx0 * my0 (ss), mx0 = dm(i1,m1), my0 = pm(i4,m5);

      mr = mr + mx0 * my0 (rnd);
      sat mr;
      rts;

/* FIR2 subroutine */

fir2:  cntr = n-1;               /* Perform n - tap * dispersive */
      mr = 0, mx0 = dm(i2,m1), my0 = pm(i7,m5);
	  do sop2 until ce;
sop2:    mr = mr + mx0 * my0 (ss), mx0 = dm(i2,m1), my0 = pm(i7,m5);
      mr = mr + mx0 * my0(rnd);
      sat mr;
      rts;
               
/************************************************************************************************/
/* 				LMS Adaptive Filter 															*/
/************************************************************************************************/
lms:
	  my1 = dm(beta);
      cntr=n;
	  sr = mx0 * my1(rnd), mx0 = dm(i2,m1);         /* SR = error * beta */
	  mr = mx0 * sr1(rnd); ay0 = pm(i7,m5);		
     	do adapt until ce;
            ar = mr1 + ay0, mx0 = dm(i2,m1), ay0 = pm(i7,m7);	   	   	 
adapt:		mr = mx0 * sr1 (rnd),dm(i7,m4) = ar;	
  
	  modify(i2,m3);
      modify(i7,m7);
      rts;

/************************************************************************************************/
/* 				Beta Change																	*/
/************************************************************************************************/
move_disp:
	dis int; 
	ena sr;
	AX0 = IOPG;

	IOPG = General_Purpose_IO;
  	AY1 = 0x0010;
Wait_0_Depressed:
	AX1 = IO(FLAGC);
	AR =AX1 AND AY1;
	if NE jump Wait_0_Depressed;

    ax1 = dm(delay_val);    	/* Delay_val is zero the first time */
    m0 = ax1;               	/* and = delay_inc second time */
    ax1 = delay_inc;
    dm(delay_val) = ax1;
    modify(i3,m0);          	/* MOVE DISPERSIVE REGION */
    m0 = 0;

    my1 = 0x0360;           	/* BETA value = 1.17e-02 */
    dm(beta)= my1;


	IOPG = AX0;
	dis sr;
	ena int;
		
    rti;
    
move_disp.end:    
/************************************************************************************************/