readme.txt

BF-533 DSP视频输入接口的代码

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ADSP-BF533 EZ-KIT Lite Video Input Example

Analog Devices, Inc.
DSP Division
Three Technology Way
Norwood, MA 02062

Date Created:	3/27/03

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This directory contains an example ADSP-BF533 video input project that initializes SDRAM memory, 
sets up the DMA configuration registers to DMA data from PPI to the SDRAM, and configures the PPI 
port to ITU-656 input mode.


Files contained in this directory:

ADSP-BF533_PPI_656_Input_Mode.dpj	VisualDSP++ project file
BF533_EZ-KIT_DMA_Config.asm			assembly file for setting up DMA configuration registers
BF533_EZ-KIT_PPI_Config.asm			assembly file for setting up the PPI port
BF533_EZ-KIT_SDRAM_Config.asm		assembly file for initializing SDRAM control registers
BF533_EZ-KIT_ADV_reset.asm			assembly file for reset the ADV7183
BF533_EZ-KIT_flash_setup.asm		assembly file for setup the flash PROM
BF533_EZ-KIT_ISR.asm				assembly file for all ISRs
BF533_EZ-KIT_ISR_Config.asm			assembly file for initializing interrupts
main.asm							assembly file for calling all setup subroutines
startup.asm							assembly file for initial startup conditions
readme.txt							this project description file
BF533_PPI_656_input_mode			executable for this project
adsp-BF533_asm.ldf					linker description file
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CONTENTS

I.	FUNCTIONAL DESCRIPTION
II.	IMPLEMENTATION DESCRIPTION
III.	OPERATION DESCRIPTION


I.    FUNCTIONAL DESCRIPTION

The video input demo demonstrates the initialization of SDRAM memory 
and the use of the DMA and PPI to input an external analog CVBS signal on ADV7183s input AVIN1.
 
This example utilizes SDRAM memory to store the video data. The program sets up the DMA and PPI configuration registers for input 
mode.  for 8-bit, ITU-656, Stop Mode DMA.


II.   IMPLEMENTATION DESCRIPTION


The main file calls:

1. the BF533_EZ_KIT_flash_setup subroutine to initialize the flash.
2. the BF533_EZ_KIT_ADV_reset subroutine to toggle the reset pin of the ADV7183 via the gp flag of the flash.
3. A loop has been implemented to delay following calls. That gives the ADV7183 time to lock to the analog signal.
4. the BF533_EZ_KIT_ISR_Config to configure the interrupt service routine.
5. the BF533_EZ_KIT_SDRAM_Config to initialize SDRAM memory.
6. the BF533_EZ_KIT_DMA_Config to initialize the DMA in stop mode. The DMA stops after 50000 transfers. For endless runs change the DMA register.
7. the BF533_EZ_KIT_PPI_Config to initialize the PPI.


III.  OPERATION DESCRIPTION

- Open the project "ADSP-BF533_PPI_656_Input_Mode.dpj" in the VisualDSP Integrated Development Environment (IDDE).
- Under the "Project" tab, select "Build Project" (program is then loaded automatically into DSP).
- change switch #6 of SW3 to on of the ADSP-BF533 EZ-KIT Lite.
- Connect a video NTSC/PAL CVBS signal to the video input jack "at the bottom right" on the ADSP-BF533 EZ-KIT Lite.
- Select "Run" from the "Debug" tab on the menu bar of VisualDSP.
- Hit the stop button to halt the processor
- Open the Image Viewer "View/Debug Window/Image Viewer". Do following steps
- Type start address 0X1; Horizontal Pixels = 720; Vertical Pixels = 150; Pixels per bit = 8; Stride = 2
- Image format = Gray Scale; Hit OK.You should see the image taken