usbjoy32.asm

HID规范和一个基于CYPRESS FX2 的例子

;	Pin Connections
;
;			 -----------------------
;			| P0[0]		P0[4]	|
;			| P0[1]		P0[5]	|
;			| P0[2]		P0[6]	|
;			| P0[3] 		P0[7]	|
;			| P1[0]		P1[1]	|	
;			| P1[2]		P1[3]	|
;			| P1[4]		P1[5]	|
;			| P1[6]		P1[7]	|
;	GND		| VSS		    D+/SCLK | USB D+ / PS2 SCLK
;	GND		| VPP		   D-/SDATA	| USB D- / PS2 SDATA
;	PULLUP	| VREG		  VCC	| +5
;			| XTALIN	    XTALOUT	|
;			 -----------------------
;
;**************** assembler directives ***************** 

	CPU	63743			; The frameworks is written for
					; the CY7C63722/23 and CY7C63742/43.
					; User should change the CPU to the type of
					; chip being used.

	XPAGEON

	INCLUDE	"637xx_Regs.inc"
	INCLUDE	"Ram.h"
	
ep0_dmabuff:		equ	F8h		;endpoint 0 fifo
ep0_dmabuff0:		equ	ep0_dmabuff+0
ep0_dmabuff1:		equ	ep0_dmabuff+1
ep0_dmabuff2:		equ	ep0_dmabuff+2
ep0_dmabuff3:		equ	ep0_dmabuff+3
ep0_dmabuff4:		equ	ep0_dmabuff+4
ep0_dmabuff5:		equ	ep0_dmabuff+5
ep0_dmabuff6:		equ	ep0_dmabuff+6
ep0_dmabuff7:		equ	ep0_dmabuff+7

ep1_dmabuff:		equ	F0h		;endpoint 1 fifo
ep1_dmabuff0:		equ	ep1_dmabuff+0
ep1_dmabuff1:		equ	ep1_dmabuff+1
ep1_dmabuff2:		equ	ep1_dmabuff+2
ep1_dmabuff3:		equ	ep1_dmabuff+3
ep1_dmabuff4:		equ	ep1_dmabuff+4
ep1_dmabuff5:		equ	ep1_dmabuff+5
ep1_dmabuff6:		equ	ep1_dmabuff+6
ep1_dmabuff7:		equ	ep1_dmabuff+7

ep2_dmabuff:		equ	E8h		;endpoint 2 fifo
ep2_dmabuff0:		equ	ep2_dmabuff+0
ep2_dmabuff1:		equ	ep2_dmabuff+1
ep2_dmabuff2:		equ	ep2_dmabuff+2
ep2_dmabuff3:		equ	ep2_dmabuff+3
ep2_dmabuff4:		equ	ep2_dmabuff+4
ep2_dmabuff5:		equ	ep2_dmabuff+5
ep2_dmabuff6:		equ	ep2_dmabuff+6
ep2_dmabuff7:		equ	ep2_dmabuff+7

bmRequestType:		equ	ep0_dmabuff0	;aliasing for enpoint 0
bRequest:		equ	ep0_dmabuff1
wValuelo:		equ	ep0_dmabuff2
wValuehi:		equ	ep0_dmabuff3
wIndexlo:		equ	ep0_dmabuff4
wIndexhi:		equ	ep0_dmabuff5
wLengthlo:		equ	ep0_dmabuff6
wLengthhi:		equ	ep0_dmabuff7

button_debounce:	equ	36h
new_buttons:		equ	3Bh
hat_buttons:		equ	3Dh
fire_buttons:		equ	3Eh

ep0_temp_store:		equ 3Fh         ; Added by DEF for problem with P05
rollover_bit:		equ 40h
discharge_cnt:		equ 41h
capture_a_temp:		equ 42h
capture_b_temp:		equ 43h
always_zero:		equ 44h

x_R1_diff1_new:		equ 50h
x_R1_diff2_new:		equ 51h
x_R1_diff1_old:		equ 52h
x_R1_diff2_old:		equ 53h
x_R2_diff1_new:		equ 54h
x_R2_diff2_new: 	equ 55h
x_R2_diff1_old:		equ 56h
x_R2_diff2_old: 	equ 57h
x_R1_average:		equ 58h
x_R2_average: 		equ 59h
x_R12_Sum_MSB:		equ 5ah
x_R12_Sum_LSB:		equ 5bh
x_position:		equ 5ch

y_R1_diff1_new:		equ 60h
y_R1_diff2_new:		equ 61h
y_R1_diff1_old:		equ 62h
y_R1_diff2_old:		equ 63h
y_R2_diff1_new:		equ 64h
y_R2_diff2_new: 	equ 65h
y_R2_diff1_old:		equ 66h
y_R2_diff2_old: 	equ 67h
y_R1_average:		equ 68h
y_R2_average:		equ 69h
y_R12_Sum_MSB:		equ 6ah
y_R12_Sum_LSB:		equ 6bh
y_position:		equ 6ch

z_R1_diff1_new:		equ 70h
z_R1_diff2_new:		equ 71h
z_R1_diff1_old:		equ 72h
z_R1_diff2_old:		equ 73h
z_R2_diff1_new:		equ 74h
z_R2_diff2_new:		equ 75h
z_R2_diff1_old:		equ 76h
z_R2_diff2_old:		equ 77h
z_R1_average:		equ 78h
z_R2_average:		equ 79h
z_R12_Sum_MSB:		equ 7ah
z_R12_Sum_LSB:		equ 7bh
z_position:		equ 7ch

divider_top_hi:		equ 90h
divider_top_lo:		equ 91h
divider_bottom_hi:	equ 92h
divider_bottom_lo:	equ 93h
acc_a_hi:		equ 94h
acc_a_lo:		equ 95h
acc_b_hi:		equ 96h
acc_b_lo:		equ 97h
acc_c_hi:		equ 98h
acc_c_lo:		equ 99h
acc_d_hi:		equ 9ah
acc_d_lo:		equ 9bh
temp_div:		equ 9ch
RunningSum:		equ 9dh
RunningCarry:		equ 9eh
button_bits:		equ 9fh


MACRO SUB16x16 FirstValueHi, FirstValueLo, SecondValueHi, SecondValueLo, FinalValueHi, FinalValueLo
    mov a, [FirstValueLo]
    sub a, [SecondValueLo]
    mov [FinalValueLo], a
    mov a, [FirstValueHi]
    sbb a, [SecondValueHi]
    mov [FinalValueHi], a    
ENDM

MACRO AVERAGE8x8 FirstValue, SecondValue, ThirdValue, FourthValue, RunningCarry, RunningSum, Average
    mov a, [FirstValue]		; Obtain first sum and carry bit
    add a, [SecondValue]
    mov [RunningSum], a
    mov a, 00h			; Zero out the accumulator, but keeps carry bit intact
    adc a, 00h			; Add carry to accumulator
    mov [RunningCarry], a

    mov a, [RunningSum]		; Obtain second sum and running carry
    add a, [ThirdValue]
    mov [RunningSum], a
    mov a, 00h			; Zero out the accumulator, but keeps carry bit intact
    adc a, [RunningCarry]
    mov [RunningCarry], a
	
    mov a, [RunningSum]		; Obtain third and final sum and running carry
    add a, [FourthValue]
    mov [RunningSum], a
    mov a, 00h			; Zero out the accumulator, but keeps carry bit intact
    adc a, [RunningCarry]

    rrc a			; Move the 2 lsb bits to the 2 msb bit position
    rrc a
    rrc a
    and a, d0h
    mov [RunningCarry], a

    mov a, [RunningSum]		; Shift Sum 2 bits to right and put carry bits in 2 MSb's
    asr a
    asr a
    and a, 3fh
    or  a, [RunningCarry]
    mov [Average], a  
ENDM

MACRO ADD8x8wCarry FirstValue, SecondValue, CarryMSByte, SumLSByte, SumMSByteStored, SumLSByteStored
    mov a, [FirstValue]
    add a, [SecondValue]	; If carry, then carry bit = 1, else = 0
    mov [SumLSByte], a		; Move LSByte of the addition to SumByte
    mov [SumLSByteStored], a	; Move LSByte of the addition to SumLSByteStored to be stored until next resistor sampling
    mov a, 00h			; Zero out the accumulator
    rlc a			; Move the carry bit to the LSbit position
    mov [CarryMSByte], a	; If CarryMSByte = 01h, then it means the previous sum > FFh, else CarryMSByte = 00h
    mov [SumMSByteStored], a	; Move MSByte of the addition to SumMSByteStored to be stored until next resistor sampling
ENDM
    

MACRO DIV16x16 LongIX_hi, LongIX_lo, LongAC_hi, LongAC_lo	; executes AC = AC/IX
	MOV   A,00h             ;ACCa._byte.hi=0;
	MOV   [acc_a_hi],A
	MOV   A,10h             ;temp = 16;              // for 16 shifts
	MOV   [temp_div],A

	MOV   A,[LongIX_hi]     ;ACCa._word = __longIX;
	MOV   [acc_a_hi],A
	MOV   A,[LongIX_lo]
	MOV   [acc_a_lo],A
	MOV   A,[LongAC_hi]     ;ACCb._word = __longAC;
	MOV   [acc_b_hi],A
	MOV   A,[LongAC_lo]
	MOV   [acc_b_lo],A
	MOV   [acc_d_lo],A       ;ACCd._word = ACCb._word = __longAC;
	MOV   A,[acc_b_hi]
	MOV   [acc_d_hi],A
	MOV   A,00h             ;ACCb._word = ACCc._word = 0;
	MOV   [acc_c_lo],A
	MOV   [acc_c_hi],A
	MOV   [acc_b_lo],A
	MOV   [acc_b_hi],A

	.routine1:                ;         {
	MOV   A,[acc_d_lo]         ;AC=ACCd._byte.lo;
	ASL   A                   ;ASL();
	MOV   [acc_d_lo],A         ;ACCd._byte.lo=AC;

	MOV   A,[acc_d_hi]         ;AC=ACCd._byte.hi;
	RLC   A                   ;RLC();
	MOV   [acc_d_hi],A         ;ACCd._byte.hi=AC;

	MOV   A,[acc_c_lo]         ;AC=ACCc._byte.lo;
	RLC   A                   ;RLC();
	MOV   [acc_c_lo],A         ;ACCc._byte.lo=AC;

	MOV   A,[acc_c_hi]         ;AC=ACCc._byte.hi;
	RLC   A                   ;RLC();
	MOV   [acc_c_hi],A         ;ACCc._byte.hi=AC;

	MOV   A,[acc_b_lo]         ;AC=ACCb._byte.lo;
	ASL   A                   ;ASL();
	MOV   [acc_b_lo],A         ;ACCb._byte.lo=AC;

	MOV   A,[acc_b_hi]         ;AC=ACCb._byte.hi;
	RLC   A                   ;RLC();
	MOV   [acc_b_hi],A         ;ACCb._byte.hi=AC;

	MOV   A,[acc_c_lo]         ;if( ACCc._word >= ACCa._word ) 
	SUB   A,[acc_a_lo]         
	MOV   [LongAC_lo],A         
	MOV   A,[acc_c_hi]         
	SBB   A,[acc_a_hi]         
	JC    .routine2
			  	  ;{
	MOV   A,[acc_c_lo]         ;ACCc._word = ACCc._word - ACCa._word; // c-a into c
	SUB   A,[acc_a_lo]
	MOV   [acc_c_lo],A
	MOV   A,[acc_c_hi]
	SBB   A,[acc_a_hi]
	MOV   [acc_c_hi],A
	MOV   A,01h               ;ACCb._byte.lo |=1;
	OR    [acc_b_lo],A
                          	  ;              }
	.routine2:                 ;            }
	DEC   [temp_div]          ;while (--temp);         // loop until all bits checked
	JNZ   .routine1

	MOV   A,[acc_c_hi]         ;ACCa._word=ACCc._word;
	MOV   [acc_a_hi],A
	MOV   A,[acc_c_lo]
	MOV   [acc_a_lo],A
	MOV   [LongIX_lo],A       ;__longIX = ACCa._word;
	MOV   A,[acc_a_hi]
	MOV   [LongIX_hi],A
	MOV   A,[acc_b_hi]         ;__longAC = ACCb._word;
	MOV   [LongAC_hi],A
	MOV   A,[acc_b_lo]
	MOV   [LongAC_lo],A
ENDM

;*************** interrupt vector table ****************

ORG 00h			

jmp	Reset				; Reset vector		
jmp	BusResetISR			; bus reset interrupt
jmp	128usTimerISR			; 128us interrupt
jmp	1msTimerISR			; 1.024ms interrupt
jmp	Endpoint0ISR			; endpoint 0 interrupt
jmp	Endpoint1ISR			; endpoint 1 interrupt
jmp	Endpoint2ISR			; endpoint 2 interrupt
jmp	SpiISR				; SPI interrupt
jmp	CaptureTimerAISR		; Capture timer A interrupt
jmp	CaptureTimerBISR		; Capture timer B interrupt
jmp	GpioISR				; GPIO interrupt vector
jmp	WakeUpISR			; Wake-up interrupt vector

;************** program listing ************************

ORG  1Ah
error: halt

;*******************************************************
;
;	Interrupt handler: Reset
;	Purpose: The program jumps to this routine when
;		   the microcontroller has a power on reset or
;		   a USB Bus Reset
;*******************************************************

Reset:
	; Use the internal oscillator
	mov		A, (LVR_ENABLE | PRECISION_CLK_ENABLE | INTERNAL_CLK )	;equiv values: 08h | 04h | 02h = 0eh
	;mov		A, (PRECISION_CLK_ENABLE | INTERNAL_CLK )		;equiv values: 04h | 02h
	iowr		Clock_Config
	
	; setup data memory stack pointer
	mov		A, 20h
	swap		A, dsp		
	
	; clear psp
	mov		A, 00h
	mov		psp,a	
	
	; clear all RAM locations
	mov A, 	BOTTOM_OF_RAM
	mov X, 	TOP_OF_RAM

	ram_clear_loop:					; clear all ram locations
		iowr Watchdog
		mov [X+0], A
		dec X
		jnc ram_clear_loop

	mov		A, 01h
	mov		[protocol], A

	; Set the GPIOs to resistive mode
	mov		A, MODE0_RESISTIVE_MODE		; = to 00h
	iowr		Port0_Mode0
	iowr		Port1_Mode0
	mov		A, MODE1_RESISTIVE_MODE		; = to FFh
	iowr		Port0_Mode1
	iowr		Port1_Mode1
	
	; Port pins are initially HIGH
	mov		A, ffh
	iowr		Port0
	iowr		Port1

	; enable USB address for endpoint 0
	mov		A, ADDRESS_ENABLE
	iowr		Usb_Address
	
	; enable 3.3V voltage regulator for pulling D- up
	mov		A, VREG_ENABLE  
	iowr		Usb_Status_Control

	; enable 1MS interrupt and Bus Reset interrupt
	mov		A, (1MS_INT | USB_RESET_INT)  ; same as (04h or 01h) = 05h
	iowr 		Global_Interrupt

	; enable endpoint 0 interrupt
	mov 		A, EP0_INT			
	iowr 		Endpoint_Interrupt

	; Upon reset or enterring an ISR, the hardware disables all interrupts by 
	; clearing the Interrupt Mask/or Interrupt Enable Sense Bit in the Processor
	; Status and Control Reg. An "ei" or "reti" instruction sets this bit to 1 to 
	; enable all interrupts masked by the Global Interrupt Enable Register and 
	; Endpoint Interrupt Enable Register.

	ei 				;enable interupts command

	mov a, 08h			;Initialize EP1 count reg, must be set to # of words sent to host !!!
	iowr Ep1_Count			;Initialize EP1 count reg
	mov a, NAK_IN			;USB mode is NAK in, send no words back at this time
	iowr Ep1_Mode			;USB mode is NAK in, send no words back at this time
	mov a, 03h			;Enables interrupts on EP1,EP0 (EP2 disabled)
	iowr Endpoint_Interrupt		;Enables interrupts on EP1,EP0 (EP2 disabled)
	
	mov a, FEh                      ;Leaves capacitor charged, but puts P0.0 at Hi-Z CMOS
	iowr Port0_Mode0
	iowr Port0_Mode1
	iowr Port0

	mov a, 00h			; Puts all port 1 I/Os into CMOS resistive, allowing for active low push buttons
	iowr Port1_Mode0
	mov a, FFh 
	iowr Port1_Mode1
	iowr Port1

	mov a, 8Ah      		;Setup Capture Timers -- A & B are falling edge triggered, set 1st edge hold
        iowr Capture_Timer_Config


;====================================================
;TASK LOOP:
;	
;	while (forever)
;	{
;	reset watchdog timer
;	check for USB suspend condition
;	if (time to do next task)
;		{
;		if (device is enumerated and not stalled)
;			{
;			if (task number out of range)
;				task number := 0
;			jump to task
;			}		
;		}
;	}
;
;=====================================================

TaskLoop:
	
	iowr 	Watchdog				; kick the dog