entry.s

microwindows移植到S3C44B0的源码

	.long  SYSCALL(sys_geteuid,sys_geteuid)
	.long  SYSCALL(sys_getegid,sys_getegid)
	.long  SYSCALL(sys_setreuid,sys32_setreuid_wrapper)
	.long  SYSCALL(sys_setregid,sys32_setregid_wrapper)
	.long  SYSCALL(sys_getgroups,sys32_getgroups_wrapper)  /* 205 */
	.long  SYSCALL(sys_setgroups,sys32_setgroups_wrapper)
	.long  SYSCALL(sys_fchown,sys32_fchown_wrapper)
	.long  SYSCALL(sys_setresuid,sys32_setresuid_wrapper)
	.long  SYSCALL(sys_getresuid,sys32_getresuid_wrapper)
	.long  SYSCALL(sys_setresgid,sys32_setresgid_wrapper)  /* 210 */
	.long  SYSCALL(sys_getresgid,sys32_getresgid_wrapper)
	.long  SYSCALL(sys_chown,sys32_chown_wrapper)
	.long  SYSCALL(sys_setuid,sys32_setuid_wrapper)
	.long  SYSCALL(sys_setgid,sys32_setgid_wrapper)
	.long  SYSCALL(sys_setfsuid,sys32_setfsuid_wrapper)   /* 215 */
	.long  SYSCALL(sys_setfsgid,sys32_setfsgid_wrapper)
        .long  SYSCALL(sys_pivot_root,sys32_pivot_root_wrapper)
        .long  SYSCALL(sys_mincore,sys32_mincore_wrapper)
        .long  SYSCALL(sys_madvise,sys32_madvise_wrapper)
	.long  SYSCALL(sys_getdents64,sys32_getdents64_wrapper)/* 220 */
	.long  SYSCALL(sys_ni_syscall,sys32_fcntl64_wrapper)
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall)
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall)
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 224 - reserved for setxattr  */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 225 - reserved for lsetxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 226 - reserved for fsetxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 227 - reserved for getxattr  */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 228 - reserved for lgetxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 229 - reserved for fgetxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 230 - reserved for listxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 231 - reserved for llistxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 232 - reserved for flistxattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 233 - reserved for removexattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 234 - reserved for lremovexattr */
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall) /* 235 - reserved for fremovexattr */
	.long  SYSCALL(sys_gettid,sys_gettid)
	.long  SYSCALL(sys_tkill,sys_tkill)
	.rept  255-237
	.long  SYSCALL(sys_ni_syscall,sys_ni_syscall)
	.endr

/*
 * Program check handler routine
 */

        .globl  pgm_check_handler
pgm_check_handler:
/*
 * First we need to check for a special case:
 * Single stepping an instruction that disables the PER event mask will
 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
 * For a single stepped SVC the program check handler gets control after
 * the SVC new PSW has been loaded. But we want to execute the SVC first and
 * then handle the PER event. Therefore we update the SVC old PSW to point
 * to the pgm_check_handler and branch to the SVC handler after we checked
 * if we have to load the kernel stack register.
 * For every other possible cause for PER event without the PER mask set
 * we just ignore the PER event (FIXME: is there anything we have to do
 * for LPSW?).
 */
        tm      __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
        jnz     pgm_per                  # got per exception -> special case
	SAVE_ALL __LC_PGM_OLD_PSW,1
	llgh    %r8,__LC_PGM_INT_CODE
        sll     %r8,3
	GET_CURRENT
        larl    %r1,pgm_check_table
        lg      %r1,0(%r8,%r1)		 # load address of handler routine
        la      %r2,SP_PTREGS(%r15)	 # address of register-save area
	lgf     %r3,__LC_PGM_ILC	 # load program interruption code
	larl	%r14,sysc_return
        br      %r1			 # branch to interrupt-handler

#
# handle per exception
#
pgm_per:
        tm      __LC_PGM_OLD_PSW,0x40    # test if per event recording is on
        jnz     pgm_per_std              # ok, normal per event from user space
# ok its one of the special cases, now we need to find out which one
        clc     __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
        je      pgm_svcper
# no interesting special case, ignore PER event
	lpswe   __LC_PGM_OLD_PSW

#
# Normal per exception
#
pgm_per_std:
	SAVE_ALL __LC_PGM_OLD_PSW,1
	GET_CURRENT
	lghi    %r4,0x7f
	lgf     %r3,__LC_PGM_ILC	 # load program interruption code
        nr      %r4,%r3			 # clear per-event-bit and ilc
        je      pgm_per_only		 # only per of per+check ?
        sll     %r4,3
        larl    %r1,pgm_check_table
        lg      %r1,0(%r4,%r1)		 # load address of handler routine
        la      %r2,SP_PTREGS(%r15)	 # address of register-save area
        basr    %r14,%r1		 # branch to interrupt-handler
pgm_per_only:
        la      %r2,SP_PTREGS(15)	 # address of register-save area
        larl    %r14,sysc_return	 # load adr. of system return
        jg      handle_per_exception

#
# it was a single stepped SVC that is causing all the trouble
#
pgm_svcper:
	SAVE_ALL __LC_SVC_OLD_PSW,1
	larl    %r7,sys_call_table
	llgh    %r8,__LC_SVC_INT_CODE # get svc number from lowcore
        sll     %r8,3
        GET_CURRENT               # load pointer to task_struct to R9
	stosm   48(%r15),0x03     # reenable interrupts
        tm      SP_PSW+3(%r15),0x01  # are we running in 31 bit mode ?
        jo      pgm_svcper_noemu
	la      %r8,4(%r8)        # use 31 bit emulation system calls
pgm_svcper_noemu:
        lgf     %r8,0(%r8,%r7)    # load address of system call routine
        tm      __TASK_ptrace+7(%r9),0x02 # PT_TRACESYS
        jnz     pgm_tracesys
        basr    %r14,%r8          # call sys_xxxx
        stg     %r2,SP_R2(%r15)   # store return value (change R2 on stack)
                                  # ATTENTION: check sys_execve_glue before
                                  # changing anything here !!

pgm_svcret:
        icm     %r0,15,__TASK_sigpending(%r9)
        jz      pgm_svcper_nosig
        la      %r2,SP_PTREGS(%r15) # load pt_regs
        sgr     %r3,%r3             # clear *oldset
	brasl	%r14,do_signal
	
pgm_svcper_nosig:
	lhi     %r0,__LC_PGM_OLD_PSW     # set trap indication back to pgm_chk
	st      %r0,SP_TRAP(%r15)
        la      %r2,SP_PTREGS(15) # address of register-save area
        larl    %r14,sysc_return  # load adr. of system return
        jg      handle_per_exception
#
# call trace before and after sys_call
#
pgm_tracesys:
	larl	%r12,pgm_svcret
	j	trace_svc

/*
 * IO interrupt handler routine
 */
        .globl io_int_handler
io_int_handler:
        SAVE_ALL __LC_IO_OLD_PSW,0
        GET_CURRENT                    # load pointer to task_struct to R9
        la      %r2,SP_PTREGS(%r15)    # address of register-save area
	llgh    %r3,__LC_SUBCHANNEL_NR # load subchannel number
        llgf    %r4,__LC_IO_INT_PARM   # load interuption parm
        llgf    %r5,__LC_IO_INT_WORD   # load interuption word
	brasl   %r14,do_IRQ            # call standard irq handler

io_return:
#
# check, if bottom-half has to be done
#
	lgf     %r1,__TASK_processor(%r9)
	larl    %r2,irq_stat
	sll     %r1,L1_CACHE_SHIFT
	la      %r1,0(%r1,%r2)
	icm     %r0,15,0(%r1)         # test irq_stat[#cpu].__softirq_pending
        jnz     io_handle_bottom_half
io_return_bh:	

        tm      SP_PSW+1(%r15),0x01    # returning to user ?
        jno     io_leave               # no-> skip resched & signal
        stosm   48(%r15),0x03          # reenable interrupts
#
# check, if reschedule is needed
#
	lg      %r0,__TASK_need_resched(%r9)
	ltgr    %r0,%r0
        jnz     io_reschedule
        icm     %r0,15,__TASK_sigpending(%r9)
        jnz     io_signal_return
io_leave:
        stnsm   48(%r15),0xfc          # disable I/O and ext. interrupts
        RESTORE_ALL 0

#
# call do_softirq and return from syscall, if interrupt-level
# is zero
#
io_handle_bottom_half:        
	larl    %r14,io_return_bh
        jg      do_softirq          # return point is io_return_bh

#
# call schedule with io_return as return-address
#
io_reschedule:        
	larl    %r14,io_return
        jg      schedule            # call scheduler, return to io_return

#
# call do_signal before return
#
io_signal_return:     
        la      %r2,SP_PTREGS(%r15) # load pt_regs
        slgr    %r3,%r3             # clear *oldset
	larl    %r14,io_leave
        jg      do_signal           # return point is io_leave

/*
 * External interrupt handler routine
 */
        .globl  ext_int_handler
ext_int_handler:
        SAVE_ALL __LC_EXT_OLD_PSW,0
        GET_CURRENT                    # load pointer to task_struct to R9
        la      %r2,SP_PTREGS(%r15)    # address of register-save area
        llgh    %r3,__LC_EXT_INT_CODE  # error code
        lgr     %r1,%r3                # calculate index = code & 0xff
	nill    %r1,0xff
        sll     %r1,3
        larl    %r4,ext_int_hash
        lg      %r4,0(%r1,%r4)         # get first list entry for hash value
        ltgr    %r4,%r4                # == NULL ?
        jz      io_return              # yes, nothing to do, exit
ext_int_loop:
        ch      %r3,16(%r4)            # compare external interrupt code
        je      ext_int_found
        lg      %r4,0(%r4)             # next list entry
	ltgr    %r4,%r4
        jnz     ext_int_loop
        j       io_return
ext_int_found:
        lg      %r4,8(%r4)             # get handler address
        larl    %r14,io_return
        br      %r4                    # branch to ext call handler

/*
 * Machine check handler routines
 */
        .globl mcck_int_handler
mcck_int_handler:
        SAVE_ALL __LC_MCK_OLD_PSW,0
	brasl   %r14,s390_do_machine_check
mcck_return:
        RESTORE_ALL 0

#ifdef CONFIG_SMP
/*
 * Restart interruption handler, kick starter for additional CPUs
 */
        .globl restart_int_handler
restart_int_handler:
        lg      %r15,__LC_SAVE_AREA+120 # load ksp
        lghi    %r10,__LC_CREGS_SAVE_AREA
        lctlg   %c0,%c15,0(%r10) # get new ctl regs
        lghi    %r10,__LC_AREGS_SAVE_AREA
        lam     %a0,%a15,0(%r10)
        stosm   0(%r15),0x04           # now we can turn dat on
        lmg     %r6,%r15,48(%r15)      # load registers from clone
	jg      start_secondary
#else
/*
 * If we do not run with SMP enabled, let the new CPU crash ...
 */
        .globl restart_int_handler
restart_int_handler:
        basr    %r1,0
restart_base:
        lpswe   restart_crash-restart_base(%r1)
        .align 8
restart_crash:
        .long  0x000a0000,0x00000000,0x00000000,0x00000000
restart_go:
#endif

/*
 * Integer constants
 */
               .align 4
.Lc_ac:        .long  0,0,1