📄 setup.c
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/* * * Common boot and setup code. * * Copyright (C) 2001 PPC64 Team, IBM Corp * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */#include <linux/config.h>#include <linux/module.h>#include <linux/string.h>#include <linux/sched.h>#include <linux/init.h>#include <linux/reboot.h>#include <linux/delay.h>#include <linux/blk.h>#include <linux/ide.h>#include <linux/seq_file.h>#include <linux/ioport.h>#include <asm/init.h>#include <asm/io.h>#include <asm/prom.h>#include <asm/processor.h>#include <asm/pgtable.h>#include <asm/bootinfo.h>#include <asm/smp.h>#include <asm/elf.h>#include <asm/machdep.h>#include <asm/iSeries/LparData.h>#include <asm/naca.h>#include <asm/paca.h>#include <asm/ppcdebug.h>#include <asm/time.h>extern unsigned long klimit;/* extern void *stab; */extern HTAB htab_data;extern unsigned long loops_per_jiffy;extern unsigned long embedded_sysmap_start;extern unsigned long embedded_sysmap_end;int have_of = 1;extern void chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7);extern void chrp_init_map_io_space( void );extern void iSeries_init( void );extern void iSeries_init_early( void );extern void pSeries_init_early( void );extern void pSeriesLP_init_early(void);extern void mm_init_ppc64( void ); unsigned long decr_overclock = 1;unsigned long decr_overclock_proc0 = 1;unsigned long decr_overclock_set = 0;unsigned long decr_overclock_proc0_set = 0;#ifdef CONFIG_XMONextern void xmon_map_scc(void);#endifchar saved_command_line[256];unsigned char aux_device_present;void parse_cmd_line(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7);int parse_bootinfo(void);#ifdef CONFIG_MAGIC_SYSRQunsigned long SYSRQ_KEY;#endif /* CONFIG_MAGIC_SYSRQ */struct machdep_calls ppc_md;/* * Perhaps we can put the pmac screen_info[] here * on pmac as well so we don't need the ifdef's. * Until we get multiple-console support in here * that is. -- Cort * Maybe tie it to serial consoles, since this is really what * these processors use on existing boards. -- Dan */ struct screen_info screen_info = { 0, 25, /* orig-x, orig-y */ 0, /* unused */ 0, /* orig-video-page */ 0, /* orig-video-mode */ 80, /* orig-video-cols */ 0,0,0, /* ega_ax, ega_bx, ega_cx */ 25, /* orig-video-lines */ 1, /* orig-video-isVGA */ 16 /* orig-video-points */};/* * These are used in binfmt_elf.c to put aux entries on the stack * for each elf executable being started. */int dcache_bsize;int icache_bsize;int ucache_bsize;/* * Initialize the PPCDBG state. Called before relocation has been enabled. */void ppcdbg_initialize(void) { unsigned long offset = reloc_offset(); struct naca_struct *_naca = RELOC(naca); _naca->debug_switch = PPC_DEBUG_DEFAULT; /* | PPCDBG_BUSWALK | PPCDBG_PHBINIT | PPCDBG_MM | PPCDBG_MMINIT | PPCDBG_TCEINIT | PPCDBG_TCE */;}/* * Do some initial setup of the system. The paramters are those which * were passed in from the bootloader. */void setup_system(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7){ /* This should be fixed properly in kernel/resource.c */ iomem_resource.end = MEM_SPACE_LIMIT; /* pSeries systems are identified in prom.c via OF. */ if ( itLpNaca.xLparInstalled == 1 ) naca->platform = PLATFORM_ISERIES_LPAR; switch (naca->platform) { case PLATFORM_ISERIES_LPAR: iSeries_init_early(); break;#ifdef CONFIG_PPC_PSERIES case PLATFORM_PSERIES: pSeries_init_early();#ifdef CONFIG_BLK_DEV_INITRD initrd_start = initrd_end = 0;#endif parse_bootinfo(); break; case PLATFORM_PSERIES_LPAR: pSeriesLP_init_early();#ifdef CONFIG_BLK_DEV_INITRD initrd_start = initrd_end = 0;#endif parse_bootinfo(); break;#endif } udbg_puts("\n-----------------------------------------------------\n"); udbg_puts("Naca Info...\n\n"); udbg_puts("naca = 0x"); udbg_puthex((unsigned long)naca); udbg_putc('\n'); udbg_puts("naca->processorCount = 0x"); udbg_puthex(naca->processorCount); udbg_putc('\n'); udbg_puts("naca->physicalMemorySize = 0x"); udbg_puthex(naca->physicalMemorySize); udbg_putc('\n'); udbg_puts("naca->dCacheL1LineSize = 0x"); udbg_puthex(naca->dCacheL1LineSize); udbg_putc('\n'); udbg_puts("naca->dCacheL1LogLineSize = 0x"); udbg_puthex(naca->dCacheL1LogLineSize); udbg_putc('\n'); udbg_puts("naca->dCacheL1LinesPerPage = 0x"); udbg_puthex(naca->dCacheL1LinesPerPage); udbg_putc('\n'); udbg_puts("naca->iCacheL1LineSize = 0x"); udbg_puthex(naca->iCacheL1LineSize); udbg_putc('\n'); udbg_puts("naca->iCacheL1LogLineSize = 0x"); udbg_puthex(naca->iCacheL1LogLineSize); udbg_putc('\n'); udbg_puts("naca->iCacheL1LinesPerPage = 0x"); udbg_puthex(naca->iCacheL1LinesPerPage); udbg_putc('\n'); udbg_puts("naca->pftSize = 0x"); udbg_puthex(naca->pftSize); udbg_putc('\n'); udbg_puts("naca->serialPortAddr = 0x"); udbg_puthex(naca->serialPortAddr); udbg_putc('\n'); udbg_puts("naca->interrupt_controller = 0x"); udbg_puthex(naca->interrupt_controller); udbg_putc('\n'); udbg_printf("\nHTAB Info ...\n\n"); udbg_puts("htab_data.htab = 0x"); udbg_puthex((unsigned long)htab_data.htab); udbg_putc('\n'); udbg_puts("htab_data.num_ptegs = 0x"); udbg_puthex(htab_data.htab_num_ptegs); udbg_putc('\n'); udbg_puts("\n-----------------------------------------------------\n"); if (naca->platform & PLATFORM_PSERIES) { finish_device_tree(); chrp_init(r3, r4, r5, r6, r7); } mm_init_ppc64(); switch (naca->platform) { case PLATFORM_ISERIES_LPAR: iSeries_init(); break; default: /* The following relies on the device tree being */ /* fully configured. */ parse_cmd_line(r3, r4, r5, r6, r7); }}void machine_restart(char *cmd){ ppc_md.restart(cmd);} void machine_power_off(void){ ppc_md.power_off();} void machine_halt(void){ ppc_md.halt();}unsigned long ppc_proc_freq;unsigned long ppc_tb_freq;static int show_cpuinfo(struct seq_file *m, void *v){ unsigned long cpu_id = (unsigned long)v - 1; unsigned int pvr; unsigned short maj; unsigned short min;#ifdef CONFIG_SMP if (cpu_id == NR_CPUS) { if (ppc_md.get_cpuinfo != NULL) ppc_md.get_cpuinfo(m); return 0; } if (!(cpu_online_map & (1<<cpu_id))) return 0;#endif pvr = paca[cpu_id].pvr; maj = (pvr >> 8) & 0xFF; min = pvr & 0xFF; seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "cpu\t\t: "); pvr = paca[cpu_id].pvr; switch (PVR_VER(pvr)) { case PV_PULSAR: seq_printf(m, "RS64-III (pulsar)\n"); break; case PV_POWER4: seq_printf(m, "POWER4 (gp)\n"); break; case PV_ICESTAR: seq_printf(m, "RS64-III (icestar)\n"); break; case PV_SSTAR: seq_printf(m, "RS64-IV (sstar)\n"); break; case PV_630: seq_printf(m, "POWER3 (630)\n"); break; case PV_630p: seq_printf(m, "POWER3 (630+)\n"); break; default: seq_printf(m, "Unknown (%08x)\n", pvr); break; } /* * Assume here that all clock rates are the same in a * smp system. -- Cort */ if (naca->platform != PLATFORM_ISERIES_LPAR) { struct device_node *cpu_node; int *fp; cpu_node = find_type_devices("cpu"); if (cpu_node) { fp = (int *) get_property(cpu_node, "clock-frequency", NULL); if (fp) seq_printf(m, "clock\t\t: %dMHz\n", *fp / 1000000); } } if (ppc_md.setup_residual != NULL) ppc_md.setup_residual(m, cpu_id); seq_printf(m, "revision\t: %hd.%hd\n", maj, min); return 0;}static void *c_start(struct seq_file *m, loff_t *pos){ return *pos <= NR_CPUS ? (void *)((*pos)+1) : NULL;}static void *c_next(struct seq_file *m, void *v, loff_t *pos){ ++*pos; return c_start(m, pos);}static void c_stop(struct seq_file *m, void *v){}struct seq_operations cpuinfo_op = { start: c_start, next: c_next, stop: c_stop, show: show_cpuinfo,};/* * Fetch the cmd_line from open firmware. */void parse_cmd_line(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7){ struct device_node *chosen;
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