i2o.c

microwindows移植到S3C44B0的源码

/* i2o.c - Drivers for the I2O */

/* Copyright - Galileo technology. */

/*includes*/

#include <linux/module.h>

#ifdef __linux__
#include <asm/galileo-boards/evb64120A/core.h>
#include <asm/galileo-boards/evb64120A/i2o.h>
#else
#include "Core.h"
#include "i2o.h"
#endif

/********************************************************************
* getInBoundMessage - When the GT is configured for I2O support
*                     it can receive a message from an agent on the pci bus.
*                     This message is a 32 bit wide and can be read by
*                     the CPU.
*                     The messaging unit contains two sets of registers
*                     so, actually it can receive a 64 bit message.
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: Data received from the remote agent.
*********************************************************************/
unsigned int getInBoundMessage(I2O_MESSAGE_REG messageRegNum)
{
	unsigned int regValue;

	GT_REG_READ(INBOUND_MESSAGE_REGISTER0_CPU_SIDE + 4 * messageRegNum,
		    &regValue);
	return (regValue);
}


/********************************************************************
* checkInboundIntAndClear - When a message is received an interrupt is 
*                           generated, to enable polling instead the use of
*                           an interrupt handler the user can use this fuction.
*                           You will need to mask the incomming interrupt for
*                           proper use.
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true if the corresponding bit in the cause register is set otherwise
*          false.
*********************************************************************/
bool checkInBoundIntAndClear(I2O_MESSAGE_REG messageRegNum)
{
	unsigned int regValue;

	GT_REG_READ(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, &regValue);
	/* clears bit 0 for message register 0 or bit 1 for message register 1 */
	GT_REG_WRITE(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE,
		     BIT1 * messageRegNum);
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		if (regValue & BIT0)
			return true;
		break;
	case MESSAGE_REG_1:
		if (regValue & BIT1)
			return true;
		break;
	}
	return false;
}

/********************************************************************
* sendOutBoundMessage - When the GT is configured for I2O support
*                     it can send a message to an agent on the pci bus.
*                     This message is a 32 bit wide and can be read by
*                     the PCI agent.
*                     The messaging unit contains two sets of registers
*                     so, actually it can send a 64 bit message.
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
*         unsigned int message - Message to be sent.   
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool sendOutBoundMessage(I2O_MESSAGE_REG messageRegNum,
			 unsigned int message)
{
	GT_REG_WRITE(OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE +
		     4 * messageRegNum, message);
	return true;
}

/********************************************************************
* checkOutboundInt - When the CPU sends a message to the Outbound
*                    register it generates an interrupt which is refelcted on
*                    the Outbound Interrupt cause register, the interrupt can
*                    be cleard only by the PCI agent which read the message. 
*                    After sending the message you can acknowledge it by
*                    monitoring the corresponding bit in the cause register.
*
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true if the corresponding bit in the cause register is set otherwise
*          false.
*********************************************************************/
bool outBoundMessageAcknowledge(I2O_MESSAGE_REG messageRegNum)
{
	unsigned int regValue;

	GT_REG_READ(OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, &regValue);
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		if (regValue & BIT0)
			return true;
		break;
	case MESSAGE_REG_1:
		if (regValue & BIT1)
			return true;
		break;
	}
	return false;
}

/********************************************************************
* maskInBoundMessageInterrupt - Mask the inbound interrupt, when masking
*                               the interrupt you can work in polling mode
*                               using the checkInboundIntAndClear function. 
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool maskInBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
{
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			     BIT0);
		break;
	case MESSAGE_REG_1:
		SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			     BIT1);
		break;
	}
	return true;
}

/********************************************************************
* enableInBoundMessageInterrupt - unMask the inbound interrupt. 
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool enableInBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
{
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			       BIT0);
		break;
	case MESSAGE_REG_1:
		RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			       BIT1);
		break;
	}
	return true;
}

/********************************************************************
* maskOutboundMessageInterrupt - Mask the out bound interrupt, when doing so
*                           the PCI agent needs to poll on the interrupt
*                           cause register to monitor an incoming message. 
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool maskOutBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
{
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			     BIT0);
		break;
	case MESSAGE_REG_1:
		SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			     BIT1);
		break;
	}
	return true;
}

/********************************************************************
* enableOutboundMessageInterrupt - Mask the out bound interrupt, when doing so
*                           the PCI agent needs to poll on the interrupt
*                           cause register to monitor an incoming message. 
* 
* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool enableOutBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
{
	switch (messageRegNum) {
	case MESSAGE_REG_0:
		RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			       BIT0);
		break;
	case MESSAGE_REG_1:
		RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
			       BIT1);
		break;
	}
	return true;
}

/********************************************************************
* initiateOutBoundDoorBellInt - Setting a bit in this register to '1' by the 
*                       CPU generates a PCI interrupt (if it is not masked by
*                       the Outbound interrupt Mask register)
*                       Only the PCI agent which recieved the interrupt can
*                       clear it, only after clearing all the bits the
*                       interrupt will be de-asserted.
* 
* INPUTS: unsigned int data - Requested interrupt bits.
* OUTPUT: N/A.
* RETURNS: true.
*********************************************************************/
bool initiateOutBoundDoorBellInt(unsigned int data)
{
	GT_REG_WRITE(OUTBOUND_DOORBELL_REGISTER_CPU_SIDE, data);
	return true;
}

/********************************************************************
* readInBoundDoorBellInt - Read the in bound door bell interrupt cause
*                          register.
* 
* OUTPUT:  N/A.
* RETURNS: The 32 bit interrupt cause register.
*********************************************************************/
unsigned int readInBoundDoorBellInt()
{
	unsigned int regData;
	GT_REG_READ(INBOUND_DOORBELL_REGISTER_CPU_SIDE, &regData);
	return regData;
}

/********************************************************************
* clearInBoundDoorBellInt - An interrupt generated by a PCI agent through
*                           the in bound door bell mechanisem can be cleared
*                           only by the CPU. The interrupt will be de-asserted
*                           only if all the bits which where set by the PCI
*                           agent are cleared.
* 
* INPUTS:  unsigned int data - Bits to be cleared.
* OUTPUT:  N/A.
* RETURNS: true.
*********************************************************************/
bool clearInBoundDoorBellInt(unsigned int data)
{
	GT_REG_WRITE(INBOUND_DOORBELL_REGISTER_CPU_SIDE, data);
	return true;
}

/********************************************************************
* isInBoundDoorBellInterruptSet - Check if Inbound Doorbell Interrupt is set,
*                                 can be used for polling mode.
*
* INPUTS:  N/A.
* OUTPUT:  N/A.
* RETURNS: true if the corresponding bit in the cause register is set otherwise
*          false.
*********************************************************************/
bool isInBoundDoorBellInterruptSet()
{
	unsigned int regData;

	GT_REG_READ(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, &regData);
	return (regData & BIT2);
}

/********************************************************************
* isOutBoundDoorBellInterruptSet - Check if out bound Doorbell Interrupt is 
*                                  set, can be used for acknowledging interrupt
*                                  handling by the agent who recieived the
*                                  interrupt. 
* 
* INPUTS:  N/A.
* OUTPUT:  N/A.
* RETURNS: true if the corresponding bit in the cause register is set otherwise
*          false.
*********************************************************************/
bool isOutBoundDoorBellInterruptSet()
{
	unsigned int regData;

	GT_REG_READ(OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, &regData);
	return (regData & BIT2);
}

/********************************************************************
* maskInboundDoorBellInterrupt - Mask the Inbound Doorbell Interrupt.
*
* INPUTS:  N/A.
* OUTPUT:  N/A.
* RETURNS: true.
*********************************************************************/
bool maskInBoundDoorBellInterrupt()
{
	SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
	return true;
}

/********************************************************************
* enableInboundDoorBellInterrupt - unMask the Inbound Doorbell Interrupt.
*
* INPUTS:  N/A.
* OUTPUT:  N/A.
* RETURNS: true.
*********************************************************************/
bool enableInBoundDoorBellInterrupt()
{
	RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
	return true;
}

/********************************************************************
* maskOutboundDoorBellInterrupt - Mask the Outbound Doorbell Interrupt.
*
* INPUTS:  N/A.
* OUTPUT:  N/A.
* RETURNS: true.
*********************************************************************/
bool maskOutBoundDoorBellInterrupt()
{
	SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
	return true;
}

/********************************************************************
* enableOutboundDoorBellInterrupt - unMask the Outbound Doorbell Interrupt.
*
* INPUTS:  N/A.