📄 flashdrv.c
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sectorBaseAddress = _1K * sectorBaseAddress / 2; flashReset(); if ((flashTypes[POINTER_TO_FLASH] == AMD_FLASH) || \ (flashTypes[POINTER_TO_FLASH] == ST_FLASH)) { switch (FLASH_WIDTH) { case 1: if (FLASH_MODE == PURE8) { /* Boot Flash PURE8 */ FirstAddr = 0x5555; SecondAddr = 0x2aaa; ThirdAddr = 0x5555; FourthAddr = 0x5555; FifthAddr = 0x2aaa; } else { FirstAddr = 0xaaaa; SecondAddr = 0x5555; ThirdAddr = 0xaaaa; FourthAddr = 0xaaaa; FifthAddr = 0x5555; } WRITE_CHAR(FLASH_BASE_ADDRESS + FirstAddr, 0xAA); WRITE_CHAR(FLASH_BASE_ADDRESS + SecondAddr, 0x55); WRITE_CHAR(FLASH_BASE_ADDRESS + ThirdAddr, 0x80); WRITE_CHAR(FLASH_BASE_ADDRESS + FourthAddr, 0xAA); WRITE_CHAR(FLASH_BASE_ADDRESS + FifthAddr, 0x55); WRITE_CHAR( (FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00)), 0x30); /* Poll on the flash */ do { READ_CHAR(FLASH_BASE_ADDRESS + sectorBaseAddress, ®Value); } while ((regValue & 0x80) != 0x80); break; case 2: if (FLASH_MODE == X16) { FirstData = 0xaa; /* Data for the First Cycle */ SecondData = 0x55; /* Data for the Second Cycle */ ThirdData = 0x80; /* Data for the Third Cycle */ FourthData = 0xaa; /* Data for the Fourth Cycle */ FifthData = 0x55; /* Data for the Fifth Cycle */ SixthData = 0x30; /* Data for the Sixth Cycle */ FirstAddr = 0x5555; /* Address for the First Cycle */ SecondAddr = 0x2aaa; /* Address for the Second Cycle */ ThirdAddr = 0x5555; /* Address for the Third Cycle */ FourthAddr = 0x5555; /* Address for the Fourth Cycle */ FifthAddr = 0x2aaa; /* Address for the Fifth Cycle */ } else { /* (FLASH_MODE = 8) */ FirstData = 0xaaaa; /* Data for the First Cycle */ SecondData = 0x5555; /* Data for the Second Cycle */ ThirdData = 0x8080; /* Data for the Third Cycle */ FourthData = 0xaaaa; /* Data for the Fourth Cycle */ FifthData = 0x5555; /* Data for the Fifth Cycle */ SixthData = 0x3030; /* Data for the Sixth Cycle */ FirstAddr = 0xaaaa; /* Address for the First Cycle */ SecondAddr = 0x5555; /* Address for the Second Cycle */ ThirdAddr = 0xaaaa; /* Address for the Third Cycle */ FourthAddr = 0xaaaa; /* Address for the Fourth Cycle */ FifthAddr = 0x5555; /* Address for the Fifth Cycle */ } WRITE_SHORT(FLASH_BASE_ADDRESS + FirstAddr * FLASH_WIDTH, FirstData); WRITE_SHORT(FLASH_BASE_ADDRESS + SecondAddr * FLASH_WIDTH, SecondData); WRITE_SHORT(FLASH_BASE_ADDRESS + ThirdAddr * FLASH_WIDTH, ThirdData); WRITE_SHORT(FLASH_BASE_ADDRESS + FourthAddr * FLASH_WIDTH, FourthData); WRITE_SHORT(FLASH_BASE_ADDRESS + FifthAddr * FLASH_WIDTH, FifthData); WRITE_SHORT(FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00) * FLASH_WIDTH, SixthData); /* Poll on the flash */ if (FLASH_MODE == X16) { /* 1 device of 16 bit */ dataPoll = 0x0080; } else { /* (FLASH_MODE = 8) ==> 2 devices , 8 bit each => 16bit */ dataPoll = 0x8080; } do { READ_SHORT(FLASH_BASE_ADDRESS + sectorBaseAddress * FLASH_WIDTH, ®Value); for (spin = 0; spin < 100; spin++) { } // skranz, added spin loop. } while ((regValue & dataPoll) != dataPoll); break; case 4: if (FLASH_MODE == X16) { FirstData = 0x00aa00aa; /* Data for the First Cycle */ SecondData = 0x00550055; /* Data for the Second Cycle */ ThirdData = 0x00800080; /* Data for the Third Cycle */ FourthData = 0x00aa00aa; /* Data for the Fourth Cycle */ FifthData = 0x00550055; /* Data for the Fifth Cycle */ SixthData = 0x00300030; /* Data for the Sixth Cycle */ FirstAddr = 0x5555; /* Address for the First Cycle */ SecondAddr = 0x2aaa; /* Address for the Second Cycle */ ThirdAddr = 0x5555; /* Address for the Third Cycle */ FourthAddr = 0x5555; /* Address for the Fourth Cycle */ FifthAddr = 0x2aaa; /* Address for the Fifth Cycle */ } else { /* if (FLASH_MODE == 8) */ FirstData = 0xaaaaaaaa; /* Data for the First Cycle */ SecondData = 0x55555555; /* Data for the Second Cycle */ ThirdData = 0x80808080; /* Data for the Third Cycle */ FourthData = 0xAAAAAAAA; /* Data for the Fourth Cycle */ FifthData = 0x55555555; /* Data for the Fifth Cycle */ SixthData = 0x30303030; /* Data for the Sixth Cycle */ FirstAddr = 0xaaaa; /* Address for the First Cycle */ SecondAddr = 0x5555; /* Address for the Second Cycle */ ThirdAddr = 0xaaaa; /* Address for the Third Cycle */ FourthAddr = 0xaaaa; /* Address for the Fourth Cycle */ FifthAddr = 0x5555; /* Address for the Fifth Cycle */ } WRITE_WORD(FLASH_BASE_ADDRESS + FirstAddr * FLASH_WIDTH, FirstData); WRITE_WORD(FLASH_BASE_ADDRESS + SecondAddr * FLASH_WIDTH, SecondData); WRITE_WORD(FLASH_BASE_ADDRESS + ThirdAddr * FLASH_WIDTH, ThirdData); WRITE_WORD(FLASH_BASE_ADDRESS + FourthAddr * FLASH_WIDTH, FourthData); WRITE_WORD(FLASH_BASE_ADDRESS + FifthAddr * FLASH_WIDTH, FifthData); WRITE_WORD(FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00) * FLASH_WIDTH, SixthData); /* Poll on the flash */ if (FLASH_MODE == X16) { /* 4 devices , 16 bit each => 64bit */ dataPoll = 0x00800080; } else { /* (FLASH_MODE = 8) ==> 8 devices , 8 bit each => 64bit */ dataPoll = 0x80808080; } do { READ_WORD(FLASH_BASE_ADDRESS + sectorBaseAddress * FLASH_WIDTH, ®Value); } while ((regValue & dataPoll) != dataPoll); break; case 8: /* In case of 64bit width the transformation is 1->8 */ if (FLASH_MODE == X16) { FirstData = 0x00aa00aa; /* Data for the First Cycle */ SecondData = 0x00550055; /* Data for the Second Cycle */ ThirdData = 0x00800080; /* Data for the Third Cycle */ FourthData = 0x00aa00aa; /* Data for the Fourth Cycle */ FifthData = 0x00550055; /* Data for the Fifth Cycle */ SixthData = 0x00300030; /* Data for the Sixth Cycle */ FirstAddr = 0x5555; /* Address for the First Cycle */ SecondAddr = 0x2aaa; /* Address for the Second Cycle */ ThirdAddr = 0x5555; /* Address for the Third Cycle */ FourthAddr = 0x5555; /* Address for the Fourth Cycle */ FifthAddr = 0x2aaa; /* Address for the Fifth Cycle */ } else { /* (FLASH_MODE = 8 */ FirstData = 0xaaaaaaaa; /* Data for the First Cycle */ SecondData = 0x55555555; /* Data for the Second Cycle */ ThirdData = 0x80808080; /* Data for the Third Cycle */ FourthData = 0xAAAAAAAA; /* Data for the Fourth Cycle */ FifthData = 0x55555555; /* Data for the Fifth Cycle */ SixthData = 0x30303030; /* Data for the Sixth Cycle */ FirstAddr = 0xaaaa; /* Address for the First Cycle */ SecondAddr = 0x5555; /* Address for the Second Cycle */ ThirdAddr = 0xaaaa; /* Address for the Third Cycle */ FourthAddr = 0xaaaa; /* Address for the Fourth Cycle */ FifthAddr = 0x5555; /* Address for the Fifth Cycle */ } WRITE_WORD(FLASH_BASE_ADDRESS + FirstAddr * FLASH_WIDTH, FirstData); WRITE_WORD(FLASH_BASE_ADDRESS + SecondAddr * FLASH_WIDTH, SecondData); WRITE_WORD(FLASH_BASE_ADDRESS + ThirdAddr * FLASH_WIDTH, ThirdData); WRITE_WORD(FLASH_BASE_ADDRESS + FourthAddr * FLASH_WIDTH, FourthData); WRITE_WORD(FLASH_BASE_ADDRESS + FifthAddr * FLASH_WIDTH, FifthData); WRITE_WORD(FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00) * FLASH_WIDTH, SixthData); WRITE_WORD(FLASH_BASE_ADDRESS + FirstAddr * FLASH_WIDTH + 4, FirstData); WRITE_WORD(FLASH_BASE_ADDRESS + SecondAddr * FLASH_WIDTH + 4, SecondData); WRITE_WORD(FLASH_BASE_ADDRESS + ThirdAddr * FLASH_WIDTH + 4, ThirdData); WRITE_WORD(FLASH_BASE_ADDRESS + FourthAddr * FLASH_WIDTH + 4, FourthData); WRITE_WORD(FLASH_BASE_ADDRESS + FifthAddr * FLASH_WIDTH + 4, FifthData); WRITE_WORD(FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00) * FLASH_WIDTH + 4, SixthData); /* Poll on the flash */ if (FLASH_MODE == X16) { /* 4 devices , 16 bit each => 64bit */ dataPoll = 0x00800080; } else { /* (FLASH_MODE = 8) ==> 8 devices , 8 bit each => 64bit */ dataPoll = 0x80808080; } do { READ_WORD(FLASH_BASE_ADDRESS + sectorBaseAddress * FLASH_WIDTH, ®Value); } while ((regValue & dataPoll) != dataPoll); do { READ_WORD(FLASH_BASE_ADDRESS + sectorBaseAddress * FLASH_WIDTH + 4, ®Value); } while ((regValue & dataPoll) != dataPoll); break; default: return false; } } /* End of 'flash erase sector' for AMD/ST */ else { /* Intel/Micron */ switch (FLASH_WIDTH) { case 1: WRITE_CHAR(FLASH_BASE_ADDRESS, 0x20); WRITE_CHAR( (FLASH_BASE_ADDRESS + (sectorBaseAddress & 0xffffff00)), 0xd0); /* Poll on the flash */ while (true) { WRITE_CHAR(FLASH_BASE_ADDRESS, 0x70); READ_CHAR(FLASH_BASE_ADDRESS, ®Value); if ((regValue & 0x80) == 0x80) break; } break; case 2: if (FLASH_MODE == X16) { /* 1 device 16 bit. */ data20 = 0x0020;; dataD0 = 0x00d0;; } else { /* (FLASH_MODE = 8) ==> 2 devices , 8 bit each => 16bit */ data20 = 0x2020; dataD0 = 0xd0d0; } WRITE_SHORT(FLASH_BASE_ADDRESS, data20); WRITE_SHORT( (FLASH_BASE_ADDRESS + ((sectorBaseAddress * 2) & 0xffffff00)), dataD0); /* Poll on the flash */ if (FLASH_MODE == X16) { dataPoll = 0x0080; data70 = 0x0070; } else { /* (FLASH_MODE = 8) */ dataPoll = 0x8080; data70 = 0x7070; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + sectorBaseAddress * 2, data70); READ_SHORT(FLASH_BASE_ADDRESS + sectorBaseAddress * 2, ®Value); if ((regValue & 0x0080) == 0x0080) break; } break; case 4: if (FLASH_MODE == X16) { /* 2 devices , 16 bit each => 32bit */ data20 = 0x00200020; dataD0 = 0x00d000d0; } else { /* (FLASH_MODE = 8) ==> 4 devices , 8 bit each => 32bit */ data20 = 0x20202020; dataD0 = 0xd0d0d0d0; } WRITE_WORD(FLASH_BASE_ADDRESS, data20); WRITE_WORD( (FLASH_BASE_ADDRESS + ((sectorBaseAddress * 4) & 0xffffff00)), dataD0); /* Poll on the flash */ if (FLASH_MODE == X16) { dataPoll = 0x0080; data70 = 0x0070; } else { /* (FLASH_MODE = 8) */ dataPoll = 0x8080; data70 = 0x7070; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS, data70); READ_SHORT(FLASH_BASE_ADDRESS, ®Value); if ((regValue & dataPoll) == dataPoll) break; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + 2, data70); READ_SHORT(FLASH_BASE_ADDRESS + 2, ®Value); if ((regValue & dataPoll) == dataPoll) break; } break; case 8: if (FLASH_MODE == X16) { /* 4 devices , 16 bit each => 64bit */ data20 = 0x00200020; dataD0 = 0x00d000d0; } else { /* (FLASH_MODE = 8) ==> 8 devices , 8 bit each => 64bit */ data20 = 0x20202020; dataD0 = 0xd0d0d0d0; } WRITE_WORD(FLASH_BASE_ADDRESS, data20); WRITE_WORD( (FLASH_BASE_ADDRESS + ((sectorBaseAddress * 8) & 0xffffff00)), dataD0); WRITE_WORD(FLASH_BASE_ADDRESS + 4, data20); WRITE_WORD( (FLASH_BASE_ADDRESS + ((sectorBaseAddress * 8) & 0xffffff00 + 4)), dataD0); /* Poll on the flash */ if (FLASH_MODE == X16) { dataPoll = 0x0080; data70 = 0x0070; } else { /* (FLASH_MODE = 8) */ dataPoll = 0x8080; data70 = 0x7070; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + sectorBaseAddress * 8, data70); READ_SHORT(FLASH_BASE_ADDRESS + sectorBaseAddress * 8, ®Value); if ((regValue & dataPoll) == dataPoll) break; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + 2, data70); READ_SHORT(FLASH_BASE_ADDRESS + 2, ®Value); if ((regValue & dataPoll) == dataPoll) break; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + 4, data70); READ_SHORT(FLASH_BASE_ADDRESS + 4, ®Value); if ((regValue & dataPoll) == dataPoll) break; } while (true) { WRITE_SHORT(FLASH_BASE_ADDRESS + 6, data70); READ_SHORT(FLASH_BASE_ADDRESS + 6, ®Value); if ((regValue & dataPoll) == dataPoll) break; } break; default: return false; } } flashReset(); return true;}/********************************************************************* flashWriteWord - Write 32Bit to the FLASH memory at the given offset from the* FLASH base address.* address 0 = 0x00000000 !!* Attention!!! data "0" cannot be programed back to * "1" (only by first performing an earase operation).* The function takes care of Big/Little endian conversion** INPUTS: offset - The offset from the flash`s base address.* data - The data that should be written.* RETURNS: true on success,false on failure*********************************************************************/bool flashWriteWord(unsigned int offset, unsigned int data)
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