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📄 ethernet_mac.v

📁 altera epxa1的例子程序
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// megafunction wizard: %Ethernet MAC v1.1.0%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: auk_eth_adam_rmon 

// ============================================================
// File Name: ethernet_mac.v
// Megafunction Name(s):
// 			auk_eth_adam_rmon
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
// ************************************************************


//Copyright (C) 1991-2002 Altera Corporation
//Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
//support information,  device programming or simulation file,  and any other
//associated  documentation or information  provided by  Altera  or a partner
//under  Altera's   Megafunction   Partnership   Program  may  be  used  only
//to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
//other  use  of such  megafunction  design,  netlist,  support  information,
//device programming or simulation file,  or any other  related documentation
//or information  is prohibited  for  any  other purpose,  including, but not
//limited to  modification,  reverse engineering,  de-compiling, or use  with
//any other  silicon devices,  unless such use is  explicitly  licensed under
//a separate agreement with  Altera  or a megafunction partner.  Title to the
//intellectual property,  including patents,  copyrights,  trademarks,  trade
//secrets,  or maskworks,  embodied in any such megafunction design, netlist,
//support  information,  device programming or simulation file,  or any other
//related documentation or information provided by  Altera  or a megafunction
//partner, remains with Altera, the megafunction partner, or their respective
//licensors. No other licenses, including any licenses needed under any third
//party's intellectual property, are provided herein.


module ethernet_mac (
	ahb_hclk,
	ahb_hreset_n,
	ahb_clkdiv,
	ahb_bigendian,
	ahb_m_hgrant,
	ahb_m_hrdata,
	ahb_m_hready,
	ahb_m_hresp,
	ahb_s_hsel,
	ahb_s_haddr,
	ahb_s_hwdata,
	ahb_s_htrans,
	ahb_s_hwrite,
	ahb_s_hsize,
	ahb_s_hburst,
	ahb_s_hready_in,
	mii_txcol,
	mii_txclk,
	mii_rxcrs,
	mii_rxclk,
	mii_rxd,
	mii_rxdv,
	mii_rxer,
	mii_conn,
	mii_fd_n,
	mii_100m_n,
	mii_link_n,
	prom_di,
	cam_hit_n,
	ahb_hirq,
	ahb_m_hbusreq,
	ahb_m_hlock,
	ahb_m_haddr,
	ahb_m_hwdata,
	ahb_m_htrans,
	ahb_m_hwrite,
	ahb_m_hsize,
	ahb_m_hburst,
	ahb_s_hrdata,
	ahb_s_hready,
	ahb_s_hresp,
	mii_txd,
	mii_txen,
	mii_txer,
	mii_mdclk,
	mii_mdio,
	prom_do,
	prom_clk,
	prom_cs,
	cam_load);

	input	  ahb_hclk;
	input	  ahb_hreset_n;
	input	[1:0]  ahb_clkdiv;
	input	  ahb_bigendian;
	input	  ahb_m_hgrant;
	input	[31:0]  ahb_m_hrdata;
	input	  ahb_m_hready;
	input	[1:0]  ahb_m_hresp;
	input	  ahb_s_hsel;
	input	[9:0]  ahb_s_haddr;
	input	[31:0]  ahb_s_hwdata;
	input	[1:0]  ahb_s_htrans;
	input	  ahb_s_hwrite;
	input	[2:0]  ahb_s_hsize;
	input	[2:0]  ahb_s_hburst;
	input	  ahb_s_hready_in;
	input	  mii_txcol;
	input	  mii_txclk;
	input	  mii_rxcrs;
	input	  mii_rxclk;
	input	[3:0]  mii_rxd;
	input	  mii_rxdv;
	input	  mii_rxer;
	input	  mii_conn;
	input	  mii_fd_n;
	input	  mii_100m_n;
	input	  mii_link_n;
	input	  prom_di;
	input	  cam_hit_n;
	output	  ahb_hirq;
	output	  ahb_m_hbusreq;
	output	  ahb_m_hlock;
	output	[31:0]  ahb_m_haddr;
	output	[31:0]  ahb_m_hwdata;
	output	[1:0]  ahb_m_htrans;
	output	  ahb_m_hwrite;
	output	[2:0]  ahb_m_hsize;
	output	[2:0]  ahb_m_hburst;
	output	[31:0]  ahb_s_hrdata;
	output	  ahb_s_hready;
	output	[1:0]  ahb_s_hresp;
	output	[3:0]  mii_txd;
	output	  mii_txen;
	output	  mii_txer;
	output	  mii_mdclk;
	inout	  mii_mdio;
	output	  prom_do;
	output	  prom_clk;
	output	  prom_cs;
	output	  cam_load;

	wire [31:0] sub_wire0;
	wire [2:0] sub_wire1;
	wire  sub_wire2;
	wire [1:0] sub_wire3;
	wire [31:0] sub_wire4;
	wire  sub_wire5;
	wire  sub_wire6;
	wire  sub_wire7;
	wire [2:0] sub_wire8;
	wire  sub_wire9;
	wire [3:0] sub_wire10;
	wire [31:0] sub_wire11;
	wire  sub_wire12;
	wire  sub_wire13;
	wire  sub_wire14;
	wire  sub_wire15;
	wire  sub_wire16;
	wire  sub_wire17;
	wire  sub_wire18;
	wire [1:0] sub_wire19;
	wire [31:0] ahb_m_haddr = sub_wire0[31:0];
	wire [2:0] ahb_m_hsize = sub_wire1[2:0];
	wire  prom_do = sub_wire2;
	wire [1:0] ahb_s_hresp = sub_wire3[1:0];
	wire [31:0] ahb_s_hrdata = sub_wire4[31:0];
	wire  mii_mdclk = sub_wire5;
	wire  mii_txen = sub_wire6;
	wire  ahb_m_hwrite = sub_wire7;
	wire [2:0] ahb_m_hburst = sub_wire8[2:0];
	wire  prom_cs = sub_wire9;
	wire [3:0] mii_txd = sub_wire10[3:0];
	wire [31:0] ahb_m_hwdata = sub_wire11[31:0];
	wire  mii_txer = sub_wire12;
	wire  ahb_s_hready = sub_wire13;
	wire  ahb_m_hlock = sub_wire14;
	wire  prom_clk = sub_wire15;
	wire  ahb_m_hbusreq = sub_wire16;
	wire  ahb_hirq = sub_wire17;
	wire  cam_load = sub_wire18;
	wire [1:0] ahb_m_htrans = sub_wire19[1:0];

	auk_eth_adam_rmon	auk_eth_adam_rmon_component (
				.cam_hit_n (cam_hit_n),
				.mii_rxdv (mii_rxdv),
				.ahb_s_htrans (ahb_s_htrans),
				.ahb_m_hresp (ahb_m_hresp),
				.ahb_s_hsel (ahb_s_hsel),
				.ahb_clkdiv (ahb_clkdiv),
				.ahb_m_hrdata (ahb_m_hrdata),
				.ahb_m_hgrant (ahb_m_hgrant),
				.ahb_s_hready_in (ahb_s_hready_in),
				.ahb_s_haddr (ahb_s_haddr),
				.mii_conn (mii_conn),
				.ahb_bigendian (ahb_bigendian),
				.mii_fd_n (mii_fd_n),
				.mii_rxd (mii_rxd),
				.ahb_hclk (ahb_hclk),
				.mii_100m_n (mii_100m_n),
				.mii_mdio (mii_mdio),
				.ahb_s_hsize (ahb_s_hsize),
				.mii_rxclk (mii_rxclk),
				.mii_txcol (mii_txcol),
				.ahb_s_hwrite (ahb_s_hwrite),
				.ahb_m_hready (ahb_m_hready),
				.ahb_hreset_n (ahb_hreset_n),
				.mii_link_n (mii_link_n),
				.ahb_s_hburst (ahb_s_hburst),
				.mii_rxcrs (mii_rxcrs),
				.mii_txclk (mii_txclk),
				.ahb_s_hwdata (ahb_s_hwdata),
				.mii_rxer (mii_rxer),
				.prom_di (prom_di),
				.ahb_m_haddr (sub_wire0),
				.ahb_m_hsize (sub_wire1),
				.prom_do (sub_wire2),
				.ahb_s_hresp (sub_wire3),
				.ahb_s_hrdata (sub_wire4),
				.mii_mdclk (sub_wire5),
				.mii_txen (sub_wire6),
				.ahb_m_hwrite (sub_wire7),
				.ahb_m_hburst (sub_wire8),
				.prom_cs (sub_wire9),
				.mii_txd (sub_wire10),
				.ahb_m_hwdata (sub_wire11),
				.mii_txer (sub_wire12),
				.ahb_s_hready (sub_wire13),
				.ahb_m_hlock (sub_wire14),
				.prom_clk (sub_wire15),
				.ahb_m_hbusreq (sub_wire16),
				.ahb_hirq (sub_wire17),
				.cam_load (sub_wire18),
				.ahb_m_htrans (sub_wire19));

endmodule

// ============================================================
// CNX file retrieval info
// ============================================================
// Retrieval info: PRIVATE: TYPE STRING ADAM
// Retrieval info: PRIVATE: IS_RMON STRING true
// Retrieval info: USED_PORT: ahb_hclk 0 0 0 0 INPUT NODEFVAL ahb_hclk
// Retrieval info: USED_PORT: ahb_hreset_n 0 0 0 0 INPUT NODEFVAL ahb_hreset_n
// Retrieval info: USED_PORT: ahb_clkdiv 0 0 2 0 INPUT NODEFVAL ahb_clkdiv[1..0]
// Retrieval info: USED_PORT: ahb_hirq 0 0 0 0 OUTPUT NODEFVAL ahb_hirq
// Retrieval info: USED_PORT: ahb_bigendian 0 0 0 0 INPUT NODEFVAL ahb_bigendian
// Retrieval info: USED_PORT: ahb_m_hbusreq 0 0 0 0 OUTPUT NODEFVAL ahb_m_hbusreq
// Retrieval info: USED_PORT: ahb_m_hgrant 0 0 0 0 INPUT NODEFVAL ahb_m_hgrant
// Retrieval info: USED_PORT: ahb_m_hlock 0 0 0 0 OUTPUT NODEFVAL ahb_m_hlock
// Retrieval info: USED_PORT: ahb_m_haddr 0 0 32 0 OUTPUT NODEFVAL ahb_m_haddr[31..0]
// Retrieval info: USED_PORT: ahb_m_hwdata 0 0 32 0 OUTPUT NODEFVAL ahb_m_hwdata[31..0]
// Retrieval info: USED_PORT: ahb_m_hrdata 0 0 32 0 INPUT NODEFVAL ahb_m_hrdata[31..0]
// Retrieval info: USED_PORT: ahb_m_htrans 0 0 2 0 OUTPUT NODEFVAL ahb_m_htrans[1..0]
// Retrieval info: USED_PORT: ahb_m_hwrite 0 0 0 0 OUTPUT NODEFVAL ahb_m_hwrite
// Retrieval info: USED_PORT: ahb_m_hsize 0 0 3 0 OUTPUT NODEFVAL ahb_m_hsize[2..0]
// Retrieval info: USED_PORT: ahb_m_hburst 0 0 3 0 OUTPUT NODEFVAL ahb_m_hburst[2..0]
// Retrieval info: USED_PORT: ahb_m_hready 0 0 0 0 INPUT NODEFVAL ahb_m_hready
// Retrieval info: USED_PORT: ahb_m_hresp 0 0 2 0 INPUT NODEFVAL ahb_m_hresp[1..0]
// Retrieval info: USED_PORT: ahb_s_hsel 0 0 0 0 INPUT NODEFVAL ahb_s_hsel
// Retrieval info: USED_PORT: ahb_s_haddr 0 0 10 0 INPUT NODEFVAL ahb_s_haddr[9..0]
// Retrieval info: USED_PORT: ahb_s_hwdata 0 0 32 0 INPUT NODEFVAL ahb_s_hwdata[31..0]
// Retrieval info: USED_PORT: ahb_s_hrdata 0 0 32 0 OUTPUT NODEFVAL ahb_s_hrdata[31..0]
// Retrieval info: USED_PORT: ahb_s_htrans 0 0 2 0 INPUT NODEFVAL ahb_s_htrans[1..0]
// Retrieval info: USED_PORT: ahb_s_hwrite 0 0 0 0 INPUT NODEFVAL ahb_s_hwrite
// Retrieval info: USED_PORT: ahb_s_hsize 0 0 3 0 INPUT NODEFVAL ahb_s_hsize[2..0]
// Retrieval info: USED_PORT: ahb_s_hburst 0 0 3 0 INPUT NODEFVAL ahb_s_hburst[2..0]
// Retrieval info: USED_PORT: ahb_s_hready 0 0 0 0 OUTPUT NODEFVAL ahb_s_hready
// Retrieval info: USED_PORT: ahb_s_hresp 0 0 2 0 OUTPUT NODEFVAL ahb_s_hresp[1..0]
// Retrieval info: USED_PORT: ahb_s_hready_in 0 0 0 0 INPUT NODEFVAL ahb_s_hready_in
// Retrieval info: USED_PORT: mii_txcol 0 0 0 0 INPUT NODEFVAL mii_txcol
// Retrieval info: USED_PORT: mii_txclk 0 0 0 0 INPUT NODEFVAL mii_txclk
// Retrieval info: USED_PORT: mii_txd 0 0 4 0 OUTPUT NODEFVAL mii_txd[3..0]
// Retrieval info: USED_PORT: mii_txen 0 0 0 0 OUTPUT NODEFVAL mii_txen
// Retrieval info: USED_PORT: mii_txer 0 0 0 0 OUTPUT NODEFVAL mii_txer
// Retrieval info: USED_PORT: mii_rxcrs 0 0 0 0 INPUT NODEFVAL mii_rxcrs
// Retrieval info: USED_PORT: mii_rxclk 0 0 0 0 INPUT NODEFVAL mii_rxclk
// Retrieval info: USED_PORT: mii_rxd 0 0 4 0 INPUT NODEFVAL mii_rxd[3..0]
// Retrieval info: USED_PORT: mii_rxdv 0 0 0 0 INPUT NODEFVAL mii_rxdv
// Retrieval info: USED_PORT: mii_rxer 0 0 0 0 INPUT NODEFVAL mii_rxer
// Retrieval info: USED_PORT: mii_mdclk 0 0 0 0 OUTPUT NODEFVAL mii_mdclk
// Retrieval info: USED_PORT: mii_mdio 0 0 0 0 BIDIR NODEFVAL mii_mdio
// Retrieval info: USED_PORT: mii_conn 0 0 0 0 INPUT NODEFVAL mii_conn
// Retrieval info: USED_PORT: mii_fd_n 0 0 0 0 INPUT NODEFVAL mii_fd_n
// Retrieval info: USED_PORT: mii_100m_n 0 0 0 0 INPUT NODEFVAL mii_100m_n
// Retrieval info: USED_PORT: mii_link_n 0 0 0 0 INPUT NODEFVAL mii_link_n
// Retrieval info: USED_PORT: prom_di 0 0 0 0 INPUT NODEFVAL prom_di
// Retrieval info: USED_PORT: prom_do 0 0 0 0 OUTPUT NODEFVAL prom_do
// Retrieval info: USED_PORT: prom_clk 0 0 0 0 OUTPUT NODEFVAL prom_clk
// Retrieval info: USED_PORT: prom_cs 0 0 0 0 OUTPUT NODEFVAL prom_cs
// Retrieval info: USED_PORT: cam_load 0 0 0 0 OUTPUT NODEFVAL cam_load
// Retrieval info: USED_PORT: cam_hit_n 0 0 0 0 INPUT NODEFVAL cam_hit_n
// Retrieval info: CONNECT: @ahb_hclk 0 0 0 0 ahb_hclk 0 0 0 0
// Retrieval info: CONNECT: @ahb_hreset_n 0 0 0 0 ahb_hreset_n 0 0 0 0
// Retrieval info: CONNECT: @ahb_clkdiv 0 0 2 0 ahb_clkdiv 0 0 2 0
// Retrieval info: CONNECT: ahb_hirq 0 0 0 0 @ahb_hirq 0 0 0 0
// Retrieval info: CONNECT: @ahb_bigendian 0 0 0 0 ahb_bigendian 0 0 0 0
// Retrieval info: CONNECT: ahb_m_hbusreq 0 0 0 0 @ahb_m_hbusreq 0 0 0 0
// Retrieval info: CONNECT: @ahb_m_hgrant 0 0 0 0 ahb_m_hgrant 0 0 0 0
// Retrieval info: CONNECT: ahb_m_hlock 0 0 0 0 @ahb_m_hlock 0 0 0 0
// Retrieval info: CONNECT: ahb_m_haddr 0 0 32 0 @ahb_m_haddr 0 0 32 0
// Retrieval info: CONNECT: ahb_m_hwdata 0 0 32 0 @ahb_m_hwdata 0 0 32 0
// Retrieval info: CONNECT: @ahb_m_hrdata 0 0 32 0 ahb_m_hrdata 0 0 32 0
// Retrieval info: CONNECT: ahb_m_htrans 0 0 2 0 @ahb_m_htrans 0 0 2 0
// Retrieval info: CONNECT: ahb_m_hwrite 0 0 0 0 @ahb_m_hwrite 0 0 0 0
// Retrieval info: CONNECT: ahb_m_hsize 0 0 3 0 @ahb_m_hsize 0 0 3 0
// Retrieval info: CONNECT: ahb_m_hburst 0 0 3 0 @ahb_m_hburst 0 0 3 0
// Retrieval info: CONNECT: @ahb_m_hready 0 0 0 0 ahb_m_hready 0 0 0 0
// Retrieval info: CONNECT: @ahb_m_hresp 0 0 2 0 ahb_m_hresp 0 0 2 0
// Retrieval info: CONNECT: @ahb_s_hsel 0 0 0 0 ahb_s_hsel 0 0 0 0
// Retrieval info: CONNECT: @ahb_s_haddr 0 0 10 0 ahb_s_haddr 0 0 10 0
// Retrieval info: CONNECT: @ahb_s_hwdata 0 0 32 0 ahb_s_hwdata 0 0 32 0
// Retrieval info: CONNECT: ahb_s_hrdata 0 0 32 0 @ahb_s_hrdata 0 0 32 0
// Retrieval info: CONNECT: @ahb_s_htrans 0 0 2 0 ahb_s_htrans 0 0 2 0
// Retrieval info: CONNECT: @ahb_s_hwrite 0 0 0 0 ahb_s_hwrite 0 0 0 0
// Retrieval info: CONNECT: @ahb_s_hsize 0 0 3 0 ahb_s_hsize 0 0 3 0
// Retrieval info: CONNECT: @ahb_s_hburst 0 0 3 0 ahb_s_hburst 0 0 3 0
// Retrieval info: CONNECT: ahb_s_hready 0 0 0 0 @ahb_s_hready 0 0 0 0
// Retrieval info: CONNECT: ahb_s_hresp 0 0 2 0 @ahb_s_hresp 0 0 2 0
// Retrieval info: CONNECT: @ahb_s_hready_in 0 0 0 0 ahb_s_hready_in 0 0 0 0
// Retrieval info: CONNECT: @mii_txcol 0 0 0 0 mii_txcol 0 0 0 0
// Retrieval info: CONNECT: @mii_txclk 0 0 0 0 mii_txclk 0 0 0 0
// Retrieval info: CONNECT: mii_txd 0 0 4 0 @mii_txd 0 0 4 0
// Retrieval info: CONNECT: mii_txen 0 0 0 0 @mii_txen 0 0 0 0
// Retrieval info: CONNECT: mii_txer 0 0 0 0 @mii_txer 0 0 0 0
// Retrieval info: CONNECT: @mii_rxcrs 0 0 0 0 mii_rxcrs 0 0 0 0
// Retrieval info: CONNECT: @mii_rxclk 0 0 0 0 mii_rxclk 0 0 0 0
// Retrieval info: CONNECT: @mii_rxd 0 0 4 0 mii_rxd 0 0 4 0
// Retrieval info: CONNECT: @mii_rxdv 0 0 0 0 mii_rxdv 0 0 0 0
// Retrieval info: CONNECT: @mii_rxer 0 0 0 0 mii_rxer 0 0 0 0
// Retrieval info: CONNECT: mii_mdclk 0 0 0 0 @mii_mdclk 0 0 0 0
// Retrieval info: CONNECT: @mii_mdio 0 0 0 0 mii_mdio 0 0 0 0
// Retrieval info: CONNECT: @mii_conn 0 0 0 0 mii_conn 0 0 0 0
// Retrieval info: CONNECT: @mii_fd_n 0 0 0 0 mii_fd_n 0 0 0 0
// Retrieval info: CONNECT: @mii_100m_n 0 0 0 0 mii_100m_n 0 0 0 0
// Retrieval info: CONNECT: @mii_link_n 0 0 0 0 mii_link_n 0 0 0 0
// Retrieval info: CONNECT: @prom_di 0 0 0 0 prom_di 0 0 0 0
// Retrieval info: CONNECT: prom_do 0 0 0 0 @prom_do 0 0 0 0
// Retrieval info: CONNECT: prom_clk 0 0 0 0 @prom_clk 0 0 0 0
// Retrieval info: CONNECT: prom_cs 0 0 0 0 @prom_cs 0 0 0 0
// Retrieval info: CONNECT: cam_load 0 0 0 0 @cam_load 0 0 0 0
// Retrieval info: CONNECT: @cam_hit_n 0 0 0 0 cam_hit_n 0 0 0 0

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