ethernet_mac.cmp

altera epxa1的例子程序

--Copyright (C) 1991-2002 Altera Corporation
--Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
--support information,  device programming or simulation file,  and any other
--associated  documentation or information  provided by  Altera  or a partner
--under  Altera's   Megafunction   Partnership   Program  may  be  used  only
--to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
--other  use  of such  megafunction  design,  netlist,  support  information,
--device programming or simulation file,  or any other  related documentation
--or information  is prohibited  for  any  other purpose,  including, but not
--limited to  modification,  reverse engineering,  de-compiling, or use  with
--any other  silicon devices,  unless such use is  explicitly  licensed under
--a separate agreement with  Altera  or a megafunction partner.  Title to the
--intellectual property,  including patents,  copyrights,  trademarks,  trade
--secrets,  or maskworks,  embodied in any such megafunction design, netlist,
--support  information,  device programming or simulation file,  or any other
--related documentation or information provided by  Altera  or a megafunction
--partner, remains with Altera, the megafunction partner, or their respective
--licensors. No other licenses, including any licenses needed under any third
--party's intellectual property, are provided herein.


component ethernet_mac
	PORT
	(
		ahb_hclk		: IN STD_LOGIC ;
		ahb_hreset_n		: IN STD_LOGIC ;
		ahb_clkdiv		: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
		ahb_bigendian		: IN STD_LOGIC ;
		ahb_m_hgrant		: IN STD_LOGIC ;
		ahb_m_hrdata		: IN STD_LOGIC_VECTOR (31 DOWNTO 0);
		ahb_m_hready		: IN STD_LOGIC ;
		ahb_m_hresp		: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
		ahb_s_hsel		: IN STD_LOGIC ;
		ahb_s_haddr		: IN STD_LOGIC_VECTOR (9 DOWNTO 0);
		ahb_s_hwdata		: IN STD_LOGIC_VECTOR (31 DOWNTO 0);
		ahb_s_htrans		: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
		ahb_s_hwrite		: IN STD_LOGIC ;
		ahb_s_hsize		: IN STD_LOGIC_VECTOR (2 DOWNTO 0);
		ahb_s_hburst		: IN STD_LOGIC_VECTOR (2 DOWNTO 0);
		ahb_s_hready_in		: IN STD_LOGIC ;
		mii_txcol		: IN STD_LOGIC ;
		mii_txclk		: IN STD_LOGIC ;
		mii_rxcrs		: IN STD_LOGIC ;
		mii_rxclk		: IN STD_LOGIC ;
		mii_rxd		: IN STD_LOGIC_VECTOR (3 DOWNTO 0);
		mii_rxdv		: IN STD_LOGIC ;
		mii_rxer		: IN STD_LOGIC ;
		mii_conn		: IN STD_LOGIC ;
		mii_fd_n		: IN STD_LOGIC ;
		mii_100m_n		: IN STD_LOGIC ;
		mii_link_n		: IN STD_LOGIC ;
		prom_di		: IN STD_LOGIC ;
		cam_hit_n		: IN STD_LOGIC ;
		ahb_hirq		: OUT STD_LOGIC ;
		ahb_m_hbusreq		: OUT STD_LOGIC ;
		ahb_m_hlock		: OUT STD_LOGIC ;
		ahb_m_haddr		: OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
		ahb_m_hwdata		: OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
		ahb_m_htrans		: OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
		ahb_m_hwrite		: OUT STD_LOGIC ;
		ahb_m_hsize		: OUT STD_LOGIC_VECTOR (2 DOWNTO 0);
		ahb_m_hburst		: OUT STD_LOGIC_VECTOR (2 DOWNTO 0);
		ahb_s_hrdata		: OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
		ahb_s_hready		: OUT STD_LOGIC ;
		ahb_s_hresp		: OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
		mii_txd		: OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
		mii_txen		: OUT STD_LOGIC ;
		mii_txer		: OUT STD_LOGIC ;
		mii_mdclk		: OUT STD_LOGIC ;
		mii_mdio		: INOUT STD_LOGIC ;
		prom_do		: OUT STD_LOGIC ;
		prom_clk		: OUT STD_LOGIC ;
		prom_cs		: OUT STD_LOGIC ;
		cam_load		: OUT STD_LOGIC 
	);
end component;