timer00.h

altera epxa1的例子程序

#ifndef __TIMER00_H
#define __TIMER00_H

/*
 * Register definitions for the timers
 */

/*
 * Copyright (c) Altera Corporation 2000.
 * All rights reserved.
 */

#define TIMER0_CR(base_addr) (TIMER00_TYPE (base_addr  + 0x00 ))
#define TIMER0_CR_B_MSK (0x20)
#define TIMER0_CR_B_OFST (0x5)
#define TIMER0_CR_S_MSK  (0x10)
#define TIMER0_CR_S_OFST (0x4)
#define TIMER0_CR_CI_MSK (0x08)
#define TIMER0_CR_CI_OFST (0x3)
#define TIMER0_CR_IE_MSK (0x04)
#define TIMER0_CR_IE_OFST (0x2)
#define TIMER0_CR_MODE_MSK (0x3)
#define TIMER0_CR_MODE_OFST (0)
#define TIMER0_CR_MODE_FREE (0)
#define TIMER0_CR_MODE_ONE  (1)
#define TIMER0_CR_MODE_INTVL (2)

#define TIMER0_SR(base_addr) (TIMER00_TYPE (base_addr  + 0x00 ))
#define TIMER0_SR_B_MSK (0x20)
#define TIMER0_SR_B_OFST (0x5)
#define TIMER0_SR_S_MSK  (0x10)
#define TIMER0_SR_S_OFST (0x4)
#define TIMER0_SR_IS_MSK (0x08)
#define TIMER0_SR_IS_OFST (0x3)
#define TIMER0_SR_IE_MSK (0x04)
#define TIMER0_SR_IE_OFST (0x2)
#define TIMER0_SR_MODE_MSK (0x3)
#define TIMER0_SR_MODE_OFST (0)
#define TIMER0_SR_MODE_FREE (0)
#define TIMER0_SR_MODE_ONE  (1)
#define TIMER0_SR_MODE_INTVL (2)

#define TIMER0_PRESCALE(base_addr) (TIMER00_TYPE (base_addr  + 0x010 ))
#define TIMER0_LIMIT(base_addr) (TIMER00_TYPE (base_addr  + 0x020 ))
#define TIMER0_READ(base_addr) (TIMER00_TYPE (base_addr  + 0x030 ))

#define TIMER1_CR(base_addr) (TIMER00_TYPE (base_addr  + 0x40 ))
#define TIMER1_CR_B_MSK (0x20)
#define TIMER1_CR_B_OFST (0x5)
#define TIMER1_CR_S_MSK  (0x10)
#define TIMER1_CR_S_OFST (0x4)
#define TIMER1_CR_CI_MSK (0x08)
#define TIMER1_CR_CI_OFST (0x3)
#define TIMER1_CR_IE_MSK (0x04)
#define TIMER1_CR_IE_OFST (0x2)
#define TIMER1_CR_MODE_MSK (0x3)
#define TIMER1_CR_MODE_OFST (0)
#define TIMER1_CR_MODE_FREE (0)
#define TIMER1_CR_MODE_ONE  (1)
#define TIMER1_CR_MODE_INTVL (2)

#define TIMER1_SR(base_addr) (TIMER00_TYPE (base_addr  + 0x40 ))
#define TIMER1_SR_B_MSK (0x20)
#define TIMER1_SR_B_OFST (0x5)
#define TIMER1_SR_S_MSK  (0x10)
#define TIMER1_SR_S_OFST (0x4)
#define TIMER1_SR_IS_MSK (0x08)
#define TIMER1_SR_IS_OFST (0x3)
#define TIMER1_SR_IE_MSK (0x04)
#define TIMER1_SR_IE_OFST (0x2)
#define TIMER1_SR_MODE_MSK (0x3)
#define TIMER1_SR_MODE_OFST (0)
#define TIMER1_SR_MODE_FREE (0)
#define TIMER1_SR_MODE_ONE  (1)
#define TIMER1_SR_MODE_INTVL (2)

#define TIMER1_PRESCALE(base_addr) (TIMER00_TYPE (base_addr  + 0x050 ))
#define TIMER1_LIMIT(base_addr) (TIMER00_TYPE (base_addr  + 0x060 ))
#define TIMER1_READ(base_addr) (TIMER00_TYPE (base_addr  + 0x070 ))

#endif /* __TIMER00_H */