wave_interconnect_matrix.do

altera epxa1的例子程序

add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HRESETn
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HADDR_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HTRANS_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HSIZE_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HBURST_layer1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWRITE_layer1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HREADY_in_layer1
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWDATA_layer1
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HADDR_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HTRANS_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HSIZE_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HBURST_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWRITE_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HREADY_in_layer2
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWDATA_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/layer1_req
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/layer2_req
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HADDR_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HTRANS_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HSIZE_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HBURST_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWRITE_slave
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HWDATA_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/HREADY_in_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/layer_granted
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave2/layer_granted_delay
add wave -noupdate -divider {interconnect mux slave3}
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HRESETn
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HADDR_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HTRANS_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HSIZE_layer1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HBURST_layer1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWRITE_layer1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HREADY_in_layer1
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWDATA_layer1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/layer1_req
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HADDR_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HTRANS_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HSIZE_layer2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HBURST_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWRITE_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HREADY_in_layer2
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWDATA_layer2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/layer2_req
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HADDR_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HTRANS_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HSIZE_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HBURST_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWRITE_slave
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HWDATA_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/HREADY_in_slave
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/layer_granted_delay
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_slave3/layer_granted
add wave -noupdate -divider {interconnect mux resp layer 1}
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HSEL
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_slave1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRESP_slave1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HSEL_delayed
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_layer_wait
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_layer_slave
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRDATA_slave1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/layer_granted_slave1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_slave2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRESP_slave2
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRDATA_slave2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/layer_granted_slave2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_slave3
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRESP_slave3
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRDATA_slave3
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/layer_granted_slave3
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HREADY_out_layer
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRESP_layer
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer1/HRDATA_layer
add wave -noupdate -divider {interconnect mux resp layer2}
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HTRANS
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_layer_wait
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_layer_slave
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HSEL
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HSEL_delayed
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/layer_granted_slave1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/layer_granted_slave2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/layer_granted_slave3
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_slave1
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_slave2
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_slave3
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRESP_slave1
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRDATA_slave1
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRESP_slave2
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRDATA_slave2
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRESP_slave3
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRDATA_slave3
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HREADY_out_layer
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRESP_layer
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/interconnect_matrix/interconnect_mux_resp_layer2/HRDATA_layer
add wave -noupdate -divider {decoder layer1}
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HRESETn
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HSEL
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer1/HSEL_delayed
add wave -noupdate -divider {decoder layer2}
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HRESETn
add wave -noupdate -format Logic /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HSEL
add wave -noupdate -format Literal /ahb_bus_tb/dut/interconnect_matrix/interconnect_decoder_layer2/HSEL_delayed
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {1185 ns}
WaveRestoreZoom {839305 ps} {1003028 ps}
configure wave -namecolwidth 503
configure wave -valuecolwidth 64
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0