📄 testutil.~cp
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_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.RevisionID != orig.RevisionID)
{
printf ("Bad config.RevisionID read/write/read. Was %04x. Should be %04x\n",
temp.RevisionID, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.ProgIf != orig.ProgIf)
{
printf ("Bad config.ProgIf read/write/read. Was %04x. Should be %04x\n",
temp.ProgIf, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.SubClass != orig.SubClass)
{
printf ("Bad config.SubClass read/write/read. Was %04x. Should be %04x\n",
temp.SubClass, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.BaseClass != orig.BaseClass)
{
printf ("Bad config.BaseClass read/write/read. Was %04x. Should be %04x\n",
temp.BaseClass, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.CardBusCISPtr != orig.CardBusCISPtr)
{
printf ("Bad config.CardBusCISPtr read/write/read. Was %04x. Should be %04x\n",
temp.CardBusCISPtr, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.SubsystemID != orig.SubsystemID)
{
printf ("Bad config.SubsystemID read/write/read. Was %04x. Should be %04x\n",
temp.SubsystemID, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.SubsystemVendorID != orig.SubsystemVendorID)
{
printf ("Bad config.SubsystemVendorID read/write/read. Was %04x. Should be %04x\n",
temp.SubsystemVendorID, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.MaximumLatency != orig.MaximumLatency)
{
printf ("Bad config.MaximumLatency read/write/read. Was %04x. Should be %04x\n",
temp.MaximumLatency, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.MinimumGrant != orig.MinimumGrant)
{
printf ("Bad config.MinimumGrant read/write/read. Was %04x. Should be %04x\n",
temp.MinimumGrant, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.InterruptPin != orig.InterruptPin)
{
printf ("Bad config.InterruptPin read/write/read. Was %04x. Should be %04x\n",
temp.InterruptPin, orig.VendorID);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
// Complement the complement (to restore the original). Write them back.
temp.Command = ~temp.Command;
temp.Status = ~temp.Status;
temp.LatencyTimer = ~temp.LatencyTimer;
temp.BaseAddresses[0] = ~temp.BaseAddresses[0];
temp.BaseAddresses[1] = ~temp.BaseAddresses[1];
temp.CacheLineSize = 0x08; // this is the only valid value
temp.InterruptLine = ~temp.InterruptLine;
comemSetPCIInfoL(&temp, comemID);
// Read them to confirm that they are restored.
returnStat = callGetPCIInfo(&temp, comemID);
printf ("Restored: Command=%04x Status=%04x Lat=%02x BAR0=%08x BAR1=%08x CacheLS=%02x IntLine=%02x\n",
temp.Command, temp.Status, temp.LatencyTimer, temp.BaseAddresses[0], temp.BaseAddresses[1],
temp.CacheLineSize, temp.InterruptLine);
_flushall();
// Check Config Regs.
if (temp.Command != orig.Command)
{
printf ("Bad config.Command read/write/read. Was %04x. Should be %04x\n",
temp.Command, orig.Command);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.Status != orig.Status) // Since config.Status is Read-only, better be correct.
{
printf ("Bad config.Status read/write/read. Was %04x. Should be %04x\n",
temp.Status, orig.Status);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.LatencyTimer != orig.LatencyTimer)
{
printf ("Bad config.LatencyTimer read/write/read. Was %02x. Should be %02x\n",
temp.LatencyTimer, orig.LatencyTimer);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.BaseAddresses[0] != orig.BaseAddresses[0])
{
printf ("Bad config.BaseAddresses[0] read/write/read. Was %08x. Should be %08x\n",
temp.BaseAddresses[0], orig.BaseAddresses[0]);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.BaseAddresses[1] != orig.BaseAddresses[1])
{
printf ("Bad config.BaseAddresses[1] read/write/read. Was %08x. Should be %08x\n",
temp.BaseAddresses[1], orig.BaseAddresses[1]);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.CacheLineSize != orig.CacheLineSize)
{
printf ("Bad config.CacheLineSize read/write/read. Was %02x. Should be %02x\n",
temp.CacheLineSize, orig.CacheLineSize);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
if (temp.InterruptLine != orig.InterruptLine)
{
printf ("Bad config.InterruptLine read/write/read. Was %02x. Should be %02x\n",
temp.InterruptLine, orig.InterruptLine);
_flushall();
returnCode = ERROR_CONFIG_REG_TEST;
}
return (returnCode);
}
void PrintBuf(PUCHAR pvBuf, DWORD addr, DWORD len)
{
DWORD i;
printf("Addr: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
// if(!(addr%16)) // prime first line i.e. addr==0x0011 0010: ff
// printf("\n%04x: %s", addr-(addr%16), );
for(i=addr; i < (addr+len); i++)
{
if(!(i%16))
printf("\n%04x: %02x", i, *(pvBuf+(i-addr)));
else
printf(" %02x", *(pvBuf+(i-addr)));
}
printf("\n");
}
// A wrapper so we do error checking, but don't have to code it every time we call the VxD.
DWORD callReadEeprom (DWORD addr, unsigned char *blockptr, DWORD size, DWORD comemID)
{
DWORD returnCode;
printf ("Reading EEPROM contents...\n");
returnCode = readEepromL(addr, blockptr, size, comemID);
if (returnCode == NO_ERROR)
{
PrintBuf(blockptr, addr, size);
printf ("Read EEPROM contents complete\n");
}
else
{
printf ("Read EEPROM contents Failed\n");
}
return returnCode;
}
// A wrapper so we do error checking, but don't have to code it every time we call the VxD.
DWORD callWriteEeprom (DWORD addr, unsigned char *blockptr, DWORD size, DWORD comemID)
{
DWORD returnCode;
printf ("Writing EEPROM contents...\n");
returnCode = writeEepromL(addr, blockptr, size, comemID);
printf ("Write EEPROM contents complete\n");
if (returnCode != NO_ERROR)
{
reportErrorCodeL(returnCode, "while writing EEPROM.");
}
return returnCode;
}
#define EEPROMsize 0x78
void zeroEEPROM (DWORD comemID)
{
UCHAR temp[EEPROMsize];
for (int i = 0 ; i < EEPROMsize ; i++)
temp[i] = 0xFF ;
callWriteEeprom (0, &temp[0], EEPROMsize, comemID);
}
DWORD readEepromFunc(DWORD comemID)
{
DWORD returnCode;
UCHAR orig[EEPROMsize];
int errorCnt = 0;
printf ("EEPROM Reads can take up to 10 seconds.\n");
printf ("Please wait for read to complete.\n");
memset(orig, 0x0, sizeof(orig));
returnCode = callReadEeprom (0, &orig[0], EEPROMsize, comemID); // Read original contents.
if (returnCode != NO_ERROR) errorCnt++;
return(errorCnt);
}
void checkEEPROM (DWORD comemID)
{
DWORD returnCode;
UCHAR temp[EEPROMsize];
int nEepromContMatch = 1;
int errorCnt = 0;
DWORD dwReadMem[EEPROMsize];
UCHAR MasterEnableBit; // _BBX Add check for PCI Bus Master Enable Bit
UCHAR EEPROMMasterBus; // _BBX Add check for EEPROM PCI Bus Master Enable Bit
UCHAR HostControlBit; // _BBX Add check for Host Control Bit 0, (RST_OUTD)
UCHAR EEPROMCntrlBit; // _BBX Add check for EEPROM Host Control Bit 0
UCHAR EEPROMIntrPin; // _BBX EEPROM Interrupt Pin is only bits [2:0]
// _BBX reformat for better reading.
// check to see if current contents match memory
memset(temp, 0x0, sizeof(temp));
returnCode = callReadEeprom (0, &temp[0], EEPROMsize, comemID); // Read contents.
// _BBX EEPROM signature is only at locations 0x42 and 0x43
// if( (temp[0x40] != 0x37) || (temp[0x41] != 0x48) || (temp[0x42] != 0x37) || (temp[0x43] != 0x48) )
if( (temp[0x42] != 0x37) || (temp[0x43] != 0x48) )
{ // don't check or report errors if eeprom empty or has invalid signature
printf("EEPROM is disconnected, unprogrammed, or has invalid signature.\n");
printf("==> Check not run. <==\n\n");
return;
}
printf("Checking to see if EEPROM contents transferred correctly to the PCI-DP\n");
printf("PARAMETER PCI-DP EEPROM\n");
// check the data fields that are transferred to the PCI Configuration space
PCI_CONFIG_HEADER_0 PciCfg;
returnCode = callGetPCIInfo(&PciCfg, comemID);
printf("VendorID %04x %02x%02x", PciCfg.VendorID, temp[0x45], temp[0x44]);
if(PciCfg.VendorID != (temp[0x45]<<8)+temp[0x44])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("DeviceID %04x %02x%02x", PciCfg.DeviceID, temp[0x47], temp[0x46]);
if(PciCfg.DeviceID != (temp[0x47]<<8)+temp[0x46])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("RevisionID %02x %02x", PciCfg.RevisionID, temp[0x48]);
if(PciCfg.RevisionID != temp[0x48])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("ProgIf %02x %02x", PciCfg.ProgIf, temp[0x49]);
if(PciCfg.ProgIf != temp[0x49])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("SubClass %02x %02x", PciCfg.SubClass, temp[0x4A]);
if(PciCfg.SubClass != temp[0x4A])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("BaseClass %02x %02x", PciCfg.BaseClass, temp[0x4B]);
if(PciCfg.BaseClass != temp[0x4B])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("CardBusCISPtr %08x %02x%02x%02x%02x", PciCfg.CardBusCISPtr,
temp[0x57], temp[0x56], temp[0x55], temp[0x54]);
if(PciCfg.CardBusCISPtr != (ULONG)((temp[0x57]<<24)+(temp[0x56]<<16)+(temp[0x55]<<8)+temp[0x54]))
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("SubsysVendorID %04x %02x%02x", PciCfg.SubsystemVendorID, temp[0x4D], temp[0x4C]);
if(PciCfg.SubsystemVendorID != (temp[0x4D]<<8)+temp[0x4C])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("SubsysDevID %04x %02x%02x", PciCfg.SubsystemID, temp[0x4F], temp[0x4E]);
if(PciCfg.SubsystemID != (temp[0x4F]<<8)+temp[0x4E])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
EEPROMIntrPin = (temp[0x51] & 0x7); // Get Bits 2-0 of EEPROM Interrupt Pin
printf("InterruptPin %02x %02x", PciCfg.InterruptPin, EEPROMIntrPin);
if(PciCfg.InterruptPin != EEPROMIntrPin)
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("MinimumGrant %02x %02x", PciCfg.MinimumGrant, temp[0x52]);
if(PciCfg.MinimumGrant != temp[0x52])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
printf("MaximumLatency %02x %02x", PciCfg.MaximumLatency, temp[0x53]);
if(PciCfg.MaximumLatency != temp[0x53])
{
nEepromContMatch = 0;
printf(" <== ERROR.");
}
printf("\n");
// _BBX Add check for PCI Bus Master Enable
MasterEnableBit = ((PciCfg.Command & 0x04)>>2); // Get Bit 2 of PCI Command field
EEPROMMasterBus = ((temp[0x51] & 0x80)>>7); // Get Bit 7 of EEPROM Interrupt Pin field
printf("MasterEnableBit %01x %01x", MasterEnableBit, EEPROMMasterBus);
if(MasterEnableBit != EEPROMMasterBus)
{
nEepromContMatch = 0;
printf(" <== Possible error.");
}
printf("\n");
// Check the data fields that are transferred to the Operations Registers
// _BBX Update for Rev B, LBUSCFG was 16 bits, now 21 bits
readLocal(comemID, dwReadMem, (DWORD)0x4FC, 1);
printf("LocalBusConfig %02x%02x%02x %02x%02x%02x",
*((UCHAR*)dwReadMem+2), *((UCHAR*)dwReadMem+1), *((UCHAR*)dwReadMem+0),
temp[0x6E], temp[0x6D], temp[0x6C]);
if(memcmp(&temp[0x6C], (UCHAR*)dwReadMem, 3))
{ nEepromContMatch = 0;
printf(" <== Possible error.");
}
printf("\n");
// _BBX add check of HCTL, bit 0
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