comem_if.h

一个amccs5933芯片的驱动程序开发源程序和部分文档

//////////////////////////////////////////////////////////////////////
//
// File: comem_if.h 
//
// $Archive: /ComemL/Host/Perf42/comem_if.h $
//
// Purpose:  Constants and function defs to interface to the comem hardware.
//           See also comemdrv.h.
//
// $Author: Tpm $
//
// $History: comem_if.h $
//  
//  *****************  Version 1  *****************
//  User: Tpm          Date: 2/02/99    Time: 5:03p
//  Created in $/ComemL/Host/Perf42
//  
//  *****************  Version 23  *****************
//  User: Stevek       Date: 12/10/97   Time: 8:18a
//  Updated in $/Comem/Mapper
//  Added copyBarPtr call to the library.
//  
//  *****************  Version 22  *****************
//  User: Stevek       Date: 11/11/97   Time: 4:24p
//  Updated in $/Comem/Mapper
//  Changed addin to target in column heading
//  
//  *****************  Version 21  *****************
//  User: Stevek       Date: 11/05/97   Time: 11:17p
//  Updated in $/Comem/Mapper
//  Added reference count to permit mapper to check for multiple mappers on
//  a single comem.
//  
//  *****************  Version 20  *****************
//  User: Stevek       Date: 10/30/97   Time: 8:49a
//  Updated in $/Comem/Mapper
//  Fixed compatability problems with driver.
//  
//  *****************  Version 19  *****************
//  User: Stevek       Date: 10/28/97   Time: 9:57a
//  Updated in $/Comem/Mapper
//  More seperation for seperate library file.
//  Removed embeddedSystems stuff.
//  
//  *****************  Version 18  *****************
//  User: Stevek       Date: 10/27/97   Time: 1:16p
//  Updated in $/Comem/Mapper
//  Moved interface functions into the comem_if.lib file.
//  
//  *****************  Version 17  *****************
//  User: Stevek       Date: 10/24/97   Time: 3:55p
//  Updated in $/Comem/Mapper
//  Started to seperate library functions out of mapper files.
//  Current code is tested with one comem.
//  
//  *****************  Version 16  *****************
//  User: Stevek       Date: 10/23/97   Time: 11:59a
//  Updated in $/Comem/Mapper
//  Added comemID to closeDriver
//  
//  *****************  Version 15  *****************
//  User: Stevek       Date: 10/22/97   Time: 12:27p
//  Updated in $/Comem/Mapper
//  Added header blocks to all files at once!
//  
// Copyright (c) 1997 Anchor Chips, Inc.  May not be reproduced without
// permission.  See the license agreement for more details.
//
//////////////////////////////////////////////////////////////////////
#pragma once
#include "utils.h"
#define ONE_K 1024
#define ONE_MEG (ONE_K * ONE_K)

const int PC_ALLOCATION_MAX_SIZE = 16 * ONE_MEG;
const int PC_ALLOCATION_MIN_SIZE = 4 * ONE_K;

   // Macro to create a range of 000111110000.  
// Example -- ONES_RANGE32(15, 8) == 00...001111111100000000.
#define ONES_RANGE32(hi,lo)  ((0xffffffff >> (31-(hi))) & ~(0xffffffff >> (32-(lo))) )
const DWORD CHECK_MASK_POWER2 = (DWORD) -2;

#define   CACHE_REGION_ADDR_MASK ONES_RANGE32(23,9)
#define   CACHE_REGION_SIZE_MASK ONES_RANGE32(31,9)
const DWORD CACHE_REGION_MAX_ADDR = 1 << 24;
const DWORD CACHE_REGION_MAX_SIZE = 1 << 23;
const DWORD CACHE_REGION_MIN_SIZE = 1 << 10;
const DWORD CACHE_REGION_FLUSH_VAL = (1 << 7);
const DWORD CACHE_REGION_HARDWARE  = (0 << 1);
const DWORD CACHE_REGION_RW_PROG   = (1 << 1);
const DWORD CACHE_REGION_RO_PROG   = (2 << 1);
const DWORD CACHE_REGION_RW_DATA   = (3 << 1);
const DWORD CACHE_REGION_OFF       = (0);
const DWORD CACHE_REGION_ON        = (1);
////////////////////////////////////////////////////////////////////////
//
//	The xlate 2 chip array is used to translate a value received in the drop-down 
//  list into a value that is suitable for the chip.  This is necessary because the list
//  is numbered linearly, while the chip is generally 0=off, 1+code=on, so it is non-linear.
//  example:
//		writeComem(addr,  CACHE_REGION_XLATE2CHIP[list_value], comemID)
#ifdef __cplusplus
const DWORD CACHE_REGION_XLATE2CHIP[] = 
  {     CACHE_REGION_OFF, // UNUSED
        CACHE_REGION_ON + CACHE_REGION_RW_PROG, // RW_PROG
        CACHE_REGION_ON + CACHE_REGION_RO_PROG, // RO_PROG
        CACHE_REGION_ON + CACHE_REGION_RW_DATA, // RW_DATA
        CACHE_REGION_ON + CACHE_REGION_HARDWARE // HARDWARE
  };
#endif

#define   CS_REGION_SIZE_MASK ONES_RANGE32(31,10)
#define   CS_REGION_ADDR_MASK ONES_RANGE32(23,10)
const DWORD CS_REGION_MAX_ADDR = 1 << 24;
const DWORD CS_REGION_MAX_SIZE = 1 << 20;
const DWORD CS_REGION_MIN_SIZE = ONE_K;

// Values used by the chip
const DWORD CS_REGION_OFF = 0;
const DWORD CS_REGION_RDY_COUNT0 = 1;
const DWORD CS_REGION_RDY_INPUT = 2;

const DWORD CS_RDY_COUNT_POSITION = 2;        // location of count in bit positions
const DWORD CS_RDY_COUNT_MAX = 16;

#ifdef __cplusplus
const DWORD CS_REGION_XLATE2CHIP[] = 
  {
        CS_REGION_OFF,
        CS_REGION_RDY_INPUT,
        CS_REGION_RDY_COUNT0
  };
const DWORD CS_REGION_XLATE2WIN[] = 
    { 
    0, 2+(0),     1, 	0,
    0, 2+(1),     1, 	0,
    0, 2+(2),     1, 	0,
    0, 2+(3),     1, 	0,
    0, 2+(4),     1, 	0,
    0, 2+(5),     1, 	0,
    0, 2+(6),     1, 	0,
    0, 2+(7),     1, 	0,
    0, 2+(8),     1, 	0,
    0, 2+(9),     1, 	0,
    0, 2+(10),1, 		0,
    0, 2+(11),1, 		0,
    0, 2+(12),1, 		0,
    0, 2+(13),1, 		0,
    0, 2+(14),1, 		0,
    0, 2+(15),1, 		0,
    0, 2+(16),1, 		0,
    0, 2+(17),1, 		0,
    0, 2+(18),1, 		0,
    0, 2+(19),1, 		0,
    0, 2+(20),1, 		0,
    0, 2+(21),1, 		0,
    0, 2+(22),1, 		0,
    0, 2+(23),1, 		0,
    0, 2+(24),1, 		0,
    0, 2+(25),1, 		0,
    0, 2+(26),1, 		0,
    0, 2+(27),1, 		0,
    0, 2+(28),1, 		0,
    0, 2+(29),1, 		0,
    0, 2+(30),1, 		0,
    0, 2+(31),1, 		0
    };
#endif

const int ADDR_PHYSBASE     = 0;
const int ADDR_ADDIN_SIZE   = 4;
const int ADDR_HOSTBASE		 = 0;
const int ADDR_ADDINBASE	 = 8;

const int ADDR_MEMBASE0       = 0x00;
const int ADDR_MEMSIZE0       = 0x04;
const int ADDR_MEMBASE1       = 0x10;
const int ADDR_MEMSIZE1       = 0x14;
const int ADDR_MEMBASE2       = 0x20;
const int ADDR_MEMSIZE2       = 0x24;
const int ADDR_MEMBASE3       = 0x30;
const int ADDR_MEMSIZE3       = 0x34;
const int ADDR_CSBASE0        = 0x40;
const int ADDR_CSSIZE0        = 0x44;
const int ADDR_CSBASE1        = 0x50;
const int ADDR_CSSIZE1        = 0x54;
const int ADDR_DAHBASE        = 0x60;
const int ADDR_DASIZE         = 0x64;
const int ADDR_DALBASE        = 0x68;
const int ADDR_NFCMD          = 0x70;
const int ADDR_HMBASE		 =         0x80;
const int ADDR_HMSIZE		 =         0x84;
const int ADDR_PFADDR		 =         0x88;
const int ADDR_OPSBASE		 =         0x90;
const int ADDR_NVCMD		 =         0xa0;
const int ADDR_NVREAD		 =         0xa4;
const int ADDR_NVSTAT		 =         0xa8;
const int ADDR_HCTL		 =            0xe0;
const int ADDR_HINT		 =            0xe4;
const int ADDR_HLDATA		 =         0xe8;
const int ADDR_LCTL		 =            0xf0;
const int ADDR_LINT		 =            0xf4;
const int ADDR_LHDATA		 =         0xf8;





#define  DA_HOST_ADDR_MASK   ONES_RANGE32(31,10)
#define  DA_HOST_MIN_ADDR   ( 1 << 10)
#define  DA_ADDIN_ADDR_MASK  ONES_RANGE32(23,10)
#define  DA_REGION_SIZE_MASK ONES_RANGE32(31,10)
#define  DA_REGION_MAX_HOST_ADDR  ( -1)     /* no max */
#define  DA_REGION_MAX_ADDIN_ADDR  ( 1 << 24)
#define  DA_REGION_MAX_SIZE  ( 1 << 20)
#define  DA_REGION_MIN_SIZE  ( ONE_K)
#define  DA_REGION_OFF  ( 0)
#define  DA_REGION_ON  ( 1)
#define  DA_REGION_CYCLE_SPECIAL  ( (0 << 1) + DA_REGION_ON)
#define  DA_REGION_CYCLE_IO  ( (1 << 1) + DA_REGION_ON)
#define  DA_REGION_CYCLE_MEM  ( (2 << 1) + DA_REGION_ON)
#define  DA_REGION_CYCLE_CONFIG  ( (3 << 1) + DA_REGION_ON)

#ifdef __cplusplus
const int DA_REGION_XLATE2CHIP[] = 
{
	DA_REGION_OFF,
	DA_REGION_CYCLE_SPECIAL,
	DA_REGION_CYCLE_IO,
	DA_REGION_CYCLE_MEM,
	DA_REGION_CYCLE_CONFIG
};
#endif

#define   OPS_REG_ADDR_MASK   ONES_RANGE32(23,11)
#define  OPS_REG_REGION_MAX_ADDR  ( 1 << 24)
#define  OPS_REG_REGION_MIN_SIZE  ( 0x800)

#ifdef __cplusplus
const int OPS_REG_REGION_XLATE2CHIP[] = { 0, 1, 3};
const int OPS_REG_REGION_XLATE2WIN[] = { 0, 1, 2, 2};
#endif

#define  PCI_PAGE_TABLE_ENABLE  ( 1)
#define  PCI_PAGE_TABLE_DISANABLE  ( 0)


//////////////////////////////////////////////////////////////////////
// EEPROM related values
//////////////////////////////////////////////////////////////////////
#define  MAX_EEPROM_ADDR  ( 0x800)
#define  EEPROM_ADDR_MASK  ( 0x700)
#define  EEPROM_WRITE_ENABLE  ( 0)
#define  EEPROM_4READ_ENABLE  ( 3 )

#define  SERIAL_REG2_DONE_BIT  ( 1)
#define  SERIAL_WRITE_ACK_MASK  ( 0xe0)
#define  SERIAL_READ_ACK_MASK  ( 0xe0)

#define  EEPROM_WRITE  ( 0)
#define  EEPROM_READ  ( 1)

typedef struct _comem_opsregs_struct