hdlc_recv.v

hdlc_receive_code.rar

module hdlc_recv ( ihdlc_RXD, ihdlc_RXCLK, ihdlc_RESET, ohdlc_TXD, ohdlc_TXCLK, 
        ohdlc_TXDS );
  output [7:0] ohdlc_TXD;
  output [2:0] ohdlc_TXDS;
  input ihdlc_RXD, ihdlc_RXCLK, ihdlc_RESET;
  output ohdlc_TXCLK;
  wire   delete_zero_wire, delete_zero, error, error_wire, N47, N48, N49, N50,
         byte_rst_counter_start, N56, N58, N93, N94, N95, N96, N97, error_flag,
         n134, n148, n149, n150, n152, n153, n154, n155, n156, n157, n158,
         n159, n160, n161, n162, n163, n164, n165, n695, n694, n693, n692,
         n691, n690, n689, n688, n687, n686, n195, \add_343/carry[2] ,
         \add_343/carry[3] , \add_343/carry[4] , \add_343/carry[5] ,
         \add_343/carry[6] , n216, n219, n242, n246, n247, n254, n255, n256,
         n257, n258, n259, n264, n265, n268, n274, n285, n288, n291, n293,
         n303, n306, n309, n312, n321, n324, n326, n330, n333, n336, n339,
         n342, n345, n348, n350, n427, n428, n429, n430, n431, n432, n433,
         n434, n435, n436, n437, n438, n439, n440, n441, n442, n443, n444,
         n445, n446, n447, n448, n449, n450, n451, n452, n453, n454, n455,
         n456, n457, n458, n459, n460, n461, n462, n463, n464, n465, n466,
         n467, n468, n469, n470, n471, n472, n473, n474, n475, n476, n477,
         n478, n479, n480, n481, n482, n483, n484, n485, n486, n487, n488,
         n489, n490, n491, n493, n494, n495, n496, n497, n498, n499, n500,
         n501, n502, n503, n504, n505, n506, n507, n508, n509, n510, n511,
         n512, n513, n514, n515, n516, n517, n518, n519, n520, n521, n522,
         n523, n524, n525, n526, n527, n528, n529, n530, n531, n532, n533,
         n534, n535, n536, n537, n538, n539, n540, n541, n542, n543, n544,
         n545, n546, n547, n548, n549, n550, n551, n552, n553, n554, n555,
         n556, n557, n558, n559, n560, n561, n562, n563, n564, n565, n566,
         n567, n568, n569, n570, n571, n572, n573, n574, n575, n576, n577,
         n578, n579, n580, n581, n582, n583, n584, n585, n586, n587, n588,
         n589, n590, n591, n592, n593, n594, n595, n596, n597, n598, n599,
         n600, n601, n602, n603, n604, n605, n606, n607, n608, n609, n610,
         n611, n612, n613, n614, n615, n616, n617, n618, n619, n620, n621,
         n622, n623, n624, n625, n626, n627, n628, n629, n630, n631, n632,
         n633, n634, n635, n636, n637, n638, n639, n640, n641, n642, n643,
         n644, n645, n646, n647, n648, n649, n650, n651, n652, n653, n654,
         n655, n656, n657, n661, n666, n668, n679, n680, n681, n682, n683,
         n684, n685;
  wire   [7:0] shifter2;
  wire   [7:0] shifter1;
  wire   [3:0] bit_counter;
  wire   [6:0] byte_counter;
  wire   [6:0] flagdetc_cur_state;
  wire   [6:0] flagdetc_next_state;
  wire   [2:0] byte_rst_counter;
  assign n195 = ihdlc_RESET;

  DFFSXL \ohdlc_TXDS_reg[1]  ( .D(n541), .CK(ihdlc_RXCLK), .SN(n680), .Q(n695)
         );
  DFFSX1 \ohdlc_TXDS_reg[0]  ( .D(n134), .CK(ihdlc_RXCLK), .SN(n680), .Q(n668)
         );
  DFFSX1 \ohdlc_TXDS_reg[2]  ( .D(n324), .CK(ihdlc_RXCLK), .SN(n680), .Q(n666)
         );
  TLATX1 error_wire_reg ( .G(N47), .D(N48), .Q(error_wire) );
  TLATX1 delete_zero_wire_reg ( .G(N49), .D(N50), .Q(delete_zero_wire), .QN(
        n540) );
  DFFRHQX1 \shifter2_reg[7]  ( .D(n158), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[7]) );
  DFFRHQX1 error_reg ( .D(error_wire), .CK(ihdlc_RXCLK), .RN(n680), .Q(error)
         );
  DFFRHQX1 \shifter2_reg[0]  ( .D(n165), .CK(ihdlc_RXCLK), .RN(n682), .Q(
        shifter2[0]) );
  DFFRHQX1 \flagdetc_cur_state_reg[6]  ( .D(n265), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(flagdetc_cur_state[6]) );
  DFFRHQX1 \shifter2_reg[6]  ( .D(n159), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[6]) );
  DFFRHQX1 \shifter2_reg[5]  ( .D(n160), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[5]) );
  DFFRHQX1 \shifter2_reg[4]  ( .D(n161), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[4]) );
  DFFRHQX1 \shifter2_reg[3]  ( .D(n162), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[3]) );
  DFFRHQX1 \shifter2_reg[2]  ( .D(n163), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[2]) );
  DFFRHQX1 \shifter2_reg[1]  ( .D(n164), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter2[1]) );
  DFFRHQX1 error_flag_reg ( .D(n546), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        error_flag) );
  DFFRHQX1 \flagdetc_cur_state_reg[1]  ( .D(n216), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(flagdetc_cur_state[1]) );
  DFFRHQX1 \flagdetc_cur_state_reg[4]  ( .D(n219), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(flagdetc_cur_state[4]) );
  DFFRHQX1 delete_zero_reg ( .D(n679), .CK(ihdlc_RXCLK), .RN(n680), .Q(
        delete_zero) );
  DFFRHQX1 \shifter1_reg[0]  ( .D(ihdlc_RXD), .CK(ihdlc_RXCLK), .RN(n680), .Q(
        n309) );
  DFFRHQX1 \shifter1_reg[5]  ( .D(n549), .CK(ihdlc_RXCLK), .RN(n657), .Q(n285)
         );
  DFFRHQX1 \shifter1_reg[4]  ( .D(n551), .CK(ihdlc_RXCLK), .RN(n682), .Q(n291)
         );
  DFFRHQX1 \shifter1_reg[6]  ( .D(n554), .CK(ihdlc_RXCLK), .RN(n683), .Q(n288)
         );
  DFFRHQX1 \byte_rst_counter_reg[2]  ( .D(N58), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(byte_rst_counter[2]) );
  DFFSX1 \flagdetc_cur_state_reg[0]  ( .D(n303), .CK(ihdlc_RXCLK), .SN(n680), 
        .Q(flagdetc_cur_state[0]) );
  DFFRHQX1 \flagdetc_cur_state_reg[5]  ( .D(n268), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(flagdetc_cur_state[5]) );
  DFFRHQX1 \byte_rst_counter_reg[1]  ( .D(n274), .CK(ihdlc_RXCLK), .RN(n682), 
        .Q(byte_rst_counter[1]) );
  DFFRHQX1 \flagdetc_cur_state_reg[2]  ( .D(flagdetc_next_state[2]), .CK(
        ihdlc_RXCLK), .RN(n682), .Q(flagdetc_cur_state[2]) );
  DFFRHQX1 \flagdetc_cur_state_reg[3]  ( .D(flagdetc_next_state[3]), .CK(
        ihdlc_RXCLK), .RN(n682), .Q(flagdetc_cur_state[3]) );
  DFFRHQX1 \byte_rst_counter_reg[0]  ( .D(N56), .CK(ihdlc_RXCLK), .RN(n683), 
        .Q(byte_rst_counter[0]) );
  DFFRHQX1 \byte_counter_reg[6]  ( .D(n247), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        byte_counter[6]) );
  DFFRHQX1 \shifter1_reg[7]  ( .D(n589), .CK(ihdlc_RXCLK), .RN(n683), .Q(
        shifter1[7]) );
  DFFRHQX1 \byte_counter_reg[0]  ( .D(n157), .CK(ihdlc_RXCLK), .RN(n680), .Q(
        n254) );
  DFFRHQX1 \byte_counter_reg[1]  ( .D(n242), .CK(ihdlc_RXCLK), .RN(n680), .Q(
        n255) );
  DFFRHQX1 \bit_counter_reg[3]  ( .D(n153), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        bit_counter[3]) );
  DFFRHQX1 \bit_counter_reg[1]  ( .D(n154), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        bit_counter[1]) );
  DFFRHQX1 \bit_counter_reg[2]  ( .D(n156), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        bit_counter[2]) );
  DFFRHQX1 \byte_counter_reg[3]  ( .D(n150), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        n257) );
  DFFRHQX1 \byte_counter_reg[5]  ( .D(n246), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        n259) );
  DFFRHQX1 \byte_counter_reg[2]  ( .D(n149), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        n256) );
  DFFRHQX1 \byte_counter_reg[4]  ( .D(n148), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        n258) );
  DFFRHQX1 \bit_counter_reg[0]  ( .D(n155), .CK(ihdlc_RXCLK), .RN(n681), .Q(
        bit_counter[0]) );
  ADDHXL \add_343/U1_1_5  ( .A(n587), .B(\add_343/carry[5] ), .CO(
        \add_343/carry[6] ), .S(N97) );
  ADDHXL \add_343/U1_1_3  ( .A(n607), .B(\add_343/carry[3] ), .CO(
        \add_343/carry[4] ), .S(N95) );
  ADDHXL \add_343/U1_1_2  ( .A(n606), .B(\add_343/carry[2] ), .CO(
        \add_343/carry[3] ), .S(N94) );
  ADDHXL \add_343/U1_1_4  ( .A(n604), .B(\add_343/carry[4] ), .CO(
        \add_343/carry[5] ), .S(N96) );
  ADDHXL \add_343/U1_1_1  ( .A(n609), .B(n608), .CO(\add_343/carry[2] ), .S(
        N93) );
  DFFSXL ohdlc_TXCLK_reg ( .D(n326), .CK(ihdlc_RXCLK), .SN(n680), .Q(n694) );
  DFFRHQXL \shifter1_reg[1]  ( .D(n620), .CK(ihdlc_RXCLK), .RN(n685), .Q(n312)
         );
  DFFRHQXL \shifter1_reg[2]  ( .D(n623), .CK(ihdlc_RXCLK), .RN(n685), .Q(n306)
         );
  DFFRHQXL \shifter1_reg[3]  ( .D(n626), .CK(ihdlc_RXCLK), .RN(n685), .Q(n293)
         );
  DFFRHQXL byte_rst_counter_start_reg ( .D(n630), .CK(ihdlc_RXCLK), .RN(n685), 
        .Q(byte_rst_counter_start) );
  DFFRHQXL \ohdlc_TXD_reg[7]  ( .D(n350), .CK(ihdlc_RXCLK), .RN(n685), .Q(n686) );
  DFFRHQXL \ohdlc_TXD_reg[6]  ( .D(n348), .CK(ihdlc_RXCLK), .RN(n685), .Q(n687) );
  DFFRHQXL \ohdlc_TXD_reg[5]  ( .D(n345), .CK(ihdlc_RXCLK), .RN(n685), .Q(n688) );
  DFFRHQXL \ohdlc_TXD_reg[4]  ( .D(n342), .CK(ihdlc_RXCLK), .RN(n685), .Q(n689) );
  DFFRHQXL \ohdlc_TXD_reg[3]  ( .D(n339), .CK(ihdlc_RXCLK), .RN(n685), .Q(n690) );
  DFFRHQXL \ohdlc_TXD_reg[2]  ( .D(n336), .CK(ihdlc_RXCLK), .RN(n685), .Q(n691) );
  DFFRHQXL \ohdlc_TXD_reg[1]  ( .D(n333), .CK(ihdlc_RXCLK), .RN(n685), .Q(n692) );
  DFFRHQXL \ohdlc_TXD_reg[0]  ( .D(n330), .CK(ihdlc_RXCLK), .RN(n685), .Q(n693) );
  DLY4X1 U283 ( .A(n572), .Y(n571) );
  DLY2X1 U284 ( .A(flagdetc_cur_state[3]), .Y(n573) );
  INVX8 U285 ( .A(n539), .Y(N58) );
  AOI2BB2XL U286 ( .B0(byte_rst_counter[2]), .B1(N56), .A0N(n528), .A1N(n468), 
        .Y(n539) );
  CLKBUFX3 U287 ( .A(flagdetc_cur_state[4]), .Y(n530) );
  CLKBUFX1 U288 ( .A(flagdetc_cur_state[6]), .Y(n531) );
  DLY4X1 U289 ( .A(n517), .Y(n532) );
  INVXL U290 ( .A(byte_rst_counter[2]), .Y(n517) );
  DLY4X1 U291 ( .A(n631), .Y(n533) );
  CLKINVX8 U292 ( .A(n536), .Y(n510) );
  NOR4XL U293 ( .A(n520), .B(n509), .C(n309), .D(shifter1[7]), .Y(n536) );
  DLY4X1 U294 ( .A(n535), .Y(n534) );
  NOR3XL U295 ( .A(n480), .B(n500), .C(n481), .Y(n535) );
  INVX1 U296 ( .A(n534), .Y(n661) );
  OR3XL U297 ( .A(n570), .B(n574), .C(n462), .Y(n537) );
  INVX1 U298 ( .A(n537), .Y(n526) );
  OR3XL U299 ( .A(n442), .B(n532), .C(n443), .Y(n538) );
  INVX1 U300 ( .A(n538), .Y(n476) );
  CLKBUFXL U301 ( .A(n511), .Y(n601) );
  BUFX3 U302 ( .A(n506), .Y(n616) );
  OAI31X1 U303 ( .A0(n508), .A1(n509), .A2(n473), .B0(n533), .Y(n506) );
  BUFX3 U304 ( .A(n152), .Y(n630) );
  AOI21X1 U305 ( .A0(n468), .A1(n533), .B0(n629), .Y(n152) );
  OAI32X4 U306 ( .A0(n482), .A1(byte_counter[6]), .A2(n483), .B0(n484), .B1(
        n454), .Y(n247) );
  NOR3X1 U307 ( .A(n489), .B(flagdetc_cur_state[3]), .C(n464), .Y(
        flagdetc_next_state[3]) );
  BUFX12 U308 ( .A(n657), .Y(n685) );
  AND4XL U309 ( .A(n469), .B(n470), .C(n561), .D(n582), .Y(n268) );
  CLKBUFX1 U310 ( .A(n321), .Y(n541) );
  DLY4X1 U311 ( .A(n543), .Y(n542) );
  DLY4X1 U312 ( .A(byte_counter[6]), .Y(n543) );
  DLY4X1 U313 ( .A(n545), .Y(n544) );
  DLY4X1 U314 ( .A(error_flag), .Y(n545) );
  DLY4X1 U315 ( .A(n547), .Y(n546) );
  AOI21X2 U316 ( .A0(n474), .A1(n475), .B0(n629), .Y(n264) );
  DLY4X1 U317 ( .A(n264), .Y(n547) );
  CLKBUFXL U318 ( .A(flagdetc_cur_state[0]), .Y(n548) );
  DLY4X1 U319 ( .A(n550), .Y(n549) );
  DLY4X1 U320 ( .A(n596), .Y(n550) );
  DLY4X1 U321 ( .A(n552), .Y(n551) );
  DLY4X1 U322 ( .A(n553), .Y(n552) );
  DLY4X1 U323 ( .A(n293), .Y(n553) );
  DLY4X1 U324 ( .A(n555), .Y(n554) );
  DLY4X1 U325 ( .A(n597), .Y(n555) );
  DLY4X1 U326 ( .A(n557), .Y(n556) );
  DLY4X1 U327 ( .A(byte_rst_counter[1]), .Y(n557) );
  DLY2X1 U328 ( .A(n559), .Y(n558) );
  DLY4X1 U329 ( .A(n560), .Y(n559) );
  DLY4X1 U330 ( .A(flagdetc_cur_state[5]), .Y(n560) );
  NOR4BXL U331 ( .AN(n558), .B(n564), .C(n463), .D(n562), .Y(N50) );
  NAND4XL U332 ( .A(n563), .B(n469), .C(n529), .D(n527), .Y(n471) );
  DLY2X1 U333 ( .A(n562), .Y(n561) );
  DLY4X1 U334 ( .A(n570), .Y(n562) );
  DLY4X1 U335 ( .A(n574), .Y(n563) );
  DLY4X1 U336 ( .A(n565), .Y(n564) );
  DLY4X1 U337 ( .A(n548), .Y(n565) );
  DLY2X1 U338 ( .A(n568), .Y(n566) );
  DLY4X1 U339 ( .A(byte_rst_counter[0]), .Y(n567) );
  DLY4X1 U340 ( .A(n567), .Y(n568) );
  DLY2X1 U341 ( .A(flagdetc_cur_state[1]), .Y(n569) );
  DLY4X1 U342 ( .A(n530), .Y(n570) );
  AND4X1 U343 ( .A(n576), .B(n581), .C(n582), .D(n527), .Y(
        flagdetc_next_state[2]) );
  DLY4X1 U344 ( .A(n573), .Y(n572) );
  DLY4X1 U345 ( .A(n531), .Y(n574) );
  DLY2X1 U346 ( .A(shifter1[7]), .Y(n575) );
  DLY4X1 U347 ( .A(n577), .Y(n576) );
  DLY4X1 U348 ( .A(n569), .Y(n577) );
  DLY2X1 U349 ( .A(flagdetc_cur_state[2]), .Y(n578) );
  DLY4X1 U350 ( .A(n580), .Y(n579) );
  DLY4X1 U351 ( .A(n578), .Y(n580) );
  DLY4X1 U352 ( .A(n526), .Y(n581) );
  DLY4X1 U353 ( .A(n583), .Y(n582) );
  DLY4X1 U354 ( .A(n575), .Y(n583) );
  DLY2X1 U355 ( .A(byte_rst_counter_start), .Y(n584) );
  DLY4X1 U356 ( .A(n586), .Y(n585) );
  DLY4X1 U357 ( .A(n584), .Y(n586) );
  DLY4X1 U358 ( .A(n588), .Y(n587) );
  DLY4X1 U359 ( .A(n259), .Y(n588) );