📄 sc2450pdd.cpp.forboardrev1
字号:
Arguments:
None.
Return Value:
None.
--*/
static
VOID
UnmapRegisterSet(PCTRLR_PDD_CONTEXT pContext)
{
// Unmap any memory areas that we may have mapped.
if (g_pUDCBase) {
VirtualFree((PVOID) g_pUDCBase, 0, MEM_RELEASE);
g_pUDCBase = NULL;
}
}
// interrupt service routine.
DWORD
WINAPI
ISTMain(
LPVOID lpParameter
)
{
SETFNAME();
FUNCTION_ENTER_MSG();
PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) lpParameter;
ValidateContext(pContext);
CeSetThreadPriority(pContext->hIST, pContext->dwISTPriority);
while (!pContext->fExitIST) {
pContext->fRestartIST = FALSE;
// Disable All Endpoint interrupts
WriteReg(pContext, EIER, 0); // Disable All
//kim sang hee.
//Resume signal is occured when cable is not connected
//So, MFRM is setted by '0'
// Enable Device interrupts
// SetClearReg(pContext, SCR, (RRDE | HRESE | HSUSPE | MFRM), SET);
SetClearReg(pContext, SCR, (RRDE|HRESE|HSUSPE), SET);
SetClearReg(pContext, SSR, (HFRES | HFSUSP | HFRM), SET);
// Enable Endpoint interrupt 0
EnableEndpointInterrupt(pContext, 0);
while (TRUE) {
DWORD dwWait = WaitForSingleObject(pContext->hevInterrupt, INFINITE);
if (pContext->fExitIST || pContext->fRestartIST) {
break;
}
if (dwWait == WAIT_OBJECT_0) {
HandleUSBEvent(pContext);
InterruptDone(pContext->dwSysIntr);
}
else {
RETAILMSG(DBG, (_T("%s WaitForMultipleObjects failed. Exiting IST.\r\n"),
pszFname));
break;
}
}
// Send detach
pContext->pfnNotify(pContext->pvMddContext,
UFN_MSG_BUS_EVENTS, UFN_DETACH);
pContext->fSpeedReported = FALSE;
pContext->attachedState = UFN_DETACH;
RETAILMSG(1, (_T("UFN_DETACH_2\r\n")));
// Disable Device interrupts - write Zeros to Disable
SetClearReg(pContext, SCR, (HRESE | HSUSPE | MFRM), CLEAR);
// Disable endpoint interrupts - write Zeros to Disable
WriteReg(pContext, EIER, 0);
// Clear any outstanding device & endpoint interrupts
// USB Device Interrupt Status - Write a '1' to Clear
SetClearReg(pContext, SSR, (HFRES | HFSUSP | HFRM), SET);
// End point Interrupt Status - Write a '1' to Clear
WriteReg(pContext, EIR, CLEAR_ALL_EP_INTRS);
}
FUNCTION_LEAVE_MSG();
return 0;
}
static
VOID
StartTransfer(
PCTRLR_PDD_CONTEXT pContext,
PEP_STATUS peps,
PSTransfer pTransfer
)
{
SETFNAME();
DEBUGCHK(pContext);
PREFAST_DEBUGCHK(peps);
DEBUGCHK(!peps->pTransfer);
ValidateTransferDirection(pContext, peps, pTransfer);
LOCK_ENDPOINT(peps);
FUNCTION_ENTER_MSG();
RETAILMSG(DBG, (_T("%s Setting up %s transfer on ep %u for %u bytes\r\n"),
pszFname, (pTransfer->dwFlags == USB_IN_TRANSFER) ? _T("in") : _T("out"),
peps->dwEndpointNumber, pTransfer->cbBuffer));
// Enable transfer interrupts.
peps->pTransfer = pTransfer;
DWORD dwEndpoint = peps->dwEndpointNumber;
if (pTransfer->dwFlags == USB_IN_TRANSFER) {
if (peps->dwEndpointNumber == 0) {
WORD bEp0ESR = ReadReg(pContext, EP0SR);
if (bEp0ESR & EP0TST) WriteReg(pContext, EP0SR, bEp0ESR);
HandleTx(pContext, peps, 0);
}
else {
WORD bEpESR = ReadIndexedReg(pContext, dwEndpoint, ESR);
if (bEpESR & TPS) {
WriteIndexedReg(pContext, dwEndpoint, ESR, bEpESR);
}
HandleTx(pContext, peps, 1);
}
}
else {
if (peps->dwEndpointNumber == 0) {
}
else {
EnableEndpointInterrupt(pContext, peps->dwEndpointNumber);
// There may be a packet available. If so process it...
WORD bEpIrqStat = ReadIndexedReg(pContext, peps->dwEndpointNumber, ESR);
if (bEpIrqStat & RPS) {
BOOL fCompleted;
DWORD dwStatus;
HandleRx(pContext, peps, &fCompleted, &dwStatus);
if (fCompleted) {
// Disable transfer interrupts until another transfer is issued.
DisableEndpointInterrupt(pContext, peps->dwEndpointNumber);
}
if (fCompleted) {
CompleteTransfer(pContext, peps, dwStatus);
}
}
}
}
FUNCTION_LEAVE_MSG();
UNLOCK_ENDPOINT(peps);
}
DWORD
WINAPI
UfnPdd_IssueTransfer(
PVOID pvPddContext,
DWORD dwEndpoint,
PSTransfer pTransfer
)
{
SETFNAME();
FUNCTION_ENTER_MSG();
DEBUGCHK(EP_VALID(dwEndpoint));
PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) pvPddContext;
ValidateContext(pContext);
PEP_STATUS peps = GetEpStatus(pContext, dwEndpoint);
LOCK_ENDPOINT(peps);
DEBUGCHK(peps->fInitialized);
DEBUGCHK(pTransfer->cbTransferred == 0);
DWORD dwRet = ERROR_SUCCESS;
RETAILMSG(DBG, (_T("%s UfnPdd_IssueTransfer\r\n"),
pszFname));
// Note For the HW NAKs IN requests and DOES NOT let SW
// know that the Host is trying to send a request. SO... Start the Transfer
// In Now!
// Start the Transfer
DEBUGCHK(peps->pTransfer == NULL);
StartTransfer(pContext, peps, pTransfer);
UNLOCK_ENDPOINT(peps);
FUNCTION_LEAVE_MSG();
return dwRet;
}
DWORD
WINAPI
UfnPdd_AbortTransfer(
PVOID pvPddContext,
DWORD dwEndpoint,
PSTransfer pTransfer
)
{
SETFNAME();
FUNCTION_ENTER_MSG();
PREFAST_DEBUGCHK(pTransfer);
DEBUGCHK(EP_VALID(dwEndpoint));
PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) pvPddContext;
ValidateContext(pContext);
PEP_STATUS peps = GetEpStatus(pContext, dwEndpoint);
LOCK_ENDPOINT(peps);
DEBUGCHK(peps->fInitialized);
RETAILMSG(DBG, (_T("%s UfnPdd_AbortTransfer\r\n"),
pszFname));
ValidateTransferDirection(pContext, peps, pTransfer);
DEBUGCHK(pTransfer == peps->pTransfer);
CompleteTransfer(pContext, peps, UFN_CANCELED_ERROR);
if (dwEndpoint == 0) {
pContext->Ep0State = EP0_STATE_IDLE;
}
ResetEndpoint( pContext,peps);
UNLOCK_ENDPOINT(peps);
FUNCTION_LEAVE_MSG();
return ERROR_SUCCESS;
}
/////////////////////////////// jassi ////////////////////////////////
#define CLKCON_USBD (1<<7)
volatile S3C2443_CLKPWR_REG *pCLKPWR = NULL; // Clock power registers (needed to enable I2S and SPI clocks)
volatile S3C2443_IOPORT_REG *pIOPregs = NULL;
BOOL HW_USBClocks(CEDEVICE_POWER_STATE cpsNew)
{
RETAILMSG(DBG, (_T("%s HW_USBClocks\r\n")));
pCLKPWR = (volatile S3C2443_CLKPWR_REG*)VirtualAlloc(0, sizeof(S3C2443_CLKPWR_REG), MEM_RESERVE, PAGE_NOACCESS);
if (!pCLKPWR)
{
DEBUGMSG(1, (TEXT("pCLKPWR: VirtualAlloc failed!\r\n")));
return(FALSE);
}
if (!VirtualCopy((PVOID)pCLKPWR, (PVOID)(S3C2443_BASE_REG_PA_CLOCK_POWER >> 8), sizeof(S3C2443_CLKPWR_REG), PAGE_PHYSICAL | PAGE_READWRITE | PAGE_NOCACHE))
{
DEBUGMSG(1, (TEXT("pCLKPWR: VirtualCopy failed!\r\n")));
return(FALSE);
}
pIOPregs = (volatile S3C2443_IOPORT_REG *)VirtualAlloc(0, sizeof(S3C2443_IOPORT_REG), MEM_RESERVE, PAGE_NOACCESS);
if(!pIOPregs) {
DEBUGMSG(1, (TEXT("pIOPregs: VirtualAlloc failed!\r\n")));
return(FALSE);
}
if(!VirtualCopy((PVOID)pIOPregs, (PVOID)(S3C2443_BASE_REG_PA_IOPORT >> 8), sizeof(S3C2443_IOPORT_REG), PAGE_PHYSICAL | PAGE_READWRITE | PAGE_NOCACHE))
{
DEBUGMSG(1, (TEXT("pIOPregs: VirtualCopy failed!\r\n")));
return(FALSE);
}
if (cpsNew == D0)
{
RETAILMSG(0, (TEXT("HW_USBClocks::D0 \r\n")));
// Set the Normal mode
pIOPregs->GPHCON = (pIOPregs->GPHCON & ~(0x3<<28)) | (0x1<<28);
pIOPregs->GPHUDP = (pIOPregs->GPHUDP & ~(0x3<<28));
pIOPregs->GPHDAT = (pIOPregs->GPHDAT & ~(0x1<<14)) | (0x1<<14);
pIOPregs->MISCCR &= ~(1<<12);
// Enable the PHY Power
pCLKPWR->PWRCFG |= (1<<4);
// First USB PHY has to be reset, and after 10us, func and host has to be reset.
pCLKPWR->USB_RSTCON = (0<<2)|(0<<1)|(1<<0);
Sleep(1);
pCLKPWR->USB_RSTCON = (1<<2)|(0<<1)|(0<<0);
pCLKPWR->USB_RSTCON = (0<<2)|(0<<1)|(0<<0);
// Set USB PHY Control
// Ref. Clock (48MHz), Clock (X-tal), Host Clock (Ext. X-tal), D-stream (Device Mode)
pCLKPWR->USB_PHYCTRL = (0<<3)|(0<<2)|(0<<1)|(0<<0);
// Set USB PHY Power
// 48Mhz clock on ,PHY2.0 analog block power on,XO block power on,
// XO block power in suspend mode,PHY 2.0 Pll power on ,suspend signal for save mode disable
pCLKPWR->USB_PHYPWR = (0<<31)|(3<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);
// Set USB Clock Control
// Vbus detect enable and D+ Pull up, USB2.0 Function clock Enable,
// USB1.1 HOST disable,USB2.0 PHY test enable
pCLKPWR->USB_CLKCON = (1<<31)|(1<<2)|(0<<1)|(0<<0);
}
// Should be implemented
else if (cpsNew == D4)
{
RETAILMSG(0, (TEXT("HW_USBClocks::D4 \r\n")));
// Set the Normal mode
pIOPregs->GPHCON = (pIOPregs->GPHCON & ~(0x3<<28)) | (0x1<<28);
pIOPregs->GPHUDP = (pIOPregs->GPHUDP & ~(0x3<<28)) | (0x2<<28);
pIOPregs->GPHDAT = (pIOPregs->GPHDAT & ~(0x1<<14));
pIOPregs->MISCCR |= (1<<12);
// Enable the PHY Power
pCLKPWR->PWRCFG |= (1<<4);
// First USB PHY has to be reset, and after 10us, func and host has to be reset.
pCLKPWR->USB_RSTCON = (0<<2)|(0<<1)|(1<<0);
Sleep(1);
pCLKPWR->USB_RSTCON = (1<<2)|(0<<1)|(0<<0);
pCLKPWR->USB_RSTCON = (0<<2)|(0<<1)|(0<<0);
// Set USB PHY Control
// Ref. Clock (48MHz), Clock (X-tal), Host Clock (Ext. X-tal), D-stream (Device Mode)
pCLKPWR->USB_PHYCTRL = (0<<3)|(1<<2)|(0<<1)|(0<<0);
// Set USB PHY Power
// 48Mhz clock on ,PHY2.0 analog block power on,XO block power on,
// XO block power in suspend mode,PHY 2.0 Pll power on ,suspend signal for save mode disable
pCLKPWR->USB_PHYPWR = (0<<31)|(1<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);
// Set USB Clock Control
// Vbus detect enable and D+ Pull up, USB2.0 Function clock Enable,
// USB1.1 HOST disable,USB2.0 PHY test enable
pCLKPWR->USB_CLKCON = (1<<31)|(1<<2)|(0<<1)|(0<<0);
}
if (pIOPregs)
{
VirtualFree((PVOID)pIOPregs, 0, MEM_RELEASE);
pIOPregs = NULL;
}
if (pCLKPWR)
{
VirtualFree((PVOID)pCLKPWR, 0, MEM_RELEASE);
pCLKPWR = NULL;
}
return TRUE;
}
// This does not do much because there is not any way to control
// power on this controller.
static
CEDEVICE_POWER_STATE
SetPowerState(
PCTRLR_PDD_CONTEXT pContext,
CEDEVICE_POWER_STATE cpsNew
)
{
SETFNAME();
PREFAST_DEBUGCHK(pContext);
DEBUGCHK(VALID_DX(cpsNew));
ValidateContext(pContext);
RETAILMSG(DBG, (_T("%s SetPowerState\r\n"),
pszFname));
// Adjust cpsNew.
if (cpsNew != pContext->cpsCurrent) {
if (cpsNew == D1 || cpsNew == D2) {
// D1 and D2 are not supported.
cpsNew = D0;
}
else if (pContext->cpsCurrent == D4) {
// D4 can only go to D0.
cpsNew = D0;
}
}
if (cpsNew != pContext->cpsCurrent) {
DEBUGMSG(ZONE_POWER, (_T("%s Going from D%u to D%u\r\n"),
pszFname, pContext->cpsCurrent, cpsNew));
if ( (cpsNew < pContext->cpsCurrent) && pContext->hBusAccess ) {
SetDevicePowerState(pContext->hBusAccess, cpsNew, NULL);
}
switch (cpsNew) {
case D0:
HW_USBClocks(D0);
KernelIoControl(IOCTL_HAL_DISABLE_WAKE, &pContext->dwSysIntr,
sizeof(pContext->dwSysIntr), NULL, 0, NULL);
if (pContext->fRunning) {
// Cause the IST to restart.
pContext->fRestartIST = TRUE;
SetInterruptEvent(pContext->dwSysIntr);
}
break;
case D3:
KernelIoControl(IOCTL_HAL_ENABLE_WAKE, &pContext->dwSysIntr,
sizeof(pContext->dwSysIntr), NULL, 0, NULL);
break;
case D4:
HW_USBClocks(D4);
KernelIoControl(IOCTL_HAL_DISABLE_WAKE, &pContext->dwSysIntr,
sizeof(pContext->dwSysIntr), NULL, 0, NULL);
break;
}
if ( (cpsNew > pContext->cpsCurrent) && pContext->hBusAccess ) {
SetDevicePowerState(pContext->hBusAccess, cpsNew, NULL);
}
pContext->cpsCurrent = cpsNew;
}
return pContext->cpsCurrent;
}
static
VOID
FreeCtrlrContext(
PCTRLR_PDD_CONTEXT pContext
)
{
PREFAST_DEBUGCHK(pContext);
DEBUGCHK(!pContext->hevInterrupt);
DEBUGCHK(!pContext->hIST);
DEBUGCHK(!pContext->fRunning);
pContext->dwSig = GARBAGE_DWORD;
UnmapRegisterSet(pContext);
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