hwctxt.cpp

SMDK2416_BSP

		return(FALSE);
	}

	g_pIOPregs = (volatile S3C2450_IOPORT_REG*)VirtualAlloc(0, sizeof(S3C2450_IOPORT_REG), MEM_RESERVE, PAGE_NOACCESS);
	if (!g_pIOPregs)
	{
		RETAILMSG(1, (TEXT("S3C2450_IOPORT_REG: VirtualAlloc failed!\r\n")));
		return(FALSE);
	}
	if (!VirtualCopy((PVOID)g_pIOPregs, (PVOID)(S3C2450_BASE_REG_PA_IOPORT>>8), sizeof(S3C2450_IOPORT_REG), PAGE_READWRITE | PAGE_NOCACHE | PAGE_PHYSICAL))
	{
		RETAILMSG(1, (TEXT("S3C2450_IOPORT_REG: VirtualCopy failed!\r\n")));
		return(FALSE);
	}

	g_pDMAregs = (volatile S3C2450_DMA_REG*)VirtualAlloc(0, sizeof(S3C2450_DMA_REG), MEM_RESERVE, PAGE_NOACCESS);
	if (!g_pDMAregs)
	{
		RETAILMSG(1, (TEXT("S3C2450_DMA_REG1: VirtualAlloc failed!\r\n")));
		return(FALSE);
	}
	if (!VirtualCopy((PVOID)g_pDMAregs, (PVOID)(S3C2450_BASE_REG_PA_DMA>>8), sizeof(S3C2450_DMA_REG), PAGE_READWRITE | PAGE_NOCACHE | PAGE_PHYSICAL))
	{
		RETAILMSG(1, (TEXT("S3C2450_DMA_REG1: VirtualCopy failed!\r\n")));
		return(FALSE);
	}


	s2450INT = (volatile S3C2450_INTR_REG*)VirtualAlloc(0, sizeof(S3C2450_INTR_REG), MEM_RESERVE, PAGE_NOACCESS);
	if (!s2450INT)
	{
		RETAILMSG(1, (TEXT("S3C2450_INTR_REG: VirtualAlloc failed!\r\n")));
		return(FALSE);
	}
	if (!VirtualCopy((PVOID)s2450INT, (PVOID)(S3C2450_BASE_REG_PA_INTR>>8), sizeof(S3C2450_INTR_REG), PAGE_READWRITE | PAGE_NOCACHE | PAGE_PHYSICAL))
	{
		RETAILMSG(1, (TEXT("S3C2450_INTR_REG: VirtualCopy failed!\r\n")));
		return(FALSE);
	}

	g_pCLKPWRreg = (volatile S3C2450_CLKPWR_REG *)VirtualAlloc(0, sizeof(S3C2450_CLKPWR_REG), MEM_RESERVE, PAGE_NOACCESS);
	if (!g_pCLKPWRreg)
	{
		RETAILMSG(1, (TEXT("S3C2450_CLKPWR_REG: VirtualAlloc failed!\r\n")));
		return(FALSE);
	}
	if (!VirtualCopy((PVOID)g_pCLKPWRreg, (PVOID)(S3C2450_BASE_REG_PA_CLOCK_POWER>>8), sizeof(S3C2450_CLKPWR_REG), PAGE_READWRITE | PAGE_NOCACHE | PAGE_PHYSICAL))
	{
		RETAILMSG(1, (TEXT("S3C2450_CLKPWR_REG: VirtualCopy failed!\r\n")));
		return(FALSE);
	}
	

   
	//PowerUp();

	return(TRUE);
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		Deinit()

Description:	Deinitializest the hardware: disables DMA channel(s), 
				clears any pending interrupts, powers down the audio
				codec chip, etc.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::Deinit()
{
	//----- 1. Disable the input/output channels -----
	//	AUDIO_IN_DMA_DISABLE();
	AUDIO_OUT_DMA_DISABLE();

	//----- 2. Disable/clear DMA input/output interrupts -----
	AUDIO_IN_CLEAR_INTERRUPTS();
	AUDIO_OUT_CLEAR_INTERRUPTS();

	//----- 3. Turn the audio hardware off -----
	AudioMute(DMA_CH_OUT | DMA_CH_MIC, TRUE);

	//----- 4. Unmap the control registers and DMA buffers -----
	UnmapRegisters();
	UnmapDMABuffers();

	return TRUE;
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		UnmapRegisters()

Description:	Unmaps the config registers used by both the SPI and
				I2S controllers.

Notes:			The SPI and I2S controllers both use the GPIO config
				registers, so these MUST be deinitialized LAST.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::UnmapRegisters()
{
	//----- 1. Free the fast driver-->driver calling mechanism object -----
	if(g_hUTLObject) 
	{
		CloseHandle(g_hUTLObject);
	}
	
	if ( g_pIISregs )
		VirtualFree((PVOID)g_pIISregs, 0, MEM_RELEASE);
	if ( g_pDMAregs )	
		VirtualFree((PVOID)g_pDMAregs, 0, MEM_RELEASE);
	if ( g_pIOPregs )			
		VirtualFree((PVOID)g_pIOPregs, 0, MEM_RELEASE);
	if ( g_pCLKPWRreg )		
		VirtualFree((PVOID)g_pCLKPWRreg, 0, MEM_RELEASE);

	if ( s2450INT )		
		VirtualFree((PVOID)s2450INT, 0, MEM_RELEASE);

	return TRUE;
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		MapDMABuffers()

Description:	Maps the DMA buffers used for audio input/output
				on the I2S bus.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::MapDMABuffers()
{
    PBYTE pVirtDMABufferAddr = NULL;
    DMA_ADAPTER_OBJECT Adapter;


    memset(&Adapter, 0, sizeof(DMA_ADAPTER_OBJECT));
    Adapter.InterfaceType = Internal;
    Adapter.ObjectSize = sizeof(DMA_ADAPTER_OBJECT);

    // Allocate a block of virtual memory (physically contiguous) for the DMA buffers.
    //
    pVirtDMABufferAddr = (PBYTE)HalAllocateCommonBuffer(&Adapter, (AUDIO_DMA_PAGE_SIZE * 4), &g_PhysDMABufferAddr, FALSE);
    if (pVirtDMABufferAddr == NULL)
    {
        RETAILMSG(TRUE, (TEXT("WAVEDEV.DLL:HardwareContext::MapDMABuffers() - Failed to allocate DMA buffer.\r\n")));
        return(FALSE);
    }

    // Setup the DMA page pointers.
    // NOTE: Currently, input and output each have two DMA pages: these pages are used in a round-robin
    // fashion so that the OS can read/write one buffer while the audio codec chip read/writes the other buffer.
    //
    m_Output_pbDMA_PAGES[0] = pVirtDMABufferAddr;
    m_Output_pbDMA_PAGES[1] = pVirtDMABufferAddr + AUDIO_DMA_PAGE_SIZE;
    m_Input_pbDMA_PAGES[0]  = pVirtDMABufferAddr + (2 * AUDIO_DMA_PAGE_SIZE);
    m_Input_pbDMA_PAGES[1]  = pVirtDMABufferAddr + (3 * AUDIO_DMA_PAGE_SIZE);
    m_pVirtDMABufferAddr = pVirtDMABufferAddr;

    return(TRUE);
	
}



/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		UnmapDMABuffers()

Description:	Unmaps the DMA buffers used for audio input/output
				on the I2S bus.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::UnmapDMABuffers()
{
	if(m_pVirtDMABufferAddr)
	{
		VirtualFree((PVOID)m_pVirtDMABufferAddr, 0, MEM_RELEASE);
	}

	return TRUE;
}

BOOL HardwareContext::Codec_channel()
{

#if (BSP_TYPE == BSP_SMDK2443)
		//RETAILMSG(DBG_ON, (TEXT("+Codec_channel\r\n")));

		//******  L3 I/F (GPIO) Initialize *****
   	//----------------------------------------------------------
	//PORT G GROUP
	//Ports  :   GPG0       GPG1        GPG2  
	//Signal :  L3MODE     L3DATA      L3CLK
	//Setting:  OUTPUT     OUTPUT      OUTPUT 
	//	        [1:0]      [3:2]       [5:4]
	//Binary :  01          01           01 
	//----------------------------------------------------------   

		g_pIOPregs->GPGDAT = g_pIOPregs->GPGDAT & ~(L3M|L3C|L3D) |(L3M|L3C);  //Start condition : L3M=H, L3C=H

		g_pIOPregs->GPGCON = g_pIOPregs->GPGCON & ~(0x3f); 
		g_pIOPregs->GPGCON |= ((0x1<<4) |(0x1<<2) |(0x1<<0)); 
		
#ifdef EVT1		
	g_pIOPregs->EXTINT1 = READEXTINT1(g_pIOPregs->EXTINT1) | (1<<11)|(1<<7)|(1<<3);
#else
		g_pIOPregs->GPGUDP  = g_pIOPregs->GPGUDP & ~(0x3f<<0) | (2<<4)|(2<<2)|(2<<0);	// 1:Pull-Down disable
#endif		

		g_pIOPregs->GPGDAT = g_pIOPregs->GPGDAT & ~(L3M|L3C|L3D) |(L3M|L3C);  //Start condition : L3M=H, L3C=H
#if 1
	_WrL3Addr(0x14+2); 		//STATUS (000101xx+10)	
	if( m_InputDMARunning & m_OutputDMARunning )
		_WrL3Data(0xa3,0); 	// 1010 0011	: OGS=0,IGS=6db,ADC_NI,DAC_NI,sngl speed,AonDon
	else if( m_InputDMARunning ) 
		_WrL3Data(0xa2,0); 	// 1010 0010	: OGS=0,IGS=6db,ADC_NI,DAC_NI,sngl speed,AonDoff		
	else if( m_OutputDMARunning )
		_WrL3Data(0xa1,0); 	// 1010 0001	: OGS=0,IGS=6db,ADC_NI,DAC_NI,sngl speed,AoffDon
	else
		_WrL3Data(0xa0,0); 	// 1010 0000	: OGS=0,IGS=6db,ADC_NI,DAC_NI,sngl speed,AoffDoff
#else
	_WrL3Addr(0x14+2); 		//STATUS (000101xx+10)	
	_WrL3Data(0xa1,0); 	// 1010 0011	: OGS=0,IGS=6db,ADC_NI,DAC_NI,sngl speed,AonDon
#endif	
	//RETAILMSG(DBG_ON, (TEXT("-Codec_channel\r\n")));
#elif (BSP_TYPE == BSP_SMDK2450)
	if( m_InputDMARunning & m_OutputDMARunning )
	{
		RETAILMSG(FALSE,(_T("Codec_channel() - In & Out\r\n")));
		WriteCodecRegister(WM8580_PWRDN1, WM8580_ALL_POWER_ON);				    // ADC, DAC power up
	}
	else if( m_InputDMARunning )
	{
		RETAILMSG(FALSE,(_T("Codec_channel() - In\r\n")));
	    WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_ADCPD_ENABLE|WM8580_PWRDN1_DACPD_ALL_DISABLE);		// ADC power up, DAC power down
	}
	else if( m_OutputDMARunning )
	{
		RETAILMSG(FALSE,(_T("Codec_channel() - Out\r\n")));
		WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_DACPD_ALL_ENABLE|WM8580_PWRDN1_ADCPD_DISABLE);   // DAC power up, ADC power down	
	}
	else
	{
		RETAILMSG(FALSE,(_T("Codec_channel() - none\r\n")));
	  	WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_ADCPD_DISABLE|WM8580_PWRDN1_DACPD_ALL_DISABLE ); // ADC/DAC power down
	}
#endif
	return(TRUE);
}


MMRESULT HardwareContext::SetOutputGain (DWORD dwGain)
{
    m_dwOutputGain = dwGain & 0xffff; // save off so we can return this from GetGain - but only MONO
    // convert 16-bit gain to 5-bit attenuation
    UCHAR ucGain;
    if (m_dwOutputGain == 0) {
        ucGain = 0x3F; // mute: set maximum attenuation
    }
    else {
        ucGain = (UCHAR) ((0xffff - m_dwOutputGain) >> 11); // codec supports 64dB attenuation, we'll only use 32
    }
#if (BSP_TYPE == BSP_SMDK2443)
    ASSERT((ucGain & 0xC0) == 0); // bits 6,7 clear indicate DATA0 in Volume mode.
    _WrL3Addr(UDA1341_ADDR_DATA0);
    _WrL3Data(ucGain, 0); 
#elif (BSP_TYPE == BSP_SMDK2450)
#endif
    return MMSYSERR_NOERROR;
}

MMRESULT HardwareContext::SetOutputMute (BOOL fMute)
{
    m_fOutputMute = fMute;


#if (BSP_TYPE == BSP_SMDK2443)
    _WrL3Addr(UDA1341_ADDR_DATA0);
    _WrL3Data(fMute ? 0x84 : 0x80, 0); // DATA0: 0x80 + fMute << 2
#elif (BSP_TYPE == BSP_SMDK2450)
    if(fMute)
    {
		WriteCodecRegister(WM8580_DAC_CONTROL5, 0x010);		
	}
	else
	{
		WriteCodecRegister(WM8580_DAC_CONTROL5, 0x000);
	}
#endif

    return MMSYSERR_NOERROR;
}

BOOL HardwareContext::GetOutputMute (void)
{
    return m_fOutputMute;
}

DWORD HardwareContext::GetOutputGain (void)
{
    return m_dwOutputGain;
}

BOOL HardwareContext::GetInputMute (void)
{
    return m_fInputMute;
}

MMRESULT HardwareContext::SetInputMute (BOOL fMute)
{
    m_fInputMute = fMute;
    return m_InputDeviceContext.SetGain(fMute ? 0: m_dwInputGain);
}

DWORD HardwareContext::GetInputGain (void)
{
    return m_dwInputGain;
}

MMRESULT HardwareContext::SetInputGain (DWORD dwGain)
{
    m_dwInputGain = dwGain;
    if (! m_fInputMute) {
        m_InputDeviceContext.SetGain(dwGain);
    }
    return MMSYSERR_NOERROR;
}

/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		InitCodec()

Description:	Initializes the audio codec chip.

Notes:			The audio codec chip is intialized for output mode
				but powered down.  To conserve battery life, the chip
				is only powered up when the user starts playing a 
				file.

				Specifically, the powerup/powerdown logic is done 
				in the AudioMute() function.  If either of the 
				audio channels are unmuted, then the chip is powered
				up; otherwise the chip is powered own.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitCodec()
{

#if (BSP_TYPE == BSP_SMDK2443)	
	RETAILMSG(DBG_ON, (TEXT("+IIS InitCodec\r\n")));

	g_pIOPregs->GPGCON = g_pIOPregs->GPGCON & ~( (0x3<<4)|(0x3<<2)|(0x3<<0) ); 
	g_pIOPregs->GPGCON |= ((0x1<<4) |(0x1<<2) |(0x1<<0));
#ifdef EVT1	
	g_pIOPregs->EXTINT1 = READEXTINT1(g_pIOPregs->EXTINT1) | (1<<11)|(1<<7)|(1<<3);
#else 
	g_pIOPregs->GPGUDP  = g_pIOPregs->GPGUDP & ~(0x3f<<0) | (2<<4)|(2<<2)|(2<<0);	// 1:Pull-Down disable
#endif
	g_pIOPregs->GPGDAT = (g_pIOPregs->GPGDAT & ~(L3M|L3C|L3D)) |(L3M|L3C);  //Start condition : L3M=H, L3C=H	
	   
	/****** L3 Interface ******/
#if (AUDIO_CODEC_CLOCK == 256)		// test value
	RETAILMSG(1,(TEXT("256 clock\r\n")));
	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)
	_WrL3Data(0x60,0); 	// 0110 0000: reset, 256fs, no DCfilter, iis bus

	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)
	_WrL3Data(0x20,0); 	// 0010 0000: no reset, 256fs, no DCfilter, iis bus

	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)
	_WrL3Data(0xa1,0); 	// 1010 0001	: OGS 0db, IGS 6db, ADC_NI, DAC_NI, sngl speed, ADC on DAC on	
#else
	RETAILMSG(1,(TEXT("384 clock\r\n")));
	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)
	_WrL3Data(0x50,0); 	//0101 0000: Reset, 384fs, IIS bus, no DCfilter

	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)
		_WrL3Data(0x10,0); 	// 0001 0000: No reset, 384fs, IIS bus, no DCfilter

	_WrL3Addr(0x14+2); 	//STATUS (000101xx+10)	
	_WrL3Data(0xa1,0); 	// 1010 0011: OGS 0db, IGS 6db, PAD noninvert, PDA noninvert, single speed, ADC on DAC on
#endif
	_WrL3Addr(0x14 + 0); 	//DATA0 (000101xx+00)
	_WrL3Data(0xc2,0);	 // 1100 0010: DATA0, Extended addr(010) 
	_WrL3Data(0xf2,0);	 // 111 111 01: DATA0, MS=9dB, Ch1=on Ch2=on
	_WrL3Data(0xc4,0);	 // 1100 0010: DATA0, Extended addr(010) 
	_WrL3Data(0xE0,0);	 // 111 111 01: DATA0, MS=9dB, Ch1=on Ch2=on
	_WrL3Data(0xc5,0);	 // 1100 0010: DATA0, Extended addr(010) 
	_WrL3Data(0xE0,0);	 // 111 111 01: DATA0, MS=9dB, Ch1=on Ch2=on	
	RETAILMSG(DBG_ON, (TEXT("-IIS InitCodec\r\n")));
#elif (BSP_TYPE == BSP_SMDK2450)
	int i;

	RETAILMSG(DBG_ON, (TEXT("+IIS InitCodec\r\n")));

	{
		DWORD dwErr = ERROR_SUCCESS, bytes;
		// Initialize I2C Driver
		hI2C = CreateFile( L"I2C0:",
	                             GENERIC_READ|GENERIC_WRITE,
	                             FILE_SHARE_READ|FILE_SHARE_WRITE,
	                             NULL, OPEN_EXISTING, 0, 0);

	    if ( INVALID_HANDLE_VALUE == hI2C )
		{
	        dwErr = GetLastError();
	        RETAILMSG(1, (TEXT("Error %d opening device '%s' \r\n"), dwErr, L"I2C0:" ));
	    }

	    // Gat Fastcall driver-to-driver entrypoints
	    if ( !DeviceIoControl(hI2C,
	                          IOCTL_I2C_GET_FASTCALL, 
	                          NULL, 0, 
	                          &fc, sizeof(fc),
	                          &bytes, NULL) ) 
	    {
	        dwErr = GetLastError();
	        RETAILMSG(1,(TEXT("IOCTL_I2C_GET_FASTCALL ERROR: %u \r\n"), dwErr));