📄 kitlusbser.c
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int i;
UINT16 Wr_Data=0;
if (num&0x1) num++;
for(i=0;i<num;i+=2)
{
Wr_Data=((*(buf+1))<<8)|*buf;
Outp32(EP1_FIFO, Wr_Data);
buf +=2;
}
}
void RdPktEp3(UINT8 *buf, int num)
{
int i;
UINT16 Rdata;
for(i=0;i<num;i+=2)
{
Inp32(EP3_FIFO, Rdata);
buf[i] = (UINT8)Rdata;
buf[i+1] = (UINT8)(Rdata>>8);
}
g_pDownPt += num;
}
void WrPktEp0(UINT8 *buf, int num)
{
int i;
UINT16 Wr_Data=0;
if (num&0x1) num++;
for(i=0;i<num;i+=2)
{
Wr_Data=((*(buf+1))<<8)|*buf;
Outp32(EP0_FIFO, Wr_Data);
buf +=2;
}
}
void SetEndpoint(void)
{
//KITLOutputDebugString ("[+]SetEndpoint\n");
// *** End point information ***
Outp32(INDEX_REG, EP0);
// For L18
Outp32(EP_DIR_REG, 0x02); // EP1=> TX, EP3=>RX
Outp32(EP_INT_EN_REG, 0xF); // EP0, 3 Interrupt enable, 15b=report mode[0], 3b~14b=ep0/1 delay_con
// Outp32(EP_INT_EN_REG, 0x0);
// Outp32(SYS_CON_REG, 0x0023); // error interrupt disable, 16bit bus, Little format, suspend&reset enable
Outp32(SYS_CON_REG, 0x0063); // error interrupt disable,speed detection, 16bit bus, Little format, suspend&reset enable
Outp32(EP0_CON_REG, 0x0000);
// EP1 IN Max Packet size settings
Outp32(INDEX_REG, EP1);
Outp32(EP_CON_REG, 0x0000); // dual Disable
// EP3 OUT Max Packet size settings
Outp32(INDEX_REG, EP3);
Outp32(EP_CON_REG, 0x0000); // dual Disable
// Outp32(EP_CON_REG, 0x0080); // dual enable
Outp32(INDEX_REG, EP0);
//KITLOutputDebugString ("[-]SetEndpoint\n");
}
void SetMaxPktSizes(USB_SPEED eSpeed)
{
if (eSpeed == USB_HIGH)
{
g_eSpeed = USB_HIGH;
g_uEp0MaxPktSize = 64;
g_uEp1MaxPktSize = 512;
g_uEp3MaxPktSize = 512;
}
else
{
g_eSpeed = USB_FULL;
g_uEp0MaxPktSize = 8;
g_uEp1MaxPktSize = 64;
g_uEp3MaxPktSize = 64;
}
// EP0 Max Packet size settings
Outp32(INDEX_REG, EP0);
Outp32(MAX_PKT_REG, g_uEp0MaxPktSize); // max packet size
// EP1 OUT Max Packet size settings
Outp32(INDEX_REG, EP1);
Outp32(MAX_PKT_REG, g_uEp1MaxPktSize); // max packet size
// EP2 IN Max Packet size settings
Outp32(INDEX_REG, EP3);
Outp32(MAX_PKT_REG, g_uEp3MaxPktSize); // max packet size
}
void S3C2450_USB_INIT(void)
{
//
// Initialize the USBD Controller
//
volatile S3C2450_CLKPWR_REG *s2450PWR = (S3C2450_CLKPWR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_CLOCK_POWER, FALSE);
volatile S3C2450_IOPORT_REG *s2450IOP = (S3C2450_IOPORT_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_IOPORT, FALSE);
volatile int i;
//KITLOutputDebugString ("[+]S3C2450_USB_INIT\n");
s2450IOP->MISCCR=s2450IOP->MISCCR&~(1<<12); // USBD is 0 ,normal mode ,1 is suspend mode /
s2450PWR->PWRCFG |= (0x1<<4); // phy power enable
//USB device 2.0 must reset like bellow , 1st phy reset and after at least 10us, func_reset & host reset
//phy reset can reset bellow registers.
s2450PWR->USB_RSTCON = (0x0<<2)|(0x0<<1)|(0x1<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset
// phy reset must be asserted for at 10us
for(i=0; i<1000000; i++) ;
s2450PWR->USB_RSTCON = (0x1<<2)|(0x1<<1)|(0x0<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset
s2450PWR->USB_RSTCON = (0x0<<2)|(0x0<<1)|(0x0<<0);//Function 2.0 S/W reset, Host 1.1 S/W reset,PHY 2.0 S/W reset
s2450PWR->USB_PHYCTRL =(0x00<<3)|(0x1<<2)|(0x0<<1)|(0x0<<0); //48Mhz,Oscillator,External X-tal,device
// s2450PWR->USB_PHYCTRL =(0x00<<3)|(0x1<<2)|(0x0<<1)|(0x0<<0); //48Mhz,Oscillator,External X-tal,device
s2450PWR->USB_PHYPWR = (0x1<<31)|(0x0<<4)|(0x0<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0);
//48Mhz clock on ,PHY2.0 analog block power on,XO block power on,XO block power in suspend mode,PHY 2.0 Pll power on ,suspend signal for save mode disable
s2450PWR->USB_CLKCON = (0x1<<31)|(0x1<<2)|(0x0<<1)|(0x1<<0); // vbus detect enable...
//D+ pull up , USB2.0 Function clock Enable, USB1.1 HOST disable,USB2.0 PHY test enable
//rHCLKCON &= ~(0x1<<12); //
// s2450PWR->CLKDIV1|=0x1<<4; // for test clk enable
g_uEp0State = EP0_STATE_INIT;
SetDescriptorTable();
SetEndpoint();
//KITLOutputDebugString ("[-]S3C2450_USB_INIT\n");
}
////////////////////////////////////////////////////////////////////////////////////
//
// Endpoint0 Control Functions
//
////////////////////////////////////////////////////////////////////////////////////
/*----------------------------------------------------------------------
* Variables for EP0 resend control. Keep track of last packet sent.
*/
S3CUSB_INFO g_Info; // record keeping
SetupPKG dReq;
USBSERKITL_INFO USBSerInfo;
static char * sendPacket;
static int sendPacketLength;
static int sendTotalLength;
static char * savSendPacket;
static int savSendPacketLength;
/* EP1/EP4 packet size. For polling this can not be greater than 16
*/
static unsigned int maxPacketSize = EP1Len;
void SetDescriptorTable(void)
{
//KITLOutputDebugString ("[+]SetDescriptorTable\n");
// Standard device descriptor
g_oDescDevice.bLength=0x12; // EP0_DEV_DESC_SIZE=0x12 bytes
g_oDescDevice.bDescriptorType=DEVICE_TYPE_;
g_oDescDevice.bDeviceClass=0xFF; // 0x0
g_oDescDevice.bDeviceSubClass=0xFF;//?
g_oDescDevice.bDeviceProtocol=0xFF;//?
g_oDescDevice.bMaxPacketSize0=64 ;//g_uEp0MaxPktSize;
g_oDescDevice.idVendorL=0x5E;
g_oDescDevice.idVendorH=0x04;
g_oDescDevice.idProductL=0xCE;
g_oDescDevice.idProductH=0x00;
g_oDescDevice.bcdDeviceL=0x00;
g_oDescDevice.bcdDeviceH=0x00;
g_oDescDevice.iManufacturer=0x0; // index of string descriptor
g_oDescDevice.iProduct=0x0; // index of string descriptor
g_oDescDevice.iSerialNumber=0x0;
g_oDescDevice.bNumConfigurations=0x1;
if (g_eSpeed == USB_FULL) {
g_oDescDevice.bcdUSBL=0x10;
g_oDescDevice.bcdUSBH=0x01; // Ver 1.10
}
else {
g_oDescDevice.bcdUSBL=0x00;
g_oDescDevice.bcdUSBH=0x02; // Ver 2.0
}
// Standard configuration descriptor
oDesc.oDescConfig.bLength=0x9;
oDesc.oDescConfig.bDescriptorType=CONFIGURATION_TYPE;
oDesc.oDescConfig.wTotalLengthL=0x20; // <cfg desc>+<if desc>+<endp0 desc>+<endp1 desc>
oDesc.oDescConfig.wTotalLengthH=0;
oDesc.oDescConfig.bNumInterfaces=1;
// dbg descConf.bConfigurationValue=2; // why 2? There's no reason.
oDesc.oDescConfig.bConfigurationValue=1;
oDesc.oDescConfig.iConfiguration=0;
oDesc.oDescConfig.bmAttributes=CONF_ATTR_SELFPOWERED;//CONF_ATTR_DEFAULT; // bus powered only.
oDesc.oDescConfig.maxPower=1;//25; // draws 50mA current from the USB bus.
// Standard interface descriptor
oDesc.oDescInterface.bLength=0x9;
oDesc.oDescInterface.bDescriptorType=INTERFACE_TYPE_;
oDesc.oDescInterface.bInterfaceNumber=0x0;
oDesc.oDescInterface.bAlternateSetting=0x0; // ?
oDesc.oDescInterface.bNumEndpoints=2; // # of endpoints except EP0
oDesc.oDescInterface.bInterfaceClass=0xff; // 0x0 ?
oDesc.oDescInterface.bInterfaceSubClass=0xFF;
oDesc.oDescInterface.bInterfaceProtocol=0xFF;
oDesc.oDescInterface.iInterface=0x0;
// Standard endpoint0 descriptor
oDesc.oDescEndpt1.bLength=0x7;
oDesc.oDescEndpt1.bDescriptorType=ENDPOINT_TYPE;
oDesc.oDescEndpt1.bEndpointAddress=1|EP_ADDR_IN; // 2400Xendpoint 1 is IN endpoint.
oDesc.oDescEndpt1.bmAttributes=EP_ATTR_BULK;
oDesc.oDescEndpt1.wMaxPacketSizeL=0x00;//(UINT8)g_uEp1MaxPktSize; // 512
oDesc.oDescEndpt1.wMaxPacketSizeH=0x2;//(UINT8)(g_uEp1MaxPktSize>>8);
oDesc.oDescEndpt1.bInterval=0x0; // not used
// Standard endpoint1 descriptor
oDesc.oDescEndpt3.bLength=0x7;
oDesc.oDescEndpt3.bDescriptorType=ENDPOINT_TYPE;
oDesc.oDescEndpt3.bEndpointAddress=3|EP_ADDR_OUT; // 2400X endpoint 3 is OUT endpoint.
oDesc.oDescEndpt3.bmAttributes=EP_ATTR_BULK;
oDesc.oDescEndpt3.wMaxPacketSizeL=0x00;//(UINT8)g_uEp3MaxPktSize; //512
oDesc.oDescEndpt3.wMaxPacketSizeH=0x2;//(UINT8)(g_uEp3MaxPktSize>>8);
oDesc.oDescEndpt3.bInterval=0x0; // not used
//KITLOutputDebugString ("[-]SetDescriptorTable\n");
}
UINT16 HandleEvent_BulkOut(UINT8 *pch, UINT16 length)
{
UINT16 ep3csr;//, ep2con;//, sys_status;
UINT32 CBWSignature=0, CBWTag=0;//, i;
UINT16 fifoCnt;
UINT16 fifoCntByte;
UINT32 temp;
length = 0;
// //KITLOutputDebugString ("[+]HandleEvent_BulkOut LEN: %d\n",length);
Outp32(INDEX_REG, EP3);
Inp32(EP_STATUS_REG, ep3csr);
Inp32(DMA_TOTAL_CNT1_REG, temp);
if (ep3csr & EP_SENT_STALL) // SENT STALL : protocol stall.
{
// Uart_Printf(" Sent Stall \n");
Outp32(EP_STATUS_REG, EP_SENT_STALL);
return 0;
}
if (ep3csr & EP_FIFO_FLUSH)
{
Outp32(EP_CON_REG, EP_FIFO_FLUSH);
return 0;
}
if (ep3csr & EP_RX_SUCCESS)
{
if (g_eOpMode == USB_CPU)
{
Inp32(BYTE_READ_CNT_REG, fifoCnt);
if (ep3csr&(0x1<<4))
fifoCntByte = fifoCnt * 2 -1;
else
fifoCntByte = fifoCnt * 2;
//KITLOutputDebugString("downloadFileSize!=0, 0x%x 1'st BYTE_READ_CNT_REG : %d\n", g_pDownPt, fifoCntByte);
// RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte);
RdPktEp3((UINT8 *)pch, fifoCntByte);
length = fifoCntByte;
if (ep3csr & (0x2<<2))
{
Inp32(BYTE_READ_CNT_REG, fifoCnt);
Inp32(EP_STATUS_REG, ep3csr);//kimsh, one more read
if (ep3csr&(0x1<<4))
fifoCntByte = fifoCnt * 2 -1;
else
fifoCntByte = fifoCnt * 2;
//KITLOutputDebugString("2'd BYTE_READ_CNT_REG : %x\n", fifoCntByte);
//RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte);
RdPktEp3((UINT8 *)pch, fifoCntByte); //kimsh
length = length + fifoCntByte;
}
}
}
// //KITLOutputDebugString ("[-]HandleEvent_BulkOut OUT: LEN : %d\n",length);
return length;
}
#if 0
void PrepareEp1Fifo(UINT32 BaseAddr)
{
// int i;
// UINT32 in_csr1;
UINT8* BulkInBuf = (UINT8*)BaseAddr;
if (g_uBulkInCount > g_uEp1MaxPktSize)
{
Outp32(INDEX_REG, EP1);
Outp32(BYTE_WRITE_CNT_REG, g_uEp1MaxPktSize);
WrPktEp1(BulkInBuf, g_uEp1MaxPktSize);
g_uBulkInAddr = BaseAddr + g_uEp1MaxPktSize;
g_uBulkInCount -= g_uEp1MaxPktSize;
}
else
{
Outp32(INDEX_REG, EP1);
Outp32(BYTE_WRITE_CNT_REG, g_uBulkInCount);
WrPktEp1(BulkInBuf, g_uBulkInCount);
g_uBulkInAddr = BaseAddr + g_uBulkInCount;
g_uBulkInCount = 0;
}
}
#endif
UINT16 PrepareEp1Fifo(UINT8 *BulkInBuf, UINT16 length)
{
//KITLOutputDebugString ("[+]PrepareEp1Fifo\n");
if (length > g_uEp1MaxPktSize){
//KITLOutputDebugString ("Tx Length over : %d\n",length);
}
else{
Outp32(INDEX_REG, EP1);
Outp32(BYTE_WRITE_CNT_REG, length);
WrPktEp1(BulkInBuf, length);
}
//KITLOutputDebugString ("[-]PrepareEp1Fifo\n");
return length;
}
UINT16 HandleEvent_BulkIn(UINT8 *pch, UINT16 length)
{
UINT16 ep1csr;
UINT32 ep_int;
UINT16 TxLength=0;
// KITLOutputDebugString ("[+]HandleEvent_BulkIn: LEN : %d\n",length);
Inp32(EP_INT_REG, ep_int);
// Outp32(EP_INT_REG, INT_REG_EP1); // Interrupt Clear
// If nothing to send, just return after clearing interrupt.
if (!pch )
{
Outp32(EP_INT_REG, INT_REG_EP1); // Interrupt Clear
TxLength = 0;
return TxLength;
}
// EP1 CSR register status check
Outp32(INDEX_REG, 0x01);
Inp32(EP_STATUS_REG, ep1csr);
if((ep1csr & (0x01 << 2)) | (ep1csr & (0x11 << 2))){
//KITLOutputDebugString(" One packet : len : %d\n",length);
return 0;
}
else if((ep1csr & (0x10 << 2))){
//KITLOutputDebugString(" two packet\n");
return 0;
}
else if((ep1csr & (0x11 << 2))){
//KITLOutputDebugString(" Invalid packet\n");
return 0;
}
else{
TxLength = PrepareEp1Fifo(pch,length);
}
//KITLOutputDebugString ("[-]HandleEvent_BulkIn OUT: LEN\n",TxLength);
return TxLength;
}
void TransferEp0(void)
{
UINT16 usSysStatus;
//KITLOutputDebugString ("[+]TransferEp0\n");
switch (g_uEp0State)
{
case EP0_STATE_INIT:
break;
// === GET_DESCRIPTOR:DEVICE ===
case EP0_STATE_GD_DEV_0:
if (g_eSpeed == 1)
{
Outp32(BYTE_WRITE_CNT_REG, 18);
WrPktEp0((UINT8 *)&g_oDescDevice+0, 18); // EP0_PKT_SIZE
g_uEp0State = EP0_STATE_INIT;
//KITLOutputDebugString("EndpointZeroTransfer(EP0_STATE_GD_DEV)\n");
tempflag = TRUE;
}
else
{
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