📄 s3c6410otgdevice.h
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Module Name:
S3C6410OTGD.H
Abstract:
Samsung S3C6410OTG USB Function Platform-Dependent Driver header.
--*/
#ifndef _S3C6410OTGD_H_
#define _S3C6410OTGD_H_
#include <bsp.h>
#include <usbfntypes.h>
#include <usbfn.h>
#include <devload.h>
#ifndef SHIP_BUILD
#define STR_MODULE _T("S3C6410UsbFn!")
#define SETFNAME() LPCTSTR pszFname = STR_MODULE _T(__FUNCTION__) _T(":")
#else
#define SETFNAME()
#endif
#define __MODULE__ _T("S3C6410USBFN")
#ifndef DEBUG
// The PDD should use this macro to set up the debug zones.
#define UFN_GENERATE_DPCURSETTINGS(szName, szZone8, szZone9, szZone10, szZone11, ulMask) \
extern "C" DBGPARAM dpCurSettings = { \
szName, \
{ \
_T("Error"), _T("Warning"), _T("Init"), _T("Transfer"), \
_T("Pipe"), _T("Send"), _T("Receive"), _T("USB Events"), \
szZone8, szZone9, szZone10, szZone11, \
_T("Function"), _T("Comments"), _T(""), _T("") \
}, \
ulMask \
};
#endif
// Debug zone defs
#define UFN_ZONE_ERROR DEBUGZONE(0)
#define UFN_ZONE_WARNING DEBUGZONE(1)
#define UFN_ZONE_INIT DEBUGZONE(2)
#define UFN_ZONE_TRANSFER DEBUGZONE(3)
#define UFN_ZONE_PIPE DEBUGZONE(4)
#define UFN_ZONE_SEND DEBUGZONE(5)
#define UFN_ZONE_RECEIVE DEBUGZONE(6)
#define UFN_ZONE_USB_EVENTS DEBUGZONE(7)
#define UFN_ZONE_POWER DEBUGZONE(8)
#define UFN_ZONE_TRACE DEBUGZONE(9)
#define DBG_ERROR (1 << 0)
#define DBG_WARNING (1 << 1)
#define DBG_INIT (1 << 2)
#define DBG_TRANSFER (1 << 3)
#define DBG_PIPE (1 << 4)
#define DBG_SEND (1 << 5)
#define DBG_RECEIVE (1 << 6)
#define DBG_USB_EVENTS (1 << 7)
#define DBG_POWER (1 << 8)
#define DBG_TRACE (1 << 9)
#define USBFNCTL_RETAILZONES (DBG_ERROR)
#define USBFNCTL_DEBUGZONES (DBG_ERROR | DBG_INIT)
#ifdef DEBUG
#define USBFNCTL_ZONES (USBFNCTL_DEBUGZONES)
#else
#define USBFNCTL_ZONES (USBFNCTL_RETAILZONES)
#endif
/////// Test Mode For USB HS Electrical Test ///////
// To use Test mode below "TEST_MODE_SUPPORT" shoude be defined TRUE.
#define TEST_MODE_SUPPORT TRUE // To use Test Mode for HS Electrical Compliance Test, Should be TRUE.
#if TEST_MODE_SUPPORT
#define USB_TEST_J 0x01
#define USB_TEST_K 0x02
#define USB_TEST_SE0_NAK 0x03
#define USB_TEST_PACKET 0x04
#define USB_TEST_FORCE_ENABLE 0x05
#define USB_FEATURE_TEST_MODE 2
#define TEST_PKT_SIZE 53
#define TEST_ARR_SIZE 27
WORD ahwTestPkt [TEST_ARR_SIZE] = {
0x0000, 0x0000, 0x0000,
0xAA00, 0xAAAA, 0xAAAA, 0xAAAA,
0xEEAA, 0xEEEE, 0xEEEE, 0xEEEE,
0xFEEE, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0x7FFF, 0xDFBF,
0xF7EF, 0xFDFB, 0x7EFC, 0xDFBF,
0xF7EF, 0xFDFB, 0x007E, 0x0000
};
#endif
// Test Mode Bits in DCTL
#define TEST_MODE_MASK (0x7 << 4)
#define TEST_MODE_DISABLED (0x0 << 4)
#define TEST_J_MODE (0x1 << 4)
#define TEST_K_MODE (0x2 << 4)
#define TEST_SE0_NAK_MODE (0x3 << 4)
#define TEST_PACKET_MODE (0x4 << 4)
#define TEST_FORCE_ENABLED (0x5 << 4)
#define TM_Disabled(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_MODE_DISABLED)); \
} while(0)
#define TM_J_Selected(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_J_MODE)); \
} while(0)
#define TM_K_Selected(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_K_MODE)); \
} while(0)
#define TM_SN_Selected(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_SE0_NAK_MODE)); \
} while(0)
#define TM_PKT_Selected(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_PACKET_MODE)); \
} while(0)
#define TM_Enabled(parm) do { \
parm = ((parm) & ~(TEST_MODE_MASK) | (TEST_FORCE_ENABLED)); \
} while(0)
/////////////////////////////////////////////////////////////////////////
#define OTG_LINK_REG_SIZE 0x11000
#define GOTGCTL 0x000 // OTG Control & Status
#define GOTGINT 0x004 // OTG Interrupt
#define GAHBCFG 0x008 // Core AHB Configuration
#define GUSBCFG 0x00C // Core USB Configuration
#define GRSTCTL 0x010 // Core Reset
#define GINTSTS 0x014 // Core Interrupt
#define GINTMSK 0x018 // Core Interrupt Mask
#define GRXSTSR 0x01C // Receive Status Debug Read/Status Read
#define GRXSTSP 0x020 // Receive Status Debug Pop/Status Pop
#define GRXFSIZ 0x024 // Receive FIFO Size
#define GNPTXFSIZ 0x028 // Non-Periodic Transmit FIFO Size
#define GNPTXSTS 0x02C // Non-Periodic Transmit FIFO/Queue Status
#define GPVNDCTL 0x034 // PHY Vendor Control
#define GGPIO 0x038 // General Purpose I/O
#define GUID 0x03C // User ID
#define GSNPSID 0x040 // Synopsys ID
#define GHWCFG1 0x044 // User HW Config1
#define GHWCFG2 0x048 // User HW Config2
#define GHWCFG3 0x04C // User HW Config3
#define GHWCFG4 0x050 // User HW Config4
#define HPTXFSIZ 0x100 // Host Periodic Transmit FIFO Size
#define DPTXFSIZ1 0x104 // Device Periodic Transmit FIFO-1 Size
#define DPTXFSIZ2 0x108 // Device Periodic Transmit FIFO-2 Size
#define DPTXFSIZ3 0x10C // Device Periodic Transmit FIFO-3 Size
#define DPTXFSIZ4 0x110 // Device Periodic Transmit FIFO-4 Size
#define DPTXFSIZ5 0x114 // Device Periodic Transmit FIFO-5 Size
#define DPTXFSIZ6 0x118 // Device Periodic Transmit FIFO-6 Size
#define DPTXFSIZ7 0x11C // Device Periodic Transmit FIFO-7 Size
#define DPTXFSIZ8 0x120 // Device Periodic Transmit FIFO-8 Size
#define DPTXFSIZ9 0x124 // Device Periodic Transmit FIFO-9 Size
#define DPTXFSIZ10 0x128 // Device Periodic Transmit FIFO-10 Size
#define DPTXFSIZ11 0x12C // Device Periodic Transmit FIFO-11 Size
#define DPTXFSIZ12 0x130 // Device Periodic Transmit FIFO-12 Size
#define DPTXFSIZ13 0x134 // Device Periodic Transmit FIFO-13 Size
#define DPTXFSIZ14 0x138 // Device Periodic Transmit FIFO-14 Size
#define DPTXFSIZ15 0x13C // Device Periodic Transmit FIFO-15 Size
//*********************************************************************
// Host Mode Registers
//*********************************************************************
// Host Global Registers
#define HCFG 0x400 // Host Configuration
#define HFIR 0x404 // Host Frame Interval
#define HFNUM 0x408 // Host Frame Number/Frame Time Remaining
#define HPTXSTS 0x410 // Host Periodic Transmit FIFO/Queue Status
#define HAINT 0x414 // Host All Channels Interrupt
#define HAINTMSK 0x418 // Host All Channels Interrupt Mask
// Host Port Control & Status Registers
#define HPRT 0x440 // Host Port Control & Status
// Host Channel-Specific Registers #0
#define HCCHAR0 0x500 // Host Channel-0 Characteristics
#define HCSPLT0 0x504 // Host Channel-0 Split Control
#define HCINT0 0x508 // Host Channel-0 Interrupt
#define HCINTMSK0 0x50C // Host Channel-0 Interrupt Mask
#define HCTSIZ0 0x510 // Host Channel-0 Transfer Size
#define HCDMA0 0x514 // Host Channel-0 DMA Address
// Host Channel-Specific Registers #1
#define HCCHAR1 0x520 // Host Channel-1 Characteristics
#define HCSPLT1 0x524 // Host Channel-1 Split Control
#define HCINT1 0x528 // Host Channel-1 Interrupt
#define HCINTMSK1 0x52C // Host Channel-1 Interrupt Mask
#define HCTSIZ1 0x530 // Host Channel-1 Transfer Size
#define HCDMA1 0x534 // Host Channel-1 DMA Address
// Host Channel-Specific Registers #2
#define HCCHAR2 0x540 // Host Channel-2 Characteristics
#define HCSPLT2 0x544 // Host Channel-2 Split Control
#define HCINT2 0x548 // Host Channel-2 Interrupt
#define HCINTMSK2 0x54C // Host Channel-2 Interrupt Mask
#define HCTSIZ2 0x550 // Host Channel-2 Transfer Size
#define HCDMA2 0x554 // Host Channel-2 DMA Address
// Host Channel-Specific Registers #3
#define HCCHAR3 0x560 // Host Channel-3 Characteristics
#define HCSPLT3 0x564 // Host Channel-3 Split Control
#define HCINT3 0x568 // Host Channel-3 Interrupt
#define HCINTMSK3 0x56C // Host Channel-3 Interrupt Mask
#define HCTSIZ3 0x570 // Host Channel-3 Transfer Size
#define HCDMA3 0x574 // Host Channel-3 DMA Address
// Host Channel-Specific Registers #4
#define HCCHAR4 0x580 // Host Channel-4 Characteristics
#define HCSPLT4 0x584 // Host Channel-4 Split Control
#define HCINT4 0x588 // Host Channel-4 Interrupt
#define HCINTMSK4 0x58C // Host Channel-4 Interrupt Mask
#define HCTSIZ4 0x590 // Host Channel-4 Transfer Size
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