📄 usb.c
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Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+8, 8); // EP0_PKT_SIZE OTGDEV_WrPktEp0((UINT8 *)&descConf+8, 1); OTGDEV_WrPktEp0((UINT8 *)&descIf+0, 7);
oOtgDev.m_uEp0State = EP0_STATE_GD_CFG_2;
break;
case EP0_STATE_GD_CFG_2:
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+16, 8); // EP0_PKT_SIZE OTGDEV_WrPktEp0((UINT8 *)&descIf+7, 2); OTGDEV_WrPktEp0((UINT8 *)&descEndpt0+0, 6);
oOtgDev.m_uEp0State = EP0_STATE_GD_CFG_3;
break;
case EP0_STATE_GD_CFG_3:
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+24, 8); // EP0_PKT_SIZE OTGDEV_WrPktEp0((UINT8 *)&descEndpt0+6, 1); OTGDEV_WrPktEp0((UINT8 *)&descEndpt1+0, 7);
oOtgDev.m_uEp0State = EP0_STATE_GD_CFG_4;
break;
case EP0_STATE_GD_CFG_4:
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
// === GET_DESCRIPTOR:CONFIGURATION ONLY===
case EP0_STATE_GD_CFG_ONLY_0:
if (oOtgDev.m_eSpeed == USB_HIGH)
{
DBGUSB("[DBG : EP0_STATE_GD_CFG_ONLY]\n");
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, max 64byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+0, 9); // EP0_PKT_SIZE
oOtgDev.m_uEp0State = EP0_STATE_INIT;
}
else
{
DBGUSB("[DBG : EP0_STATE_GD_CFG_ONLY_0]\n");
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+0, 8); // EP0_PKT_SIZE
oOtgDev.m_uEp0State = EP0_STATE_GD_CFG_ONLY_1;
}
break;
case EP0_STATE_GD_CFG_ONLY_1:
DBGUSB("[DBG : EP0_STATE_GD_CFG_ONLY_1]\n");
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescConfig+8, 1); // EP0_PKT_SIZE
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
// === GET_DESCRIPTOR:INTERFACE ONLY===
case EP0_STATE_GD_IF_ONLY_0:
if (oOtgDev.m_eSpeed == USB_HIGH)
{
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, max 64byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescInterface+0, 9); // INTERFACE_DESC_SIZE
oOtgDev.m_uEp0State = EP0_STATE_INIT;
}
else
{
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescInterface+0, 8); // INTERFACE_DESC_SIZE
oOtgDev.m_uEp0State = EP0_STATE_GD_IF_ONLY_1;
}
break;
case EP0_STATE_GD_IF_ONLY_1:
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescInterface+8, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
// === GET_DESCRIPTOR:ENDPOINT 1 ONLY===
case EP0_STATE_GD_EP0_ONLY_0:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, ENDPOINT_DESC_SIZE);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescEndpt1+0, ENDPOINT_DESC_SIZE);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
// === GET_DESCRIPTOR:ENDPOINT 2 ONLY===
case EP0_STATE_GD_EP1_ONLY_0:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, ENDPOINT_DESC_SIZE);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oOtgDev.m_oDesc.oDescEndpt2+0, ENDPOINT_DESC_SIZE);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
// === GET_DESCRIPTOR:STRING ===
case EP0_STATE_GD_STR_I0:
DBGUSB("[GDS0_0]");
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 4);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)aDescStr0, 4);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GD_STR_I1:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, sizeof(aDescStr1));
if ((oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize+oOtgDev.m_uControlEPMaxPktSize)<sizeof(aDescStr1))
{
if (oOtgDev.m_eSpeed == USB_HIGH)
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, 64byte
else
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)aDescStr1+(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize), oOtgDev.m_uControlEPMaxPktSize);
oOtgDev.m_uEp0State = EP0_STATE_GD_STR_I1;
oOtgDev.m_uEp0SubState++;
}
else
{
if (oOtgDev.m_eSpeed == USB_HIGH)
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, 64byte
else
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)aDescStr1+(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize), sizeof(aDescStr1)-(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize));
oOtgDev.m_uEp0State = EP0_STATE_INIT;
oOtgDev.m_uEp0SubState = 0;
}
break;
case EP0_STATE_GD_STR_I2:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, sizeof(aDescStr2));
if ((oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize+oOtgDev.m_uControlEPMaxPktSize)<sizeof(aDescStr2))
{
if (oOtgDev.m_eSpeed == USB_HIGH)
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, 64byte
else
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)aDescStr2+(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize), oOtgDev.m_uControlEPMaxPktSize);
oOtgDev.m_uEp0State = EP0_STATE_GD_STR_I2;
oOtgDev.m_uEp0SubState++;
}
else
{
if (oOtgDev.m_eSpeed == USB_HIGH)
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, 64byte
else
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
DBGUSB("[E]");
OTGDEV_WrPktEp0((UINT8 *)aDescStr2+(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize), sizeof(aDescStr2)-(oOtgDev.m_uEp0SubState*oOtgDev.m_uControlEPMaxPktSize));
oOtgDev.m_uEp0State = EP0_STATE_INIT;
oOtgDev.m_uEp0SubState = 0;
}
break;
case EP0_STATE_GD_DEV_QUALIFIER:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 10);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(0<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)aDeviceQualifierDescriptor+0, 10);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_INTERFACE_GET:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oInterfaceGet+0, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GET_STATUS0:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oStatusGet+0, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GET_STATUS1:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oStatusGet+1, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GET_STATUS2:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oStatusGet+2, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GET_STATUS3:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oStatusGet+3, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
case EP0_STATE_GET_STATUS4:
OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 1);
Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(BULK_IN_EP<<11)|(3<<0)); //ep0 enable, clear nak, next ep0, 8byte
OTGDEV_WrPktEp0((UINT8 *)&oStatusGet+4, 1);
oOtgDev.m_uEp0State = EP0_STATE_INIT;
break;
default:
break;
}
}
//////////
// Function Name : OTGDEV_HandleEvent_BulkIn
// Function Desctiption : This function handles bulk in transfer in CPU mode.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_HandleEvent_BulkIn(void)
{
UINT8* BulkInBuf;
UINT32 uRemainCnt;
DBGUSB("CPU_MODE Bulk In Function\n");
BulkInBuf = (UINT8*)oOtgDev.m_pUpPt;
uRemainCnt = oOtgDev.m_uUploadSize- ((UINT32)oOtgDev.m_pUpPt - oOtgDev.m_uUploadAddr);
if (uRemainCnt > oOtgDev.m_uBulkInEPMaxPktSize)
{
OTGDEV_SetInEpXferSize(EP_TYPE_BULK, 1, oOtgDev.m_uBulkInEPMaxPktSize);
Outp32(bulkIn_DIEPCTL, 1u<<31|1<<26|2<<18|1<<15|oOtgDev.m_uBulkInEPMaxPktSize<<0); //ep3 enable, clear nak, bulk, usb active, next ep3, max pkt 64
OTGDEV_WrPktBulkInEp(BulkInBuf, oOtgDev.m_uBulkInEPMaxPktSize);
oOtgDev.m_pUpPt += oOtgDev.m_uBulkInEPMaxPktSize;
}
else if(uRemainCnt > 0)
{
OTGDEV_SetInEpXferSize(EP_TYPE_BULK, 1, uRemainCnt);
Outp32(bulkIn_DIEPCTL, 1u<<31|1<<26|2<<18|1<<15|oOtgDev.m_uBulkInEPMaxPktSize<<0); //ep3 enable, clear nak, bulk, usb active, next ep3, max pkt 64
OTGDEV_WrPktBulkInEp(BulkInBuf, uRemainCnt);
oOtgDev.m_pUpPt += uRemainCnt;
}
else //uRemainCnt = 0
{
Outp32(bulkIn_DIEPCTL, (DEPCTL_SNAK|DEPCTL_BULK_TYPE));
}
}
//////////
// Function Name : OTGDEV_HandleEvent_BulkOut
// Function Desctiption : This function handles bulk out transfer.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_HandleEvent_BulkOut(UINT32 fifoCntByte)
{
if (oOtgDev.m_eOpMode == USB_CPU)
{
// EdbgOutputDebugString("fifoCntByte : %x\n", fifoCntByte);g_pDownPt
OTGDEV_RdPktBulkOutEp((UINT8 *)g_pDownPt, fifoCntByte);
OTGDEV_SetOutEpXferSize(EP_TYPE_BULK, 1, fifoCntByte);
Outp32(bulkOut_DOEPCTL, 1<<31|1<<26|2<<18|1<<15|oOtgDev.m_uBulkOutEPMaxPktSize<<0); //ep3 enable, clear nak, bulk, usb active, next ep3, max pkt 64
}
}
//#pragma optimize ("",off)
//////////
// Function Name : OTGDEV_InitPhyCon
// Function Desctiption : This function initializes OTG Phy.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_InitPhyCon(void)
{
Outp32(PHYPWR, 0x0);
Outp32(PHYCTRL, 0x20);
Outp32(RSTCON, 0x1);
delayLoop(100);
Outp32(RSTCON, 0x0);
delayLoop(100);
}
//#pragma optimize ("",on)
//////////
// Function Name : OTGDEV_SoftResetCore
// Function Desctiption : This function soft-resets OTG Core and then unresets again.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SoftResetCore(void)
{
volatile UINT32 uTemp;
Outp32(GRSTCTL, CORE_SOFT_RESET);
do
{
Inp32(GRSTCTL, uTemp);
}while(!(uTemp & AHB_MASTER_IDLE));
}
//////////
// Function Name : OTGDEV_WaitCableInsertion
// Function Desctiption : This function checks if the cable is inserted.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_WaitCableInsertion(void)
{
volatile UINT32 uTemp;
bool ucFirst=1;
do
{
//uTemp = Inp32(GOTGCTL);
Inp32(GOTGCTL, uTemp);
if (uTemp & (B_SESSION_VALID|A_SESSION_VALID))
{
EdbgOutputDebugString("\nA OTG cable inserted !\n");
break;
}
else if(ucFirst == 1)
{
EdbgOutputDebugString("\nInsert a OTG cable into the connector!\n");
ucFirst = 0;
}
}while(1);
}
//////////
// Function Name : OTGDEV_InitCore
// Function Desctiption : This function initializes OTG Link Core.
// Input : NONE
// Output : NONE
// Version :
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