startup.s

6410BSP3

;------------------------------------------------------------------------------
;
;  Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
;  Use of this source code is subject to the terms of the Microsoft end-user
;  license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
;  If you did not accept the terms of the EULA, you are not authorized to use
;  this source code. For a copy of the EULA, please see the LICENSE.RTF on your
;  install media.
;
;------------------------------------------------------------------------------
;
;   File:  startup.s
;
;   Hardware startup routine for Samsung SMDK6410 board.
;
;------------------------------------------------------------------------------

    INCLUDE     kxarm.h
    INCLUDE     s3c6410.inc
    INCLUDE     image_cfg.inc
        [ SMDK6410_X5D
    INCLUDE     MemParam_X52.inc
        |
    INCLUDE     MemParam_mDDR.inc
        ]

    IMPORT      main                    ; C entrypoint for Steppingstone loader.

    MACRO

        LED_ON     $data

        ldr          r10, =GPNPUD
        ldr          r11, [r10]
        bic          r11, r11, #0xFF000000     ; Pull-Up-Down Disable
        str          r11, [r10]

        ldr          r10, =GPNDAT
        ldr          r11, [r10]
        bic          r11, r11, #0xF000
        ldr          r12, =$data
        mov          r12, r12, lsl #12     ; [15:12]
        orr          r11, r11, r12
        str          r11, [r10]

        ldr          r10, =GPNCON
        ldr          r11, [r10]
        bic          r11, r11, #0xFF000000
        orr          r11, r11, #0x55000000     ; GPN[15:12] Output .
        str          r11, [r10]

    MEND

    STARTUPTEXT

;------------------------------------------------------------------------------
;
;    StartUp Entry
;
;    Main entry point for CPU initialization.
;
;------------------------------------------------------------------------------

    LEAF_ENTRY    StartUp

        b        ResetHandler
        b        .                ; HandlerUndef    (0x00000004)
        b        .                ; HandlerSWI        (0x00000008)
        b        .                ; HandlerPabort    (0x0000000C)
        b        .                ; HandlerDabort    (0x00000010)
        b        .                ; HandlerReserved    (0x00000014)
        b        .                ; HandlerIRQ        (0x00000018)
        b        .                ; HandlerFIQ        (0x0000001C)

;------------------------------------------------------------------------------
;    End of StartUp
;------------------------------------------------------------------------------


;------------------------------------------------------------------------------
;
;    ResetHandler Function
;
;    Reset Exception Handler
;
;------------------------------------------------------------------------------

ResetHandler

;------------------------------------
;    Enable Instruction Cache
;------------------------------------

        mov        r0, #0
        mcr        p15, 0, r0, c7, c7, 0            ; Invalidate Entire I&D Cache

        mrc        p15, 0, r0, c1, c0, 0            ; Enable I Cache
        orr        r0, r0, #R1_I
        mcr        p15, 0, r0, c1, c0, 0

;------------------------------------
;    Peripheral Port Setup
;------------------------------------

        ldr        r0, =0x70000013        ; Base Addres : 0x70000000, Size : 256 MB (0x13)
        mcr        p15,0,r0,c15,c2,4

;------------------------------------
;    Disable WatchDog Timer
;------------------------------------

        ldr        r0, =WTCON
        ldr        r1, =0x0
        str        r1, [r0]

;------------------------------------
;    Interrupt Disable
;------------------------------------

        ldr        r0, =VIC0INTENCLEAR
        ldr        r1, =0xFFFFFFFF;
        str        r1, [r0]

        ldr        r0, =VIC1INTENCLEAR
        ldr        r1, =0xFFFFFFFF;
        str        r1, [r0]

;-----------------------------------------
;Set Clock Out Pad to clock out APLL CLK
; For Testing
;---------------------------------------
        ldr     r0, =0x7f0080a0
        ldr     r1, [r0]
        orr     r1, r1, #0x30000000
        str     r1, [r0]

        ldr     r0, =0x7f0080a8
        ldr     r1, [r0]
        bic     r1, r1, #0x03000000
        str     r1, [r0]

        ldr     r0, =0x7e00f02c
        mov     r1, #0x10000
        str     r1, [r0]

;----------------------------------------------------------
;   Set the mem1drvcon to raise drive strength  for steploader ecc error
;----------------------------------------------------------

        ldr        r0, =MEM1DRVCON
;        ldr        r1, =0xFFFFFFFF
        ldr        r1, =0x55555555
        str        r1, [r0]

;----------------------------------------------------------
;    Set Operation Mode to Sync Mode or Async Mode
;----------------------------------------------------------
        LED_ON 0x1

    [ (SYNCMODE)
        IF    :DEF: _IROMBOOT_
            ; Enter the OSC mode
            ldr     r0, =CLK_SRC
            ldr     r1, [r0]
    		bic     r1, r1, #0x7			; APLL/MPLL/EPLL : FIN
            str     r1, [r0]

            nop
            nop
            nop
            nop
            nop
        ENDIF
            bl        System_SetSyncMode
    |
            bl        System_SetAsyncMode
    ]

;------------------------------------
;    Prepare to Change PLL
;------------------------------------

        ldr        r0, =CLK_DIV0
        ldr        r1, [r0]
        bic        r1, r1, #0xff00
        bic        r1, r1, #0xff
        ldr        r2, = ((Startup_PCLK_DIV<<12)+(Startup_HCLKx2_DIV<<9)+(Startup_HCLK_DIV<<8)+(MPLL_DIV<<4)+(Startup_APLL_DIV<<0))
        orr        r1, r1, r2
        str        r1, [r0]


;------------------------------------
;    Change PLL Value
;------------------------------------

        ldr        r1, =0xffff            ;Lock Time : 0x4b1 (100us @Fin12MHz) for APLL/MPLL
        ldr        r2, =0xE13            ; Lock Time : 0xe13 (300us @Fin12MHz) for EPLL

        ldr        r0, =APLL_LOCK
        str        r1, [r0]                ; APLL Lock Time
        str        r1, [r0, #0x4]            ; MPLL Lock Time
        str        r2, [r0, #0x8]            ; EPLL Lock Time

;------------------------------------
;    Set System Clock Divider
;------------------------------------
    [{FALSE}
        ldr        r0, =CLK_DIV0
        ldr        r1, [r0]
        bic        r1, r1, #0x30000
        bic        r1, r1, #0xff00
        bic        r1, r1, #0xff

        ldr        r2, =((Startup_PCLK_DIV<<12)+(Startup_HCLKx2_DIV<<9)+(Startup_HCLK_DIV<<8)+(MPLL_DIV<<4)+(Startup_APLL_DIV<<0))

        orr        r1, r1, r2
        str        r1, [r0]
    ]
;-------------------------------------
;    Set PMS Values
;-------------------------------------
        ldr        r0, =APLL_CON
        ldr        r1, =((1<<31)+(Startup_APLL_MVAL<<16)+(Startup_APLL_PVAL<<8)+(Startup_APLL_SVAL))
        str        r1, [r0]

        ldr        r0, =MPLL_CON
        ldr        r1, =((1<<31)+(MPLL_MVAL<<16)+(MPLL_PVAL<<8)+(MPLL_SVAL))
        str        r1, [r0]

        ldr        r0, =EPLL_CON1
        ldr        r1, =EPLL_KVAL
        str        r1, [r0]

        ldr        r0, =EPLL_CON0
        ldr        r1, =((1<<31)+(EPLL_MVAL<<16)+(EPLL_PVAL<<8)+(EPLL_SVAL))
        str        r1, [r0]

;------------------------------------
;    Enable PLL Clock Out
;------------------------------------

        ldr        r0, =CLK_SRC
        ldr        r1, [r0]
        orr        r1, r1, #0x7            ; PLL  Clockout
        str        r1, [r0]                ; System will be waiting for PLL unlocked after this instruction

;------------------------------------
;    Expand Memory Port 1 to x32
;------------------------------------

        ldr        r0, =MEM_SYS_CFG
        ldr        r1, [r0]
        bic        r1, r1, #0x80            ; ADDR_EXPAND to "0"
        str        r1, [r0]

;------------------------------------
;    CKE_INIT Configuration
;------------------------------------

        ldr        r0, =0x7F008880        ; SPCONSLP
        ldr        r1, [r0]
        orr        r1, r1, #0x10            ; SPCONSLP[4] = 1
        str        r1, [r0]

;------------------------------------
;    Initialize Dynamic Memory Controller
;------------------------------------

        bl        InitDMC

;--------------------------------------------------
;    Initialize Stack
;    Stack size and location information is in "image_cfg.inc"
;--------------------------------------------------

        mrs        r0, cpsr

        bic        r0, r0, #Mode_MASK
        orr        r1, r0, #Mode_IRQ | NOINT
        msr        cpsr_cxsf, r1                ; IRQMode
        ldr        sp, =IRQStack_PA            ; IRQStack

        bic        r0, r0, #Mode_MASK | NOINT
        orr        r1, r0, #Mode_SVC
        msr        cpsr_cxsf, r1                ; SVCMode
        ldr        sp, =SVCStack_PA            ; SVCStack

        LED_ON 0x2
;------------------------------------
;    Power Management Routine
;    (WakeUp Processing)