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📄 mb90495.h

📁 LwIP adaptation for Fujitsu MB90f497 and CS8900A Ethernet driver
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    IO_BYTE WTC1 :1;
    IO_BYTE WTC2 :1;
    IO_BYTE WTR :1;
    IO_BYTE WTOF :1;
    IO_BYTE WTIE :1;
    IO_BYTE SCE :1;
    IO_BYTE WDCS :1;
  }bit;
 }WTCSTR;
typedef union{   /* Flash Control Register */
    IO_BYTE	byte;
    struct{
    IO_BYTE LPM0 :1;
    IO_BYTE  :1;
    IO_BYTE LPM1 :1;
    IO_BYTE  :1;
    IO_BYTE RDY :1;
    IO_BYTE WE :1;
    IO_BYTE RDYINT :1;
    IO_BYTE INTE :1;
  }bit;
 }FMCSSTR;
typedef union{   /* Reload Timer 0/1 */
    IO_WORD	word;
    struct{
    IO_WORD D0 :1;
    IO_WORD D1 :1;
    IO_WORD D2 :1;
    IO_WORD D3 :1;
    IO_WORD D4 :1;
    IO_WORD D5 :1;
    IO_WORD D6 :1;
    IO_WORD D7 :1;
    IO_WORD D8 :1;
    IO_WORD D9 :1;
    IO_WORD D10 :1;
    IO_WORD D11 :1;
    IO_WORD D12 :1;
    IO_WORD D13 :1;
    IO_WORD D14 :1;
    IO_WORD D15 :1;
  }bit;
 }TMR0STR;
typedef union{  
    IO_WORD	word;
    struct{
    IO_WORD D0 :1;
    IO_WORD D1 :1;
    IO_WORD D2 :1;
    IO_WORD D3 :1;
    IO_WORD D4 :1;
    IO_WORD D5 :1;
    IO_WORD D6 :1;
    IO_WORD D7 :1;
    IO_WORD D8 :1;
    IO_WORD D9 :1;
    IO_WORD D10 :1;
    IO_WORD D11 :1;
    IO_WORD D12 :1;
    IO_WORD D13 :1;
    IO_WORD D14 :1;
    IO_WORD D15 :1;
  }bit;
 }TMRLR0STR;
typedef union{  
    IO_WORD	word;
    struct{
    IO_WORD D0 :1;
    IO_WORD D1 :1;
    IO_WORD D2 :1;
    IO_WORD D3 :1;
    IO_WORD D4 :1;
    IO_WORD D5 :1;
    IO_WORD D6 :1;
    IO_WORD D7 :1;
    IO_WORD D8 :1;
    IO_WORD D9 :1;
    IO_WORD D10 :1;
    IO_WORD D11 :1;
    IO_WORD D12 :1;
    IO_WORD D13 :1;
    IO_WORD D14 :1;
    IO_WORD D15 :1;
  }bit;
 }TMR1STR;
typedef union{  
    IO_WORD	word;
    struct{
    IO_WORD D0 :1;
    IO_WORD D1 :1;
    IO_WORD D2 :1;
    IO_WORD D3 :1;
    IO_WORD D4 :1;
    IO_WORD D5 :1;
    IO_WORD D6 :1;
    IO_WORD D7 :1;
    IO_WORD D8 :1;
    IO_WORD D9 :1;
    IO_WORD D10 :1;
    IO_WORD D11 :1;
    IO_WORD D12 :1;
    IO_WORD D13 :1;
    IO_WORD D14 :1;
    IO_WORD D15 :1;
  }bit;
 }TMRLR1STR;

/* C-DECLARATIONS */

__IO_EXTERN __io PDR0STR _pdr0;   /*  PORT DATA Registers */
#define PDR0 _pdr0.byte
#define PDR0_P00 _pdr0.bit.P00
#define PDR0_P01 _pdr0.bit.P01
#define PDR0_P02 _pdr0.bit.P02
#define PDR0_P03 _pdr0.bit.P03
#define PDR0_P04 _pdr0.bit.P04
#define PDR0_P05 _pdr0.bit.P05
#define PDR0_P06 _pdr0.bit.P06
#define PDR0_P07 _pdr0.bit.P07
__IO_EXTERN __io PDR1STR _pdr1;  
#define PDR1 _pdr1.byte
#define PDR1_P10 _pdr1.bit.P10
#define PDR1_P11 _pdr1.bit.P11
#define PDR1_P12 _pdr1.bit.P12
#define PDR1_P13 _pdr1.bit.P13
#define PDR1_P14 _pdr1.bit.P14
#define PDR1_P15 _pdr1.bit.P15
#define PDR1_P16 _pdr1.bit.P16
#define PDR1_P17 _pdr1.bit.P17
__IO_EXTERN __io PDR2STR _pdr2;  
#define PDR2 _pdr2.byte
#define PDR2_P20 _pdr2.bit.P20
#define PDR2_P21 _pdr2.bit.P21
#define PDR2_P22 _pdr2.bit.P22
#define PDR2_P23 _pdr2.bit.P23
#define PDR2_P24 _pdr2.bit.P24
#define PDR2_P25 _pdr2.bit.P25
#define PDR2_P26 _pdr2.bit.P26
#define PDR2_P27 _pdr2.bit.P27
__IO_EXTERN __io PDR3STR _pdr3;  
#define PDR3 _pdr3.byte
#define PDR3_P30 _pdr3.bit.P30
#define PDR3_P31 _pdr3.bit.P31
#define PDR3_P32 _pdr3.bit.P32
#define PDR3_P33 _pdr3.bit.P33
#define PDR3_P34 _pdr3.bit.P34
#define PDR3_P35 _pdr3.bit.P35
#define PDR3_P36 _pdr3.bit.P36
#define PDR3_P37 _pdr3.bit.P37
__IO_EXTERN __io PDR4STR _pdr4;  
#define PDR4 _pdr4.byte
#define PDR4_P40 _pdr4.bit.P40
#define PDR4_P41 _pdr4.bit.P41
#define PDR4_P42 _pdr4.bit.P42
#define PDR4_P43 _pdr4.bit.P43
#define PDR4_P44 _pdr4.bit.P44
__IO_EXTERN __io PDR5STR _pdr5;  
#define PDR5 _pdr5.byte
#define PDR5_P50 _pdr5.bit.P50
#define PDR5_P51 _pdr5.bit.P51
#define PDR5_P52 _pdr5.bit.P52
#define PDR5_P53 _pdr5.bit.P53
#define PDR5_P54 _pdr5.bit.P54
#define PDR5_P55 _pdr5.bit.P55
#define PDR5_P56 _pdr5.bit.P56
#define PDR5_P57 _pdr5.bit.P57
__IO_EXTERN __io PDR6STR _pdr6;  
#define PDR6 _pdr6.byte
#define PDR6_P60 _pdr6.bit.P60
#define PDR6_P61 _pdr6.bit.P61
#define PDR6_P62 _pdr6.bit.P62
#define PDR6_P63 _pdr6.bit.P63
__IO_EXTERN __io DDR0STR _ddr0;   /* PORT DIR */
#define DDR0 _ddr0.byte
#define DDR0_D00 _ddr0.bit.D00
#define DDR0_D01 _ddr0.bit.D01
#define DDR0_D02 _ddr0.bit.D02
#define DDR0_D03 _ddr0.bit.D03
#define DDR0_D04 _ddr0.bit.D04
#define DDR0_D05 _ddr0.bit.D05
#define DDR0_D06 _ddr0.bit.D06
#define DDR0_D07 _ddr0.bit.D07
__IO_EXTERN __io DDR1STR _ddr1;  
#define DDR1 _ddr1.byte
#define DDR1_D10 _ddr1.bit.D10
#define DDR1_D11 _ddr1.bit.D11
#define DDR1_D12 _ddr1.bit.D12
#define DDR1_D13 _ddr1.bit.D13
#define DDR1_D14 _ddr1.bit.D14
#define DDR1_D15 _ddr1.bit.D15
#define DDR1_D16 _ddr1.bit.D16
#define DDR1_D17 _ddr1.bit.D17
__IO_EXTERN __io DDR2STR _ddr2;  
#define DDR2 _ddr2.byte
#define DDR2_D20 _ddr2.bit.D20
#define DDR2_D21 _ddr2.bit.D21
#define DDR2_D22 _ddr2.bit.D22
#define DDR2_D23 _ddr2.bit.D23
#define DDR2_D24 _ddr2.bit.D24
#define DDR2_D25 _ddr2.bit.D25
#define DDR2_D26 _ddr2.bit.D26
#define DDR2_D27 _ddr2.bit.D27
__IO_EXTERN __io DDR3STR _ddr3;  
#define DDR3 _ddr3.byte
#define DDR3_D30 _ddr3.bit.D30
#define DDR3_D31 _ddr3.bit.D31
#define DDR3_D32 _ddr3.bit.D32
#define DDR3_D33 _ddr3.bit.D33
#define DDR3_D34 _ddr3.bit.D34
#define DDR3_D35 _ddr3.bit.D35
#define DDR3_D36 _ddr3.bit.D36
#define DDR3_D37 _ddr3.bit.D37
__IO_EXTERN __io DDR4STR _ddr4;  
#define DDR4 _ddr4.byte
#define DDR4_D40 _ddr4.bit.D40
#define DDR4_D41 _ddr4.bit.D41
#define DDR4_D42 _ddr4.bit.D42
#define DDR4_D43 _ddr4.bit.D43
#define DDR4_D44 _ddr4.bit.D44
__IO_EXTERN __io DDR5STR _ddr5;  
#define DDR5 _ddr5.byte
#define DDR5_D50 _ddr5.bit.D50
#define DDR5_D51 _ddr5.bit.D51
#define DDR5_D52 _ddr5.bit.D52
#define DDR5_D53 _ddr5.bit.D53
#define DDR5_D54 _ddr5.bit.D54
#define DDR5_D55 _ddr5.bit.D55
#define DDR5_D56 _ddr5.bit.D56
#define DDR5_D57 _ddr5.bit.D57
__IO_EXTERN __io DDR6STR _ddr6;  
#define DDR6 _ddr6.byte
#define DDR6_D60 _ddr6.bit.D60
#define DDR6_D61 _ddr6.bit.D61
#define DDR6_D62 _ddr6.bit.D62
#define DDR6_D63 _ddr6.bit.D63
__IO_EXTERN __io ADERSTR _ader;   /* AnalogInputEnable Port 5 */
#define ADER _ader.byte
#define ADER_ADE0 _ader.bit.ADE0
#define ADER_ADE1 _ader.bit.ADE1
#define ADER_ADE2 _ader.bit.ADE2
#define ADER_ADE3 _ader.bit.ADE3
#define ADER_ADE4 _ader.bit.ADE4
#define ADER_ADE5 _ader.bit.ADE5
#define ADER_ADE6 _ader.bit.ADE6
#define ADER_ADE7 _ader.bit.ADE7
__IO_EXTERN __io SMR0STR _smr0;   /* UART0 */
#define SMR0 _smr0.byte
#define SMR0_SOE _smr0.bit.SOE
#define SMR0_SCKE _smr0.bit.SCKE
#define SMR0_CS0 _smr0.bit.CS0
#define SMR0_CS1 _smr0.bit.CS1
#define SMR0_CS2 _smr0.bit.CS2
#define SMR0_MD0 _smr0.bit.MD0
#define SMR0_MD1 _smr0.bit.MD1
#define SMR0_CS _smr0.bitc.CS
#define SMR0_MD _smr0.bitc.MD
__IO_EXTERN __io SCR0STR _scr0;  
#define SCR0 _scr0.byte
#define SCR0_TXE _scr0.bit.TXE
#define SCR0_RXE _scr0.bit.RXE
#define SCR0_REC _scr0.bit.REC
#define SCR0_AD _scr0.bit.AD
#define SCR0_CL _scr0.bit.CL
#define SCR0_SBL _scr0.bit.SBL
#define SCR0_P _scr0.bit.P
#define SCR0_PEN _scr0.bit.PEN
__IO_EXTERN __io SIDR0STR _sidr0;  
#define SIDR0 _sidr0.byte
#define SIDR0_D0 _sidr0.bit.D0
#define SIDR0_D1 _sidr0.bit.D1
#define SIDR0_D2 _sidr0.bit.D2
#define SIDR0_D3 _sidr0.bit.D3
#define SIDR0_D4 _sidr0.bit.D4
#define SIDR0_D5 _sidr0.bit.D5
#define SIDR0_D6 _sidr0.bit.D6
#define SIDR0_D7 _sidr0.bit.D7
__IO_EXTERN __io SODR0STR _sodr0;  
#define SODR0 _sodr0.byte
#define SODR0_D0 _sodr0.bit.D0
#define SODR0_D1 _sodr0.bit.D1
#define SODR0_D2 _sodr0.bit.D2
#define SODR0_D3 _sodr0.bit.D3
#define SODR0_D4 _sodr0.bit.D4
#define SODR0_D5 _sodr0.bit.D5
#define SODR0_D6 _sodr0.bit.D6
#define SODR0_D7 _sodr0.bit.D7
__IO_EXTERN __io SSR0STR _ssr0;  
#define SSR0 _ssr0.byte
#define SSR0_TIE _ssr0.bit.TIE
#define SSR0_RIE _ssr0.bit.RIE
#define SSR0_TDRE _ssr0.bit.TDRE
#define SSR0_RDRF _ssr0.bit.RDRF
#define SSR0_FRE _ssr0.bit.FRE
#define SSR0_ORE _ssr0.bit.ORE
#define SSR0_PE _ssr0.bit.PE
__IO_EXTERN __io CDCR0STR _cdcr0;  
#define CDCR0 _cdcr0.byte
#define CDCR0_DIV0 _cdcr0.bit.DIV0
#define CDCR0_DIV1 _cdcr0.bit.DIV1
#define CDCR0_DIV2 _cdcr0.bit.DIV2
#define CDCR0_DIV3 _cdcr0.bit.DIV3
#define CDCR0_MD _cdcr0.bit.MD
#define CDCR0_DIV _cdcr0.bitc.DIV
__IO_EXTERN __io SES0STR _ses0;  
#define SES0 _ses0.byte
#define SES0_NEG _ses0.bit.NEG
__IO_EXTERN __io SMR1STR _smr1;   /* UART1 */
#define SMR1 _smr1.byte
#define SMR1_SOE _smr1.bit.SOE
#define SMR1_SCKE _smr1.bit.SCKE
#define SMR1_CS0 _smr1.bit.CS0
#define SMR1_CS1 _smr1.bit.CS1
#define SMR1_CS2 _smr1.bit.CS2
#define SMR1_MD0 _smr1.bit.MD0
#define SMR1_MD1 _smr1.bit.MD1
#define SMR1_CS _smr1.bitc.CS
#define SMR1_MD _smr1.bitc.MD
__IO_EXTERN __io SCR1STR _scr1;  
#define SCR1 _scr1.byte
#define SCR1_TXE _scr1.bit.TXE
#define SCR1_RXE _scr1.bit.RXE
#define SCR1_REC _scr1.bit.REC
#define SCR1_AD _scr1.bit.AD
#define SCR1_CL _scr1.bit.CL
#define SCR1_SBL _scr1.bit.SBL
#define SCR1_P _scr1.bit.P
#define SCR1_PEN _scr1.bit.PEN
__IO_EXTERN __io SIDR1STR _sidr1;  
#define SIDR1 _sidr1.byte
#define SIDR1_D0 _sidr1.bit.D0
#define SIDR1_D1 _sidr1.bit.D1
#define SIDR1_D2 _sidr1.bit.D2
#define SIDR1_D3 _sidr1.bit.D3
#define SIDR1_D4 _sidr1.bit.D4
#define SIDR1_D5 _sidr1.bit.D5
#define SIDR1_D6 _sidr1.bit.D6
#define SIDR1_D7 _sidr1.bit.D7
__IO_EXTERN __io SODR1STR _sodr1;  
#define SODR1 _sodr1.byte
#define SODR1_D0 _sodr1.bit.D0
#define SODR1_D1 _sodr1.bit.D1
#define SODR1_D2 _sodr1.bit.D2
#define SODR1_D3 _sodr1.bit.D3
#define SODR1_D4 _sodr1.bit.D4
#define SODR1_D5 _sodr1.bit.D5
#define SODR1_D6 _sodr1.bit.D6
#define SODR1_D7 _sodr1.bit.D7
__IO_EXTERN __io SSR1STR _ssr1;  
#define SSR1 _ssr1.byte
#define SSR1_TIE _ssr1.bit.TIE
#define SSR1_RIE _ssr1.bit.RIE
#define SSR1_TDRE _ssr1.bit.TDRE
#define SSR1_RDRF _ssr1.bit.RDRF
#define SSR1_FRE _ssr1.bit.FRE
#define SSR1_ORE _ssr1.bit.ORE
#define SSR1_PE _ssr1.bit.PE
__IO_EXTERN __io CDCR1STR _cdcr1;  
#define CDCR1 _cdcr1.byte
#define CDCR1_DIV0 _cdcr1.bit.DIV0
#define CDCR1_DIV1 _cdcr1.bit.DIV1
#define CDCR1_DIV2 _cdcr1.bit.DIV2
#define CDCR1_DIV3 _cdcr1.bit.DIV3
#define CDCR1_MD _cdcr1.bit.MD
#define CDCR1_DIV _cdcr1.bitc.DIV
__IO_EXTERN __io ENIRSTR _enir;   /* DTP, External Interrupts */
#define ENIR _enir.byte
#define ENIR_EN0 _enir.bit.EN0
#define ENIR_EN1 _enir.bit.EN1
#define ENIR_EN2 _enir.bit.EN2
#define ENIR_EN3 _enir.bit.EN3
#define ENIR_EN4 _enir.bit.EN4
#define ENIR_EN5 _enir.bit.EN5
#define ENIR_EN6 _enir.bit.EN6
#define ENIR_EN7 _enir.bit.EN7
__IO_EXTERN __io EIRRSTR _eirr;  
#define EIRR _eirr.byte
#define EIRR_ER0 _eirr.bit.ER0
#define EIRR_ER1 _eirr.bit.ER1
#define EIRR_ER2 _eirr.bit.ER2
#define EIRR_ER3 _eirr.bit.ER3
#define EIRR_ER4 _eirr.bit.ER4
#define EIRR_ER5 _eirr.bit.ER5
#define EIRR_ER6 _eirr.bit.ER6
#define EIRR_ER7 _eirr.bit.ER7
__IO_EXTERN __io ELVRSTR _elvr;  
#define ELVR _elvr.word
#define ELVR_LA0 _elvr.bit.LA0
#define ELVR_LB0 _elvr.bit.LB0
#define ELVR_LA1 _elvr.bit.LA1
#define ELVR_LB1 _elvr.bit.LB1
#define ELVR_LA2 _elvr.bit.LA2
#define ELVR_LB2 _elvr.bit.LB2
#define ELVR_LA3 _elvr.bit.LA3
#define ELVR_LB3 _elvr.bit.LB3
#define ELVR_LA4 _elvr.bit.LA4
#define ELVR_LB4 _elvr.bit.LB4
#define ELVR_LA5 _elvr.bit.LA5
#define ELVR_LB5 _elvr.bit.LB5
#define ELVR_LA6 _elvr.bit.LA6
#define ELVR_LB6 _elvr.bit.LB6
#define ELVR_LA7 _elvr.bit.LA7
#define ELVR_LB7 _elvr.bit.LB7
__IO_EXTERN __io ADCS0STR _adcs0;   /* AD Converter */
#define ADCS0 _adcs0.byte
#define ADCS0_ANE0 _adcs0.bit.ANE0
#define ADCS0_ANE1 _adcs0.bit.ANE1
#define ADCS0_ANE2 _adcs0.bit.ANE2
#define ADCS0_ANS0 _adcs0.bit.ANS0
#define ADCS0_ANS1 _adcs0.bit.ANS1
#define ADCS0_ANS2 _adcs0.bit.ANS2
#define ADCS0_MD0 _adcs0.bit.MD0
#define ADCS0_MD1 _adcs0.bit.MD1
#define ADCS0_ANE _adcs0.bitc.ANE
#define ADCS0_ANS _adcs0.bitc.ANS
#define ADCS0_MD _adcs0.bitc.MD
__IO_EXTERN __io ADCS1STR _adcs1;  
#define ADCS1 _adcs1.byte
#define ADCS1_STRT _adcs1.bit.STRT
#define ADCS1_STS0 _adcs1.bit.STS0
#define ADCS1_STS1 _adcs1.bit.STS1
#define ADCS1_PAUS _adcs1.bit.PAUS
#define ADCS1_INTE _adcs1.bit.INTE
#define ADCS1_INT _adcs1.bit.INT
#define ADCS1_BUSY _adcs1.bit.BUSY
#define ADCS1_STS _adcs1.bitc.STS
__IO_EXTERN __io ADCR0STR _adcr0;  
#define ADCR0 _adcr0.byte
#define ADCR0_D0 _adcr0.bit.D0
#define ADCR0_D1 _adcr0.bit.D1
#define ADCR0_D2 _adcr0.bit.D2
#define ADCR0_D3 _adcr0.bit.D3
#define ADCR0_D4 _adcr0.bit.D4
#define ADCR0_D5 _adcr0.bit.D5
#define ADCR0_D6 _adcr0.bit.D6
#define ADCR0_D7 _adcr0.bit.D7
__IO_EXTERN __io ADCR1STR _adcr1;  
#define ADCR1 _adcr1.byte
#define ADCR1_D8 _adcr1.bit.D8
#define ADCR1_D9 _adcr1.bit.D9
#define ADCR1_CT0 _adcr1.bit.CT0
#define ADCR1_CT1 _adcr1.bit.CT1
#define ADCR1_ST0 _adcr1.bit.ST0
#define ADCR1_ST1 _adcr1.bit.ST1
#define ADCR1_S10 _adcr1.bit.S10
#define ADCR1_CT _adcr1.bitc.CT
#define ADCR1_ST _adcr1.bitc.ST
__IO_EXTERN __io PPGC0STR _ppgc0;   /* Puls Pattern Generator Channel 0,1 */
#define PPGC0 _ppgc0.byte
#define PPGC0_PUF0 _ppgc0.bit.PUF0
#define PPGC0_PIE0 _ppgc0.bit.PIE0
#define PPGC0_PE00 _ppgc0.bit.PE00
#define PPGC0_PEN0 _ppgc0.bit.PEN0
__IO_EXTERN __io PPGC1STR _ppgc1;  
#define PPGC1 _ppgc1.byte
#define PPGC1_MD0 _ppgc1.bit.MD0
#define PPGC1_MD1 _ppgc1.bit.MD1
#define PPGC1_PUF1 _ppgc1.bit.PUF1
#define PPGC1_PIE1 _ppgc1.bit.PIE1
#define PPGC1_PE10 _ppgc1.bit.PE10
#define PPGC1_PEN1 _ppgc1.bit.PEN1
#define PPGC1_MD _ppgc1.bitc.MD
__IO_EXTERN __io PPG01STR _ppg01;  
#define PPG01 _ppg01.byte
#define PPG01_PCM0 _ppg01.bit.PCM0
#define PPG01_PCM1 _ppg01.bit.PCM1
#define PPG01_PCM2 _ppg01.bit.PCM2
#define PPG01_PCS0 _ppg01.bit.PCS0
#define PPG01_PCS1 _ppg01.bit.PCS1
#define PPG01_PCS2 _ppg01.bit.PCS2
#define PPG01_PCM _ppg01.bitc.PCM
#define PPG01_PCS _ppg01.bitc.PCS
__IO_EXTERN __io PPGC2STR _ppgc2;  
#define PPGC2 _ppgc2.byte
#define PPGC2_PUF0 _ppgc2.bit.PUF0
#define PPGC2_PIE0 _ppgc2.bit.PIE0
#define PPGC2_PE00 _ppgc2.bit.PE00
#define PPGC2_PEN0 _ppgc2.bit.PEN0
__IO_EXTERN __io PPGC3STR _ppgc3;  
#define PPGC3 _ppgc3.byte
#define PPGC3_MD0 _ppgc3.bit.MD0
#define PPGC3_MD1 _ppgc3.bit.MD1
#define PPGC3_PUF1 _ppgc3.bit.PUF1
#define PPGC3_PIE1 _ppgc3.bit.PIE1
#define PPGC3_PE10 _ppgc3.bit.PE10
#define PPGC3_PEN1 _ppgc3.bit.PEN1
#define PPGC3_MD _ppgc3.bitc.MD
__IO_EXTERN __io PPG23STR _ppg23;  
#define PPG23 _ppg23.byte
#define PPG23_PCM0 _ppg23.bit.PCM0
#define PPG23_PCM1 _ppg23.bit.PCM1
#define PPG23_PCM2 _ppg23.bit.PCM2
#define PPG23_PCS0 _ppg23.bit.PCS0
#define PPG23_PCS1 _ppg23.bit.PCS1
#define PPG23_PCS2 _ppg23.bit.PCS2
#define PPG23_PCM _ppg23.bitc.PCM
#define PPG23_PCS _ppg23.bitc.PCS
__IO_EXTERN __io IPCP0STR _ipcp0;   /* ICU unit 0/1 */
#define IPCP0 _ipcp0.word
#define IPCP0_CP00 _ipcp0.bit.CP00
#define IPCP0_CP01 _ipcp0.bit.CP01
#define IPCP0_CP02 _ipcp0.bit.CP02
#define IPCP0_CP03 _ipcp0.bit.CP03
#define IPCP0_CP04 _ipcp0.bit.CP04
#define IPCP0_CP05 _ipcp0.bit.CP05
#define IPCP0_CP06 _ipcp0.bit.CP06
#define IPCP0_CP07 _ipcp0.bit.CP07
#define IPCP0_CP08 _ipcp0.bit.CP08
#define IPCP0_CP09 _ipcp0.bit.CP09
#define IPCP0_CP10 _ipcp0.bit.CP10
#define IPCP0_CP11 _ipcp0.bit.CP11
#define IPCP0_CP12 _ipcp0.bit.CP12
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