at91m55800a_apmc.html

AT91M5800a例子

<tr><td align="CENTER">5</td><td align="CENTER"><a name="APMC_PRES_DIV32"></a><b>APMC_PRES_DIV32</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_PRES_DIV32">AT91C_APMC_PRES_DIV32</a></font></td><td><br>Selected clock is divided by 32</td></tr>
<tr><td align="CENTER">6</td><td align="CENTER"><a name="APMC_PRES_DIV64"></a><b>APMC_PRES_DIV64</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_PRES_DIV64">AT91C_APMC_PRES_DIV64</a></font></td><td><br>Selected clock is divided by 64</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">13..8</td><td align="CENTER"><a name="APMC_MUL"></a><b>APMC_MUL</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_MUL">AT91C_APMC_MUL</a></font></td><td><b>Phase Lock Loop Factor</b><br>0 = The PLL is deactivated. 1-63 = The PLL output is at a higher frequency (MUL+1) than the input if the bit lock is set in APMC_SR </td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15..14</td><td align="CENTER"><a name="APMC_CSS"></a><b>APMC_CSS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_CSS">AT91C_APMC_CSS</a></font></td><td><b>Clock Source Selection</b><br>0 = The PLL is deactivated. 1-63 = The PLL is at a higher frequency (MUL+1) than the input if the bit lock is set in APMC_SR<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="APMC_CSS_LF"></a><b>APMC_CSS_LF</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_CSS_LF">AT91C_APMC_CSS_LF</a></font></td><td><br>Low-frequency clock provided by the RTC</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="APMC_CSS_MOSC"></a><b>APMC_CSS_MOSC</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_CSS_MOSC">AT91C_APMC_CSS_MOSC</a></font></td><td><br>Main Oscillator Output or external clock</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="APMC_CSS_PLL"></a><b>APMC_CSS_PLL</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_CSS_PLL">AT91C_APMC_CSS_PLL</a></font></td><td><br>Phase Locked Loop Output</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">21..16</td><td align="CENTER"><a name="APMC_OSCOUNT"></a><b>APMC_OSCOUNT</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_OSCOUNT">AT91C_APMC_OSCOUNT</a></font></td><td><b>Main Oscillator Counter</b><br>Specifies the number of 32,768 Hz divided by 8 clock cycles for the main oscillator start-up timer to count before the main oscillator is stabilized</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">24</td><td align="CENTER"><a name="APMC_PLLCOUNT"></a><b>APMC_PLLCOUNT</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_PLLCOUNT">AT91C_APMC_PLLCOUNT</a></font></td><td><b>PLL Lock Counter</b><br>Specifies the number of 32,768 Hz clock cycles for the PLL lock timer to count before the PLL is locked, after the PLL is started.</td></tr>
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<a name="APMC_PCR"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_PCR  <i>Power Control Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_PCR">AT91C_APMC_PCR</a></i> 0xFFFF4028</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="APMC_SHDALC"></a><b>APMC_SHDALC</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_SHDALC">AT91C_APMC_SHDALC</a></font></td><td><b>Shut-down or Alarm Command</b><br>0 = No effects. 1 = Configures the SHDN pin as defined by the field SHDALS in APMC_PMR</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="APMC_WKACKC"></a><b>APMC_WKACKC</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKACKC">AT91C_APMC_WKACKC</a></font></td><td><b>Wake-up or Alarm Acknoledge Command</b><br>0 = No effects. 1 = Configures the SHDN pin as defined by the field WKACKS in APMC_PMR</td></tr>
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<a name="APMC_PMR"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_PMR  <i>Power Mode Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_PMR">AT91C_APMC_PMR</a></i> 0xFFFF402C</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">1..0</td><td align="CENTER"><a name="APMC_SHDALS"></a><b>APMC_SHDALS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_SHDALS">AT91C_APMC_SHDALS</a></font></td><td><b>Shut-down or Alarm Command</b><br>0 = No effects. 1 = Configures the SHDN pin as defined by the field SHDALS in APMC_PMR<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="APMC_SHDALS_OUT_TRIS"></a><b>APMC_SHDALS_OUT_TRIS</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_SHDALS_OUT_TRIS">AT91C_APMC_SHDALS_OUT_TRIS</a></font></td><td><br>Tri-stated</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="APMC_SHDALS_OUT_LEVEL0"></a><b>APMC_SHDALS_OUT_LEVEL0</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_SHDALS_OUT_LEVEL0">AT91C_APMC_SHDALS_OUT_LEVEL0</a></font></td><td><br>Level 0</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="APMC_SHDALS_OUT_LEVEL1"></a><b>APMC_SHDALS_OUT_LEVEL1</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_SHDALS_OUT_LEVEL1">AT91C_APMC_SHDALS_OUT_LEVEL1</a></font></td><td><br>Level 1</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="APMC_WKACKS"></a><b>APMC_WKACKS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKACKS">AT91C_APMC_WKACKS</a></font></td><td><b>Wake-up or Alarm Acknoledge Command</b><br>0 = No effects. 1 = Configures the SHDN pin as defined by the field WKACKS in APMC_PMR<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="APMC_WKACKS_OUT_TRIS"></a><b>APMC_WKACKS_OUT_TRIS</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKACKS_OUT_TRIS">AT91C_APMC_WKACKS_OUT_TRIS</a></font></td><td><br>Tri-stated</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="APMC_WKACKS_OUT_LEVEL0"></a><b>APMC_WKACKS_OUT_LEVEL0</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKACKS_OUT_LEVEL0">AT91C_APMC_WKACKS_OUT_LEVEL0</a></font></td><td><br>Level 0</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="APMC_WKACKS_OUT_LEVEL1"></a><b>APMC_WKACKS_OUT_LEVEL1</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKACKS_OUT_LEVEL1">AT91C_APMC_WKACKS_OUT_LEVEL1</a></font></td><td><br>Level 1</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="APMC_ALWKEN"></a><b>APMC_ALWKEN</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_ALWKEN">AT91C_APMC_ALWKEN</a></font></td><td><b>Alarm Wake-up Enable</b><br>0 = The alarm from the RTC has no wake-up effect. 1 = The alarm from the RTC commands a wake-up.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7..6</td><td align="CENTER"><a name="APMC_WKEDG"></a><b>APMC_WKEDG</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKEDG">AT91C_APMC_WKEDG</a></font></td><td><b>Wake-up Input Edge Selection</b><br>This field defines the edge to detect on wake-up<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="APMC_WKEDG_NONE"></a><b>APMC_WKEDG_NONE</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKEDG_NONE">AT91C_APMC_WKEDG_NONE</a></font></td><td><br>None. No edge is detected on wake-up</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="APMC_WKEDG_POS_EDG"></a><b>APMC_WKEDG_POS_EDG</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKEDG_POS_EDG">AT91C_APMC_WKEDG_POS_EDG</a></font></td><td><br>Positive edge</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="APMC_WKEDG_NEG_EDG"></a><b>APMC_WKEDG_NEG_EDG</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKEDG_NEG_EDG">AT91C_APMC_WKEDG_NEG_EDG</a></font></td><td><br>Negative edge</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="APMC_WKEDG_BOTH_EDG"></a><b>APMC_WKEDG_BOTH_EDG</b><font size="-1"><br><a href="AT91M55800A_h.html#AT91C_APMC_WKEDG_BOTH_EDG">AT91C_APMC_WKEDG_BOTH_EDG</a></font></td><td><br>Both edges </td></tr>
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<a name="APMC_SR"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_SR  <i>Status Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_SR">AT91C_APMC_SR</a></i> 0xFFFF4030</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="APMC_MOSCS"></a><b>APMC_MOSCS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_MOSCS">AT91C_APMC_MOSCS</a></font></td><td><b>Main Oscillator Status</b><br>0 = Main Oscillator output signal is not stabilized. 1 = The Main Oscillator is enabled and its output is stabilized. This bit indicates that the Main Oscillator counter reached 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="APMC_LOCK"></a><b>APMC_LOCK</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_LOCK">AT91C_APMC_LOCK</a></font></td><td><b>PLL Lock Status</b><br>0 = PLL output signal or main oscillator output signal is not stabilized. 1 = Main Oscillator is enabled and its output is stabilized and the PLL output signal is stabilized.</td></tr>
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<a name="APMC_IER"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_IER  <i>Interrupt Enable Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_IER">AT91C_APMC_IER</a></i> 0xFFFF4034</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="APMC_MOSCS"></a><b>APMC_MOSCS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_MOSCS">AT91C_APMC_MOSCS</a></font></td><td><b>Main Oscillator Status</b><br>0 = Main Oscillator output signal is not stabilized. 1 = The Main Oscillator is enabled and its output is stabilized. This bit indicates that the Main Oscillator counter reached 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="APMC_LOCK"></a><b>APMC_LOCK</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_LOCK">AT91C_APMC_LOCK</a></font></td><td><b>PLL Lock Status</b><br>0 = PLL output signal or main oscillator output signal is not stabilized. 1 = Main Oscillator is enabled and its output is stabilized and the PLL output signal is stabilized.</td></tr>
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<a name="APMC_IDR"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_IDR  <i>Interrupt Disable Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_IDR">AT91C_APMC_IDR</a></i> 0xFFFF4038</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="APMC_MOSCS"></a><b>APMC_MOSCS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_MOSCS">AT91C_APMC_MOSCS</a></font></td><td><b>Main Oscillator Status</b><br>0 = Main Oscillator output signal is not stabilized. 1 = The Main Oscillator is enabled and its output is stabilized. This bit indicates that the Main Oscillator counter reached 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="APMC_LOCK"></a><b>APMC_LOCK</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_LOCK">AT91C_APMC_LOCK</a></font></td><td><b>PLL Lock Status</b><br>0 = PLL output signal or main oscillator output signal is not stabilized. 1 = Main Oscillator is enabled and its output is stabilized and the PLL output signal is stabilized.</td></tr>
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<a name="APMC_IMR"></a><h4><a href="#APMC">APMC</a>: <i><a href="AT91M55800A_h.html#AT91_REG">AT91_REG</a></i> APMC_IMR  <i>Interrupt Mask Register</i></h4><ul><null><font size="-2"><li><b>APMC</b> <i><a href="AT91M55800A_h.html#AT91C_APMC_IMR">AT91C_APMC_IMR</a></i> 0xFFFF403C</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="APMC_MOSCS"></a><b>APMC_MOSCS</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_MOSCS">AT91C_APMC_MOSCS</a></font></td><td><b>Main Oscillator Status</b><br>0 = Main Oscillator output signal is not stabilized. 1 = The Main Oscillator is enabled and its output is stabilized. This bit indicates that the Main Oscillator counter reached 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="APMC_LOCK"></a><b>APMC_LOCK</b><font size="-2"><br><a href="AT91M55800A_h.html#AT91C_APMC_LOCK">AT91C_APMC_LOCK</a></font></td><td><b>PLL Lock Status</b><br>0 = PLL output signal or main oscillator output signal is not stabilized. 1 = Main Oscillator is enabled and its output is stabilized and the PLL output signal is stabilized.</td></tr>
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