at91m55800a.rdf

AT91M5800a例子

AT91C_TC3_CMR.helpkey="Channel Mode Register"
AT91C_TC3_CMR.access=memorymapped
AT91C_TC3_CMR.width=32
AT91C_TC3_CMR.address=0xFFFD4004
AT91C_TC3_IDR.name="AT91C_TC3_IDR"
AT91C_TC3_IDR.description="Interrupt Disable Register"
AT91C_TC3_IDR.helpkey="Interrupt Disable Register"
AT91C_TC3_IDR.access=memorymapped
AT91C_TC3_IDR.width=32
AT91C_TC3_IDR.address=0xFFFD4028
AT91C_TC3_SR.name="AT91C_TC3_SR"
AT91C_TC3_SR.description="Status Register"
AT91C_TC3_SR.helpkey="Status Register"
AT91C_TC3_SR.access=memorymapped
AT91C_TC3_SR.width=32
AT91C_TC3_SR.address=0xFFFD4020
AT91C_TC3_RB.name="AT91C_TC3_RB"
AT91C_TC3_RB.description="Register B"
AT91C_TC3_RB.helpkey="Register B"
AT91C_TC3_RB.access=memorymapped
AT91C_TC3_RB.width=32
AT91C_TC3_RB.address=0xFFFD4018
AT91C_TC3_CV.name="AT91C_TC3_CV"
AT91C_TC3_CV.description="Counter Value"
AT91C_TC3_CV.helpkey="Counter Value"
AT91C_TC3_CV.access=memorymapped
AT91C_TC3_CV.width=32
AT91C_TC3_CV.address=0xFFFD4010
AT91C_TC3_CCR.name="AT91C_TC3_CCR"
AT91C_TC3_CCR.description="Channel Control Register"
AT91C_TC3_CCR.helpkey="Channel Control Register"
AT91C_TC3_CCR.access=memorymapped
AT91C_TC3_CCR.width=32
AT91C_TC3_CCR.address=0xFFFD4000
AT91C_TC3_IMR.name="AT91C_TC3_IMR"
AT91C_TC3_IMR.description="Interrupt Mask Register"
AT91C_TC3_IMR.helpkey="Interrupt Mask Register"
AT91C_TC3_IMR.access=memorymapped
AT91C_TC3_IMR.width=32
AT91C_TC3_IMR.address=0xFFFD402C
AT91C_TC3_IER.name="AT91C_TC3_IER"
AT91C_TC3_IER.description="Interrupt Enable Register"
AT91C_TC3_IER.helpkey="Interrupt Enable Register"
AT91C_TC3_IER.access=memorymapped
AT91C_TC3_IER.width=32
AT91C_TC3_IER.address=0xFFFD4024
AT91C_TC3_RC.name="AT91C_TC3_RC"
AT91C_TC3_RC.description="Register C"
AT91C_TC3_RC.helpkey="Register C"
AT91C_TC3_RC.access=memorymapped
AT91C_TC3_RC.width=32
AT91C_TC3_RC.address=0xFFFD401C
# ========== Register definition for TCB1 peripheral ========== 
AT91C_TCB1_BCR.name="AT91C_TCB1_BCR"
AT91C_TCB1_BCR.description="TC Block Control Register"
AT91C_TCB1_BCR.helpkey="TC Block Control Register"
AT91C_TCB1_BCR.access=memorymapped
AT91C_TCB1_BCR.width=32
AT91C_TCB1_BCR.address=0xFFFD40C0
AT91C_TCB1_BMR.name="AT91C_TCB1_BMR"
AT91C_TCB1_BMR.description="TC Block Mode Register"
AT91C_TCB1_BMR.helpkey="TC Block Mode Register"
AT91C_TCB1_BMR.access=memorymapped
AT91C_TCB1_BMR.width=32
AT91C_TCB1_BMR.address=0xFFFD40C4
# ========== Register definition for TC2 peripheral ========== 
AT91C_TC2_IDR.name="AT91C_TC2_IDR"
AT91C_TC2_IDR.description="Interrupt Disable Register"
AT91C_TC2_IDR.helpkey="Interrupt Disable Register"
AT91C_TC2_IDR.access=memorymapped
AT91C_TC2_IDR.width=32
AT91C_TC2_IDR.address=0xFFFD00A8
AT91C_TC2_SR.name="AT91C_TC2_SR"
AT91C_TC2_SR.description="Status Register"
AT91C_TC2_SR.helpkey="Status Register"
AT91C_TC2_SR.access=memorymapped
AT91C_TC2_SR.width=32
AT91C_TC2_SR.address=0xFFFD00A0
AT91C_TC2_RB.name="AT91C_TC2_RB"
AT91C_TC2_RB.description="Register B"
AT91C_TC2_RB.helpkey="Register B"
AT91C_TC2_RB.access=memorymapped
AT91C_TC2_RB.width=32
AT91C_TC2_RB.address=0xFFFD0098
AT91C_TC2_CV.name="AT91C_TC2_CV"
AT91C_TC2_CV.description="Counter Value"
AT91C_TC2_CV.helpkey="Counter Value"
AT91C_TC2_CV.access=memorymapped
AT91C_TC2_CV.width=32
AT91C_TC2_CV.address=0xFFFD0090
AT91C_TC2_CCR.name="AT91C_TC2_CCR"
AT91C_TC2_CCR.description="Channel Control Register"
AT91C_TC2_CCR.helpkey="Channel Control Register"
AT91C_TC2_CCR.access=memorymapped
AT91C_TC2_CCR.width=32
AT91C_TC2_CCR.address=0xFFFD0080
AT91C_TC2_IMR.name="AT91C_TC2_IMR"
AT91C_TC2_IMR.description="Interrupt Mask Register"
AT91C_TC2_IMR.helpkey="Interrupt Mask Register"
AT91C_TC2_IMR.access=memorymapped
AT91C_TC2_IMR.width=32
AT91C_TC2_IMR.address=0xFFFD00AC
AT91C_TC2_IER.name="AT91C_TC2_IER"
AT91C_TC2_IER.description="Interrupt Enable Register"
AT91C_TC2_IER.helpkey="Interrupt Enable Register"
AT91C_TC2_IER.access=memorymapped
AT91C_TC2_IER.width=32
AT91C_TC2_IER.address=0xFFFD00A4
AT91C_TC2_RC.name="AT91C_TC2_RC"
AT91C_TC2_RC.description="Register C"
AT91C_TC2_RC.helpkey="Register C"
AT91C_TC2_RC.access=memorymapped
AT91C_TC2_RC.width=32
AT91C_TC2_RC.address=0xFFFD009C
AT91C_TC2_RA.name="AT91C_TC2_RA"
AT91C_TC2_RA.description="Register A"
AT91C_TC2_RA.helpkey="Register A"
AT91C_TC2_RA.access=memorymapped
AT91C_TC2_RA.width=32
AT91C_TC2_RA.address=0xFFFD0094
AT91C_TC2_CMR.name="AT91C_TC2_CMR"
AT91C_TC2_CMR.description="Channel Mode Register"
AT91C_TC2_CMR.helpkey="Channel Mode Register"
AT91C_TC2_CMR.access=memorymapped
AT91C_TC2_CMR.width=32
AT91C_TC2_CMR.address=0xFFFD0084
# ========== Register definition for TC1 peripheral ========== 
AT91C_TC1_IMR.name="AT91C_TC1_IMR"
AT91C_TC1_IMR.description="Interrupt Mask Register"
AT91C_TC1_IMR.helpkey="Interrupt Mask Register"
AT91C_TC1_IMR.access=memorymapped
AT91C_TC1_IMR.width=32
AT91C_TC1_IMR.address=0xFFFD006C
AT91C_TC1_IER.name="AT91C_TC1_IER"
AT91C_TC1_IER.description="Interrupt Enable Register"
AT91C_TC1_IER.helpkey="Interrupt Enable Register"
AT91C_TC1_IER.access=memorymapped
AT91C_TC1_IER.width=32
AT91C_TC1_IER.address=0xFFFD0064
AT91C_TC1_RC.name="AT91C_TC1_RC"
AT91C_TC1_RC.description="Register C"
AT91C_TC1_RC.helpkey="Register C"
AT91C_TC1_RC.access=memorymapped
AT91C_TC1_RC.width=32
AT91C_TC1_RC.address=0xFFFD005C
AT91C_TC1_RA.name="AT91C_TC1_RA"
AT91C_TC1_RA.description="Register A"
AT91C_TC1_RA.helpkey="Register A"
AT91C_TC1_RA.access=memorymapped
AT91C_TC1_RA.width=32
AT91C_TC1_RA.address=0xFFFD0054
AT91C_TC1_CMR.name="AT91C_TC1_CMR"
AT91C_TC1_CMR.description="Channel Mode Register"
AT91C_TC1_CMR.helpkey="Channel Mode Register"
AT91C_TC1_CMR.access=memorymapped
AT91C_TC1_CMR.width=32
AT91C_TC1_CMR.address=0xFFFD0044
AT91C_TC1_IDR.name="AT91C_TC1_IDR"
AT91C_TC1_IDR.description="Interrupt Disable Register"
AT91C_TC1_IDR.helpkey="Interrupt Disable Register"
AT91C_TC1_IDR.access=memorymapped
AT91C_TC1_IDR.width=32
AT91C_TC1_IDR.address=0xFFFD0068
AT91C_TC1_SR.name="AT91C_TC1_SR"
AT91C_TC1_SR.description="Status Register"
AT91C_TC1_SR.helpkey="Status Register"
AT91C_TC1_SR.access=memorymapped
AT91C_TC1_SR.width=32
AT91C_TC1_SR.address=0xFFFD0060
AT91C_TC1_RB.name="AT91C_TC1_RB"
AT91C_TC1_RB.description="Register B"
AT91C_TC1_RB.helpkey="Register B"
AT91C_TC1_RB.access=memorymapped
AT91C_TC1_RB.width=32
AT91C_TC1_RB.address=0xFFFD0058
AT91C_TC1_CV.name="AT91C_TC1_CV"
AT91C_TC1_CV.description="Counter Value"
AT91C_TC1_CV.helpkey="Counter Value"
AT91C_TC1_CV.access=memorymapped
AT91C_TC1_CV.width=32
AT91C_TC1_CV.address=0xFFFD0050
AT91C_TC1_CCR.name="AT91C_TC1_CCR"
AT91C_TC1_CCR.description="Channel Control Register"
AT91C_TC1_CCR.helpkey="Channel Control Register"
AT91C_TC1_CCR.access=memorymapped
AT91C_TC1_CCR.width=32
AT91C_TC1_CCR.address=0xFFFD0040
# ========== Register definition for TC0 peripheral ========== 
AT91C_TC0_IMR.name="AT91C_TC0_IMR"
AT91C_TC0_IMR.description="Interrupt Mask Register"
AT91C_TC0_IMR.helpkey="Interrupt Mask Register"
AT91C_TC0_IMR.access=memorymapped
AT91C_TC0_IMR.width=32
AT91C_TC0_IMR.address=0xFFFD002C
AT91C_TC0_IER.name="AT91C_TC0_IER"
AT91C_TC0_IER.description="Interrupt Enable Register"
AT91C_TC0_IER.helpkey="Interrupt Enable Register"
AT91C_TC0_IER.access=memorymapped
AT91C_TC0_IER.width=32
AT91C_TC0_IER.address=0xFFFD0024
AT91C_TC0_RC.name="AT91C_TC0_RC"
AT91C_TC0_RC.description="Register C"
AT91C_TC0_RC.helpkey="Register C"
AT91C_TC0_RC.access=memorymapped
AT91C_TC0_RC.width=32
AT91C_TC0_RC.address=0xFFFD001C
AT91C_TC0_RA.name="AT91C_TC0_RA"
AT91C_TC0_RA.description="Register A"
AT91C_TC0_RA.helpkey="Register A"
AT91C_TC0_RA.access=memorymapped
AT91C_TC0_RA.width=32
AT91C_TC0_RA.address=0xFFFD0014
AT91C_TC0_CMR.name="AT91C_TC0_CMR"
AT91C_TC0_CMR.description="Channel Mode Register"
AT91C_TC0_CMR.helpkey="Channel Mode Register"
AT91C_TC0_CMR.access=memorymapped
AT91C_TC0_CMR.width=32
AT91C_TC0_CMR.address=0xFFFD0004
AT91C_TC0_IDR.name="AT91C_TC0_IDR"
AT91C_TC0_IDR.description="Interrupt Disable Register"
AT91C_TC0_IDR.helpkey="Interrupt Disable Register"
AT91C_TC0_IDR.access=memorymapped
AT91C_TC0_IDR.width=32
AT91C_TC0_IDR.address=0xFFFD0028
AT91C_TC0_SR.name="AT91C_TC0_SR"
AT91C_TC0_SR.description="Status Register"
AT91C_TC0_SR.helpkey="Status Register"
AT91C_TC0_SR.access=memorymapped
AT91C_TC0_SR.width=32
AT91C_TC0_SR.address=0xFFFD0020
AT91C_TC0_RB.name="AT91C_TC0_RB"
AT91C_TC0_RB.description="Register B"
AT91C_TC0_RB.helpkey="Register B"
AT91C_TC0_RB.access=memorymapped
AT91C_TC0_RB.width=32
AT91C_TC0_RB.address=0xFFFD0018
AT91C_TC0_CV.name="AT91C_TC0_CV"
AT91C_TC0_CV.description="Counter Value"
AT91C_TC0_CV.helpkey="Counter Value"
AT91C_TC0_CV.access=memorymapped
AT91C_TC0_CV.width=32
AT91C_TC0_CV.address=0xFFFD0010
AT91C_TC0_CCR.name="AT91C_TC0_CCR"
AT91C_TC0_CCR.description="Channel Control Register"
AT91C_TC0_CCR.helpkey="Channel Control Register"
AT91C_TC0_CCR.access=memorymapped
AT91C_TC0_CCR.width=32
AT91C_TC0_CCR.address=0xFFFD0000
# ========== Register definition for TCB0 peripheral ========== 
AT91C_TCB0_BCR.name="AT91C_TCB0_BCR"
AT91C_TCB0_BCR.description="TC Block Control Register"
AT91C_TCB0_BCR.helpkey="TC Block Control Register"
AT91C_TCB0_BCR.access=memorymapped
AT91C_TCB0_BCR.width=32
AT91C_TCB0_BCR.address=0xFFFD00C0
AT91C_TCB0_BMR.name="AT91C_TCB0_BMR"
AT91C_TCB0_BMR.description="TC Block Mode Register"
AT91C_TCB0_BMR.helpkey="TC Block Mode Register"
AT91C_TCB0_BMR.access=memorymapped
AT91C_TCB0_BMR.width=32
AT91C_TCB0_BMR.address=0xFFFD00C4
# ========== Register definition for PDC_US2 peripheral ========== 
AT91C_US2_TPR.name="AT91C_US2_TPR"
AT91C_US2_TPR.description="Transmit Pointer Register"
AT91C_US2_TPR.helpkey="Transmit Pointer Register"
AT91C_US2_TPR.access=memorymapped
AT91C_US2_TPR.width=32
AT91C_US2_TPR.address=0xFFFC8038
AT91C_US2_RPR.name="AT91C_US2_RPR"
AT91C_US2_RPR.description="Receive Pointer Register"
AT91C_US2_RPR.helpkey="Receive Pointer Register"
AT91C_US2_RPR.access=memorymapped
AT91C_US2_RPR.width=32
AT91C_US2_RPR.address=0xFFFC8030
AT91C_US2_TCR.name="AT91C_US2_TCR"
AT91C_US2_TCR.description="Transmit Counter Register"
AT91C_US2_TCR.helpkey="Transmit Counter Register"
AT91C_US2_TCR.access=memorymapped
AT91C_US2_TCR.width=32
AT91C_US2_TCR.address=0xFFFC803C
AT91C_US2_RCR.name="AT91C_US2_RCR"
AT91C_US2_RCR.description="Receive Counter Register"
AT91C_US2_RCR.helpkey="Receive Counter Register"
AT91C_US2_RCR.access=memorymapped
AT91C_US2_RCR.width=32
AT91C_US2_RCR.address=0xFFFC8034
# ========== Register definition for US2 peripheral ========== 
AT91C_US2_TTGR.name="AT91C_US2_TTGR"
AT91C_US2_TTGR.description="Transmitter Time-guard Register"
AT91C_US2_TTGR.helpkey="Transmitter Time-guard Register"
AT91C_US2_TTGR.access=memorymapped
AT91C_US2_TTGR.width=32
AT91C_US2_TTGR.address=0xFFFC8028
AT91C_US2_BRGR.name="AT91C_US2_BRGR"
AT91C_US2_BRGR.description="Baud Rate Generator Register"
AT91C_US2_BRGR.helpkey="Baud Rate Generator Register"
AT91C_US2_BRGR.access=memorymapped
AT91C_US2_BRGR.width=32
AT91C_US2_BRGR.address=0xFFFC8020
AT91C_US2_RHR.name="AT91C_US2_RHR"
AT91C_US2_RHR.description="Receiver Holding Register"
AT91C_US2_RHR.helpkey="Receiver Holding Register"
AT91C_US2_RHR.access=memorymapped
AT91C_US2_RHR.width=32
AT91C_US2_RHR.address=0xFFFC8018
AT91C_US2_IMR.name="AT91C_US2_IMR"
AT91C_US2_IMR.description="Interrupt Mask Register"
AT91C_US2_IMR.helpkey="Interrupt Mask Register"
AT91C_US2_IMR.access=memorymapped
AT91C_US2_IMR.width=32
AT91C_US2_IMR.address=0xFFFC8010
AT91C_US2_IER.name="AT91C_US2_IER"
AT91C_US2_IER.description="Interrupt Enable Register"
AT91C_US2_IER.helpkey="Interrupt Enable Register"
AT91C_US2_IER.access=memorymapped
AT91C_US2_IER.width=32
AT91C_US2_IER.address=0xFFFC8008
AT91C_US2_CR.name="AT91C_US2_CR"
AT91C_US2_CR.description="Control Register"
AT91C_US2_CR.helpkey="Control Register"
AT91C_US2_CR.access=memorymapped
AT91C_US2_CR.width=32
AT91C_US2_CR.address=0xFFFC8000
AT91C_US2_RTOR.name="AT91C_US2_RTOR"
AT91C_US2_RTOR.description="Receiver Time-out Register"
AT91C_US2_RTOR.helpkey="Receiver Time-out Register"
AT91C_US2_RTOR.access=memorymapped
AT91C_US2_RTOR.width=32
AT91C_US2_RTOR.address=0xFFFC8024
AT91C_US2_THR.name="AT91C_US2_THR"
AT91C_US2_THR.description="Transmitter Holding Register"
AT91C_US2_THR.helpkey="Transmitter Holding Register"