mpc860.h

MPC860的配置I2C示例代码

	unsigned short	brkln;		/* Last Rx Break Length */
	unsigned short	brkec;		/* Rx Break Condition Counter */
	unsigned short	brkcr;		/* Break Count Register (Tx) */
	unsigned short	r_mask;		/* Temporary bit mask */
};

struct smc_trnsp_pram {
	unsigned short	rbase;		/* Rx BD Base Address */
	unsigned short	tbase;		/* Tx BD Base Address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned short  reserved[5];	/* Reserved */
};

struct centronics_pram {
	unsigned short	rbase;		/* Rx BD Base Address */
	unsigned short	tbase;		/* Tx BD Base Address */
	unsigned char	fcr;		/* function code */
	unsigned char	smask;		/* Status Mask */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned short	max_sl;		/* Maximum Silence period */
	unsigned short	sl_cnt;		/* Silence Counter */
	unsigned short	char1;		/* CONTROL char 1 */
	unsigned short	char2;		/* CONTROL char 2 */
	unsigned short	char3;		/* CONTROL char 3 */
	unsigned short	char4;		/* CONTROL char 4 */
	unsigned short	char5;		/* CONTROL char 5 */
	unsigned short	char6;		/* CONTROL char 6 */
	unsigned short	char7;		/* CONTROL char 7 */
	unsigned short	char8;		/* CONTROL char 8 */
	unsigned short	rccm;		/* Rx Control Char Mask */
	unsigned short	rccr;		/* Rx Char Control Register */
};

struct idma_pram {
	unsigned short	ibase;		/* IDMA BD Base Address */
	unsigned short	ibptr;	/* IDMA buffer descriptor pointer */
	unsigned long	istate;	/* IDMA internal state */
	unsigned long	itemp;	/* IDMA temp */
};

struct ethernet_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * ETHERNET specific parameter RAM
	 */
	unsigned long	c_pres;		/* preset CRC */
	unsigned long	c_mask;		/* constant mask for CRC */
	unsigned long	crcec;		/* CRC error counter */
	unsigned long	alec;		/* alighnment error counter */
	unsigned long	disfc;		/* discard frame counter */
	unsigned short	pads;		/* short frame PAD characters */
	unsigned short	ret_lim;	/* retry limit threshold */
	unsigned short	ret_cnt;	/* retry limit counter */
	unsigned short	mflr;		/* maximum frame length reg */
	unsigned short	minflr;		/* minimum frame length reg */
	unsigned short	maxd1;		/* maximum DMA1 length reg */
	unsigned short	maxd2;		/* maximum DMA2 length reg */
	unsigned short	maxd;		/* rx max DMA */
	unsigned short	dma_cnt;	/* rx dma counter */
	unsigned short	max_b;		/* max bd byte count */
	unsigned short	gaddr1;		/* group address filter 1 */
	unsigned short	gaddr2;		/* group address filter 2 */
	unsigned short	gaddr3;		/* group address filter 3 */
	unsigned short	gaddr4;		/* group address filter 4 */
	unsigned long	tbuf0_data0;	/* save area 0 - current frm */
	unsigned long	tbuf0_data1;	/* save area 1 - current frm */
	unsigned long	tbuf0_rba0;
	unsigned long	tbuf0_crc;
	unsigned short	tbuf0_bcnt;
	unsigned short	paddr_h;	/* physical address (MSB) */
	unsigned short	paddr_m;	/* physical address */
	unsigned short	paddr_l;	/* physical address (LSB) */
	unsigned short	p_per;		/* persistence */
	unsigned short	rfbd_ptr;	/* rx first bd pointer */
	unsigned short	tfbd_ptr;	/* tx first bd pointer */
	unsigned short	tlbd_ptr;	/* tx last bd pointer */
	unsigned long	tbuf1_data0;	/* save area 0 - next frame */
	unsigned long	tbuf1_data1;	/* save area 1 - next frame */
	unsigned long	tbuf1_rba0;
	unsigned long	tbuf1_crc;
	unsigned short	tbuf1_bcnt;
	unsigned short	tx_len;		/* tx frame length counter */
	unsigned short	iaddr1;		/* individual address filter 1*/
	unsigned short	iaddr2;		/* individual address filter 2*/
	unsigned short	iaddr3;		/* individual address filter 3*/
	unsigned short	iaddr4;		/* individual address filter 4*/
	unsigned short	boff_cnt;	/* back-off counter */
	unsigned short	taddr_h;	/* temp address (MSB) */
	unsigned short	taddr_m;	/* temp address */
	unsigned short	taddr_l;	/* temp address (LSB) */
};

struct transparent_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * TRANSPARENT specific parameter RAM
	 */
	unsigned long	crc_p;		/* CRC Preset */
	unsigned long	crc_c;		/* CRC constant */
};

struct timer_pram {
	/*
	 * RISC timers parameter RAM
	 */
	unsigned short	tm_base;	/* RISC timer table base adr */
	unsigned short	tm_ptr;		/* RISC timer table pointer */
	unsigned short	r_tmr;		/* RISC timer mode register */
	unsigned short	r_tmv;		/* RISC timer valid register */
	unsigned long	tm_cmd;		/* RISC timer cmd register */
	unsigned long	tm_cnt;		/* RISC timer internal cnt */
};

struct ucode_pram {
	/*
	 * RISC ucode parameter RAM
	 */
	unsigned short	rev_num;	/* Ucode Revision Number */
	unsigned short	d_ptr;		/* MISC Dump area pointer */
	unsigned long	temp1;		/* MISC Temp1 */
	unsigned long	temp2;		/* MISC Temp2 */
};

struct i2c_pram {
	/*
	 * I2C parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
};

/*
 * definitions of EPPC memory structures
 */

typedef struct eppc {
/* BASE + 0x0000: INTERNAL REGISTERS */
/* SIU */
	volatile unsigned long	siu_mcr;	/* module configuration reg */
	volatile unsigned long	siu_sypcr;	/* System protection cnt */
	unsigned char   RESERVED58[0x6];
	volatile unsigned short	siu_swsr;	/* sw service */
	volatile unsigned long	siu_sipend;	/* Interrupt pend reg */
	volatile unsigned long	siu_simask;	/* Interrupt mask reg */
	volatile unsigned long	siu_siel;	/* Interrupt edge level mask reg */
	volatile unsigned long	siu_sivec;	/* Interrupt vector */
	volatile unsigned long	siu_tesr;	/* Transfer error status */
	volatile unsigned char	RESERVED1[0xc];/* Reserved area */
	volatile unsigned long	dma_sdcr;	/* SDMA configuration reg */
	unsigned char   RESERVED55[0x4c];
/* PCMCIA */
	volatile unsigned long        pcmcia_pbr0;       /* PCMCIA Base Reg: Window 0 */
	volatile unsigned long        pcmcia_por0;       /* PCMCIA Option Reg: Window 0 */
	volatile unsigned long        pcmcia_pbr1;       /* PCMCIA Base Reg: Window 1 */
	volatile unsigned long        pcmcia_por1;       /* PCMCIA Option Reg: Window 1 */
	volatile unsigned long        pcmcia_pbr2;       /* PCMCIA Base Reg: Window 2 */
	volatile unsigned long        pcmcia_por2;       /* PCMCIA Option Reg: Window 2 */
	volatile unsigned long        pcmcia_pbr3;       /* PCMCIA Base Reg: Window 3 */
	volatile unsigned long        pcmcia_por3;       /* PCMCIA Option Reg: Window 3 */
	volatile unsigned long        pcmcia_pbr4;       /* PCMCIA Base Reg: Window 4 */
	volatile unsigned long        pcmcia_por4;       /* PCMCIA Option Reg: Window 4 */
	volatile unsigned long        pcmcia_pbr5;       /* PCMCIA Base Reg: Window 5 */
	volatile unsigned long        pcmcia_por5;       /* PCMCIA Option Reg: Window 5 */
	volatile unsigned long        pcmcia_pbr6;       /* PCMCIA Base Reg: Window 6 */
	volatile unsigned long        pcmcia_por6;       /* PCMCIA Option Reg: Window 6 */
	volatile unsigned long        pcmcia_pbr7;       /* PCMCIA Base Reg: Window 7 */
	volatile unsigned long        pcmcia_por7;       /* PCMCIA Option Reg: Window 7 */
	volatile unsigned char	RESERVED2[0x20];/* Reserved area */
	volatile unsigned long        pcmcia_pgcra;      /* PCMCIA Slot A Control  Reg */
	volatile unsigned long        pcmcia_pgcrb;      /* PCMCIA Slot B Control  Reg */
	volatile unsigned long        pcmcia_pscr;       /* PCMCIA Status Reg */
	volatile unsigned char	RESERVED2a[0x4];/* Reserved area */
	volatile unsigned long        pcmcia_pipr;       /* PCMCIA Pins Value Reg */
	volatile unsigned char	RESERVED2b[0x4];/* Reserved area */
	volatile unsigned long        pcmcia_per;        /* PCMCIA Enable Reg */
	volatile unsigned char	RESERVED2c[0x4];/* Reserved area */
/* MEMC */
	volatile unsigned long	memc_br0;	/* base register 0 */
	volatile unsigned long	memc_or0;	/* option register 0 */
	volatile unsigned long	memc_br1;	/* base register 1 */
	volatile unsigned long	memc_or1;	/* option register 1 */
	volatile unsigned long	memc_br2;	/* base register 2 */
	volatile unsigned long	memc_or2;	/* option register 2 */
	volatile unsigned long	memc_br3;	/* base register 3 */
	volatile unsigned long	memc_or3;	/* option register 3 */
	volatile unsigned long	memc_br4;	/* base register 3 */
	volatile unsigned long	memc_or4;	/* option register 3 */
	volatile unsigned long	memc_br5;	/* base register 3 */
	volatile unsigned long	memc_or5;	/* option register 3 */
	volatile unsigned long	memc_br6;	/* base register 3 */
	volatile unsigned long	memc_or6;	/* option register 3 */
	volatile unsigned long	memc_br7;	/* base register 3 */
	volatile unsigned long	memc_or7;	/* option register 3 */
	unsigned char	RESERVED3[0x24];	/* Reserved area */
	volatile unsigned long	memc_mar;	/* Memory address */
	volatile unsigned long	memc_mcr;	/* Memory command */
	volatile unsigned char	RESERVED4[0x4];	/* Reserved area */
	volatile unsigned long	memc_mamr;	/* Machine A mode */
	volatile unsigned long	memc_mbmr;	/* Machine B mode */
	volatile unsigned short	memc_mstat;	/* Memory status */
	volatile unsigned short	memc_mptpr;	/* Memory preidic timer prescalar */