📄 mpc860.h
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/*
* Definitions of the parameter area RAM.
* Note that different structures are overlaid
* at the same offsets for the different modes
* of operation.
*
* History:
* 12/12/95 lvn Bundled multiple files from MSIL into this file
* 6/18/96 saw Replaced:
* volatile unsigned long simt_tbscr;
* volatile unsigned long simt_rtcsc;
* With:
* volatile unsigned short simt_tbscr;
* volatile unsigned char RESERVED100[0x2];
* volatile unsigned short simt_rtcsc;
* volatile unsigned char RESERVED110[0x2];
* 10/4/96 saw Filled in PCMCIA section.
* 11/21/96 saw Changed address of PIP PBODR to 0xac2 from 0xac0.
* 12/18/96 saw Renamed Registers:
* scc_gsmra -> scc_gsmr_l
* scc_gsmrb -> scc_gsmr_h
* 1/6/97 sgj Created 860 version from 8xx code standard
*
*/
/*****************************************************************
HDLC parameter RAM
*****************************************************************/
struct hdlc_pram {
/*
* SCC parameter RAM
*/
unsigned short rbase; /* RX BD base address */
unsigned short tbase; /* TX BD base address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* HDLC specific parameter RAM
*/
unsigned char RESERVED1[4]; /* Reserved area */
unsigned long c_mask; /* CRC constant */
unsigned long c_pres; /* CRC preset */
unsigned short disfc; /* discarded frame counter */
unsigned short crcec; /* CRC error counter */
unsigned short abtsc; /* abort sequence counter */
unsigned short nmarc; /* nonmatching address rx cnt */
unsigned short retrc; /* frame retransmission cnt */
unsigned short mflr; /* maximum frame length reg */
unsigned short max_cnt; /* maximum length counter */
unsigned short rfthr; /* received frames threshold */
unsigned short rfcnt; /* received frames count */
unsigned short hmask; /* user defined frm addr mask */
unsigned short haddr1; /* user defined frm address 1 */
unsigned short haddr2; /* user defined frm address 2 */
unsigned short haddr3; /* user defined frm address 3 */
unsigned short haddr4; /* user defined frm address 4 */
unsigned short tmp; /* temp */
unsigned short tmp_mb; /* temp */
};
/*****************************************************************
ASYNC HDLC parameter RAM
*****************************************************************/
struct async_hdlc_pram {
/*
* SCC parameter RAM
*/
unsigned short rbase; /* RX BD base address */
unsigned short tbase; /* TX BD base address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* ASYNC HDLC specific parameter RAM
*/
unsigned char RESERVED1[4]; /* Reserved area */
unsigned long c_mask; /* CRC constant */
unsigned long c_pres; /* CRC preset */
unsigned short bof; /* begining of flag character */
unsigned short eof; /* end of flag character */
unsigned short esc; /* control escape character */
unsigned char RESERVED2[4]; /* Reserved area */
unsigned short zero; /* zero */
unsigned char RESERVED3[2]; /* Reserved area */
unsigned short rfthr; /* received frames threshold */
unsigned char RESERVED4[4]; /* Reserved area */
unsigned long txctl_tbl; /* Tx ctl char mapping table */
unsigned long rxctl_tbl; /* Rx ctl char mapping table */
unsigned short nof; /* Number of opening flags */
};
/*****************************************************************
UART parameter RAM
*****************************************************************/
/*
* bits in uart control characters table
*/
#define CC_INVALID 0x8000 /* control character is valid */
#define CC_REJ 0x4000 /* don't store char in buffer */
#define CC_CHAR 0x00ff /* control character */
/* UART */
struct uart_pram {
/*
* SCC parameter RAM
*/
unsigned short rbase; /* RX BD base address */
unsigned short tbase; /* TX BD base address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rx_temp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* UART specific parameter RAM
*/
unsigned char RESERVED1[8]; /* Reserved area */
unsigned short max_idl; /* maximum idle characters */
unsigned short idlc; /* rx idle counter (internal) */
unsigned short brkcr; /* break count register */
unsigned short parec; /* Rx parity error counter */
unsigned short frmer; /* Rx framing error counter */
unsigned short nosec; /* Rx noise counter */
unsigned short brkec; /* Rx break character counter */
unsigned short brkln; /* Reaceive break length */
unsigned short uaddr1; /* address character 1 */
unsigned short uaddr2; /* address character 2 */
unsigned short rtemp; /* temp storage */
unsigned short toseq; /* Tx out of sequence char */
unsigned short cc[8]; /* Rx control characters */
unsigned short rccm; /* Rx control char mask */
unsigned short rccr; /* Rx control char register */
unsigned short rlbc; /* Receive last break char */
};
/*****************************************************************
BISYNC parameter RAM
*****************************************************************/
struct bisync_pram {
/*
* SCC parameter RAM
*/
unsigned short rbase; /* RX BD base address */
unsigned short tbase; /* TX BD base address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* BISYNC specific parameter RAM
*/
unsigned char RESERVED1[4]; /* Reserved area */
unsigned long crcc; /* CRC Constant Temp Value */
unsigned short prcrc; /* Preset Receiver CRC-16/LRC */
unsigned short ptcrc; /* Preset Transmitter CRC-16/LRC */
unsigned short parec; /* Receive Parity Error Counter */
unsigned short bsync; /* BISYNC SYNC Character */
unsigned short bdle; /* BISYNC DLE Character */
unsigned short cc[8]; /* Rx control characters */
unsigned short rccm; /* Receive Control Character Mask */
};
/*****************************************************************
IOM2 parameter RAM
(overlaid on tx bd[5] of SCC channel[2])
*****************************************************************/
struct iom2_pram {
unsigned short ci_data; /* ci data */
unsigned short monitor_data; /* monitor data */
unsigned short tstate; /* transmitter state */
unsigned short rstate; /* receiver state */
};
/*****************************************************************
SPI/SMC parameter RAM
(overlaid on tx bd[6,7] of SCC channel[2])
*****************************************************************/
#define SPI_R 0x8000 /* Ready bit in BD */
struct spi_pram {
unsigned short rbase; /* Rx BD Base Address */
unsigned short tbase; /* Tx BD Base Address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
};
struct smc_uart_pram {
unsigned short rbase; /* Rx BD Base Address */
unsigned short tbase; /* Tx BD Base Address */
unsigned char rfcr; /* Rx function code */
unsigned char tfcr; /* Tx function code */
unsigned short mrblr; /* Rx buffer length */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rbptr; /* rb BD Pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tbptr; /* Tx BD pointer */
unsigned short tcount; /* Tx byte count */
unsigned long ttemp; /* Tx temp */
unsigned short max_idl; /* Maximum IDLE Characters */
unsigned short idlc; /* Temporary IDLE Counter */
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