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📄 ep93xx_misc.c

📁 ecos实时嵌入式操作系统
💻 C
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cyg_uint32 hal_phys_to_virt_address(cyg_uint32 paddr){    if ( ((0x040u * SZ_1M) <= paddr) && (paddr <= (0x060u * SZ_1M )))	{		return (paddr + (0x020u * SZ_1M ));	}		return (paddr);}cyg_uint32 hal_virt_to_phys_address(cyg_uint32 vaddr){    cyg_uint32 paddr;    //    // If the Virtual Address two physical mapping is as follows for EDB9301	// Virtual					Physical    // 0x00000000-0x01ffffff	0x00000000-0x01ffffff    // 0x02000000-0x03ffffff	0x04000000-0x05ffffff	//    // 0xc0000000-0xc1ffffff	0x00000000-0x01ffffff    // 0xc2000000-0xc3ffffff	0x04000000-0x05ffffff    //    // 0xe0000000-0xc1ffffff	0x60000000-0x61ffffff	//	    //    // If the Virtual Address is between 0xc0000000 and 0xc2000000 then map it    // back to 0x00000000 where the actual phyical RAM is.    //    if ( ((0xC00u * SZ_1M) <= vaddr) && (vaddr <= (0xC40u * SZ_1M )))    {		//		// Is this in the second 32 Meg of virtual space?		//		if (vaddr > (0xC20u * SZ_1M ))		{			//			// There is a "hole" between 0x02000000 and 0x04000000			//			paddr = vaddr - ((0xC00u - 0x020u) * SZ_1M);		}		else		{			paddr = vaddr - (0xC00u * SZ_1M);		}    }	else if (((0xe00u * SZ_1M) <= vaddr) && (vaddr <= (0xe20u * SZ_1M )))	{		//		// Physical address of the Flash is at 0x60000000		//        paddr = vaddr - 0x80000000;	}    else    {		//		// Otherwise virtual == physical		//        paddr = vaddr;    }    return(paddr);}#endif // HAL_PLATFORM_EP9301//=============================================================================//=============================================================================// Write a locked syscon Register.static __inline__ voidsysconWriteReg(int offset, unsigned long val){    HAL_WRITE_UINT32(EP9312_SYSCON+EP9312_SYSCON_LOCK, 0xAA);    HAL_WRITE_UINT32(EP9312_SYSCON+offset, val);}//// Platform specific initialization//voidplf_hardware_init(void){    unsigned long ClkSet1;    unsigned long ClkSet2;    hal_mmu_init();    //    // Set the output of PLL2 to 192Mhz    //    ClkSet2 = 0x300dc317;#ifdef HAL_PLATFORM_EP9301    //    // Set the output of the PLL to 332Mhz    //    ClkSet1 = EP9312_CLKSET1_NBYP | 0x00fa5a;    //    // Set the FCLKDIV value to divide by 2 (166Mhz).    //    ClkSet1 |= (1 << EP9312_CLKSET1_FCLKDIV_SHIFT);    //    // Set the HCLKDIV value to divide by 5 (66Mhz).    //	ClkSet1 |= (3 << EP9312_CLKSET1_HCLKDIV_SHIFT);#else    //    // Set the output of the PLL to 400Mhz    //    ClkSet1 = EP9312_CLKSET1_NBYP | 0x00e39e;    //    // Set the FCLKDIV value.    //    switch (CYGHWR_HAL_ARM_EP93XX_PROCESSOR_CLOCK)    {        case 200:        {            ClkSet1 |= (1 << EP9312_CLKSET1_FCLKDIV_SHIFT);            break;        }        case 50:        {            ClkSet1 |= (3 << EP9312_CLKSET1_FCLKDIV_SHIFT);            break;        }        case 100:        default:        {            ClkSet1 |= (2 << EP9312_CLKSET1_FCLKDIV_SHIFT);            break;        }    }    //    // Figure out the HCLKDIV value.    //    switch (CYGHWR_HAL_ARM_EP93XX_BUS_CLOCK_DIVISOR)    {        case 1:        {            break;        }        case 2:        default:        {            ClkSet1 |= (1 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 4:        {            ClkSet1 |= (2 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 5:        {            ClkSet1 |= (3 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 6:        {            ClkSet1 |= (4 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 8:        {            ClkSet1 |= (5 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 16:        {            ClkSet1 |= (6 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }        case 32:        {            ClkSet1 |= (7 << EP9312_CLKSET1_HCLKDIV_SHIFT);            break;        }    }#endif // HAL_PLATFORM_EP9301	//	// Set PCLKDIV so that PCLK = HCLK / 2	//    ClkSet1 |= (1 << EP9312_CLKSET1_PCLKDIV_SHIFT);    HAL_WRITE_UINT32(EP9312_CLKSET1, ClkSet1);    //    // Do the five required nops to keep us clean.    //    __asm ("nop");    __asm ("nop");    __asm ("nop");    __asm ("nop");    __asm ("nop");    //    // Write out the value to ClkSet 2    //    HAL_WRITE_UINT32(EP9312_CLKSET2, ClkSet2);    //    // Go to Async mode    //    __asm ("mrc p15, 0, r0, c1, c0, 0");    __asm ("orr r0, r0, #0xc0000000");    __asm ("mcr p15, 0, r0, c1, c0, 0");    //    // TODO remove this hack.  This is to set the wait states to max for Flash.    //#ifdef HAL_PLATFORM_EP9301    HAL_WRITE_UINT32(0x80080018, 0x1000FFFF);#else    HAL_WRITE_UINT32(0x80080018, 0x2000FFFF);#endif // HAL_PLATFORM_EP9301    //    // Set this bit like the Kernel expects it(runs serial off of the 14Mhz).    //    HAL_WRITE_UINT32(EP9312_PWRCNT, EP9312_PWRCNT_UARTBAUD);}//-----------------------------------------------------------------------------// This will get defined to HAL_CLOCK_INITIALIZE in hal_intr.h. This routine// should only be called by test code.//-----------------------------------------------------------------------------void hal_clock_initialize(cyg_uint32 period){    while(1);}//-----------------------------------------------------------------------------// This will get defined to HAL_CLOCK_RESET.  This routine should only be// called by test code.//-----------------------------------------------------------------------------externC void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period){    while(1);}// Read the current value of the clock, returning the number of hardware// "ticks" that have occurred (i.e. how far away the current value is from// the start)// Note: The "contract" for this function is that the value is the number// of hardware clocks that have happened since the last interrupt (i.e.// when it was reset).  This value is used to measure interrupt latencies.// However, since the hardware counter does not automatically reset, as// many do, the value may be larger than the system "tick" interval.// If this turns out to be the case, the result will be adjusted to be// within the interval [0..N-1], where N is the number of hardware clocks/tick.void hal_clock_read(cyg_uint32 *pvalue){    while(1);}//// Delay for some number of micro-seconds//void hal_delay_us(cyg_int32 usecs){    cyg_uint32 val, val2, hi, hi2;    int i, safety;        //     // Reset debug timer    //    HAL_WRITE_UINT32(EP9312_TIMERS_DEBUG_HI, EP9312_TIMERS_DEBUG_HI_RESET);    // TODO is this required?    // Required for timer to properly reset??    //    for (i = 0;  i < 100;  i++) ;      HAL_WRITE_UINT32(EP9312_TIMERS_DEBUG_HI, EP9312_TIMERS_DEBUG_HI_START);    //     // Wait for timer    //    do {        HAL_READ_UINT32(EP9312_TIMERS_DEBUG_LO, val);        HAL_READ_UINT32(EP9312_TIMERS_DEBUG_HI, hi);        safety = 1000;  // Surely this is more than 1us        while (safety-- > 0) {            HAL_READ_UINT32(EP9312_TIMERS_DEBUG_LO, val2);            HAL_READ_UINT32(EP9312_TIMERS_DEBUG_HI, hi2);            if (val != val2) {                // Timer is going, continue                break;            }        }        if (safety == 0) {            // Timer must be stuck, give up            return;        }    } while (val < usecs);}//-----------------------------------------------------------------------------// int hal_IRQ_handler(void)//-----------------------------------------------------------------------------// This routine is called to respond to a hardware interrupt (IRQ).  It// should interrogate the hardware and return the IRQ vector number.int hal_IRQ_handler(void){    return(0);}//-----------------------------------------------------------------------------// void hal_interrupt_mask(int InterruptNumber)//-----------------------------------------------------------------------------// Disable the interrupt indicated by InterruptNumber//void hal_interrupt_mask(int InterruptNumber){    if (InterruptNumber<32)    {        //        // Mask the interrupt        //        IntControl[0]->VICIntEnClear.Value = (0x1 << InterruptNumber);    }    else    {        //        // Mask the interrupt        //        IntControl[1]->VICIntEnClear.Value = (0x1 << (InterruptNumber - 32));    }}//-----------------------------------------------------------------------------// void hal_interrupt_unmask(int InterruptNumber)//-----------------------------------------------------------------------------// Enable the interrupt indicated by InterruptNumber//void hal_interrupt_unmask(int InterruptNumber){    if (InterruptNumber<32)    {        //        // Mask the interrupt        //        IntControl[0]->VICIntEnable.Value = (0x1 << InterruptNumber);    }    else    {        //        // Mask the interrupt        //        IntControl[1]->VICIntEnable.Value = (0x1 << (InterruptNumber - 32));    }}//-----------------------------------------------------------------------------// void hal_interrupt_acknowledge(int vector)//-----------------------------------------------------------------------------// There is no acknowledge at the global level in the ARM VIC.//void hal_interrupt_acknowledge(int vector){    return;}//-----------------------------------------------------------------------------// void hal_interrupt_acknowledge(int vector)//-----------------------------------------------------------------------------// All interrupts are level triggered, so this function cannot be implemented.//void hal_interrupt_configure(int vector, int level, int up){    return;}//-----------------------------------------------------------------------------// void hal_interrupt_acknowledge(int vector)//-----------------------------------------------------------------------------// This function is unimplemented because unless vectored interrupts are used,// priority is fixed.//void hal_interrupt_set_level(int vector, int level){    return;}// ------------------------------------------------------------------------// EOF ep93xx_misc.c

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