intel_mmx.txt

x86 mmx 汇编指令大全

Intel MMX Instruction Set
also extra Cyrix extensions.


  A.26 `EMMS': Empty MMX State

       EMMS                          ; 0F 77                [PENT,MMX]

       `EMMS' sets the FPU tag word (marking which floating-point registers
       are available) to all ones, meaning all registers are available for
       the FPU to use. It should be used after executing MMX instructions
       and before executing any subsequent floating-point operations.

 A.103 `MOVD': Move Doubleword to/from MMX Register

       MOVD mmxreg,r/m32             ; 0F 6E /r             [PENT,MMX] 
       MOVD r/m32,mmxreg             ; 0F 7E /r             [PENT,MMX]

       `MOVD' copies 32 bits from its source (second) operand into its
       destination (first) operand. When the destination is a 64-bit MMX
       register, the top 32 bits are set to zero.

 A.104 `MOVQ': Move Quadword to/from MMX Register

       MOVQ mmxreg,r/m64             ; 0F 6F /r             [PENT,MMX] 
       MOVQ r/m64,mmxreg             ; 0F 7F /r             [PENT,MMX]

       `MOVQ' copies 64 bits from its source (second) operand into its
       destination (first) operand.

 A.113 `PACKSSDW', `PACKSSWB', `PACKUSWB': Pack Data

       PACKSSDW mmxreg,r/m64         ; 0F 6B /r             [PENT,MMX] 
       PACKSSWB mmxreg,r/m64         ; 0F 63 /r             [PENT,MMX] 
       PACKUSWB mmxreg,r/m64         ; 0F 67 /r             [PENT,MMX]

       All these instructions start by forming a notional 128-bit word by
       placing the source (second) operand on the left of the destination
       (first) operand. `PACKSSDW' then splits this 128-bit word into four
       doublewords, converts each to a word, and loads them side by side
       into the destination register; `PACKSSWB' and `PACKUSWB' both split
       the 128-bit word into eight words, converts each to a byte, and
       loads _those_ side by side into the destination register.

       `PACKSSDW' and `PACKSSWB' perform signed saturation when reducing
       the length of numbers: if the number is too large to fit into the
       reduced space, they replace it by the largest signed number (`7FFFh'
       or `7Fh') that _will_ fit, and if it is too small then they replace
       it by the smallest signed number (`8000h' or `80h') that will fit.
       `PACKUSWB' performs unsigned saturation: it treats its input as
       unsigned, and replaces it by the largest unsigned number that will
       fit.

 A.114 `PADDxx': MMX Packed Addition

       PADDB mmxreg,r/m64            ; 0F FC /r             [PENT,MMX] 
       PADDW mmxreg,r/m64            ; 0F FD /r             [PENT,MMX] 
       PADDD mmxreg,r/m64            ; 0F FE /r             [PENT,MMX]

       PADDSB mmxreg,r/m64           ; 0F EC /r             [PENT,MMX] 
       PADDSW mmxreg,r/m64           ; 0F ED /r             [PENT,MMX]

       PADDUSB mmxreg,r/m64          ; 0F DC /r             [PENT,MMX] 
       PADDUSW mmxreg,r/m64          ; 0F DD /r             [PENT,MMX]

       `PADDxx' all perform packed addition between their two 64-bit
       operands, storing the result in the destination (first) operand. The
       `PADDxB' forms treat the 64-bit operands as vectors of eight bytes,
       and add each byte individually; `PADDxW' treat the operands as
       vectors of four words; and `PADDD' treats its operands as vectors of
       two doublewords.

       `PADDSB' and `PADDSW' perform signed saturation on the sum of each
       pair of bytes or words: if the result of an addition is too large or
       too small to fit into a signed byte or word result, it is clipped
       (saturated) to the largest or smallest value which _will_ fit.
       `PADDUSB' and `PADDUSW' similarly perform unsigned saturation,
       clipping to `0FFh' or `0FFFFh' if the result is larger than that.

 A.115 `PADDSIW': MMX Packed Addition to Implicit Destination

       PADDSIW mmxreg,r/m64          ; 0F 51 /r             [CYRIX,MMX]

       `PADDSIW', specific to the Cyrix extensions to the MMX instruction
       set, performs the same function as `PADDSW', except that the result
       is not placed in the register specified by the first operand, but
       instead in the register whose number differs from the first operand
       only in the last bit. So `PADDSIW MM0,MM2' would put the result in
       `MM1', but `PADDSIW MM1,MM2' would put the result in `MM0'.

 A.116 `PAND', `PANDN': MMX Bitwise AND and AND-NOT

       PAND mmxreg,r/m64             ; 0F DB /r             [PENT,MMX] 
       PANDN mmxreg,r/m64            ; 0F DF /r             [PENT,MMX]

       `PAND' performs a bitwise AND operation between its two operands
       (i.e. each bit of the result is 1 if and only if the corresponding
       bits of the two inputs were both 1), and stores the result in the
       destination (first) operand.

       `PANDN' performs the same operation, but performs a one's complement
       operation on the destination (first) operand first.

 A.117 `PAVEB': MMX Packed Average

       PAVEB mmxreg,r/m64            ; 0F 50 /r             [CYRIX,MMX]

       `PAVEB', specific to the Cyrix MMX extensions, treats its two
       operands as vectors of eight unsigned bytes, and calculates the
       average of the corresponding bytes in the operands. The resulting
       vector of eight averages is stored in the first operand.

 A.118 `PCMPxx': MMX Packed Comparison

       PCMPEQB mmxreg,r/m64          ; 0F 74 /r             [PENT,MMX] 
       PCMPEQW mmxreg,r/m64          ; 0F 75 /r             [PENT,MMX] 
       PCMPEQD mmxreg,r/m64          ; 0F 76 /r             [PENT,MMX]

       PCMPGTB mmxreg,r/m64          ; 0F 64 /r             [PENT,MMX] 
       PCMPGTW mmxreg,r/m64          ; 0F 65 /r             [PENT,MMX] 
       PCMPGTD mmxreg,r/m64          ; 0F 66 /r             [PENT,MMX]

       The `PCMPxx' instructions all treat their operands as vectors of
       bytes, words, or doublewords; corresponding elements of the source
       and destination are compared, and the corresponding element of the
       destination (first) operand is set to all zeros or all ones
       depending on the result of the comparison.

       `PCMPxxB' treats the operands as vectors of eight bytes, `PCMPxxW'
       treats them as vectors of four words, and `PCMPxxD' as two
       doublewords.

       `PCMPEQx' sets the corresponding element of the destination operand
       to all ones if the two elements compared are equal; `PCMPGTx' sets
       the destination element to all ones if the element of the first
       (destination) operand is greater (treated as a signed integer) than
       that of the second (source) operand.

 A.119 `PDISTIB': MMX Packed Distance and Accumulate with Implied Register

       PDISTIB mmxreg,mem64          ; 0F 54 /r             [CYRIX,MMX]

       `PDISTIB', specific to the Cyrix MMX extensions, treats its two
       input operands as vectors of eight unsigned bytes. For each byte
       position, it finds the absolute difference between the bytes in that
       position in the two input operands, and adds that value to the byte
       in the same position in the implied output register. The addition is
       saturated to an unsigned byte in the same way as `PADDUSB'.

       The implied output register is found in the same way as `PADDSIW'
       (section A.115).

       Note that `PDISTIB' cannot take a register as its second source
       operand.

 A.120 `PMACHRIW': MMX Packed Multiply and Accumulate with Rounding

       PMACHRIW mmxreg,mem64         ; 0F 5E /r             [CYRIX,MMX]

       `PMACHRIW' acts almost identically to `PMULHRIW' (section A.123),
       but instead of _storing_ its result in the implied destination
       register, it _adds_ its result, as four packed words, to the implied
       destination register. No saturation is done: the addition can wrap
       around.

       Note that `PMACHRIW' cannot take a register as its second source
       operand.

 A.121 `PMADDWD': MMX Packed Multiply and Add

       PMADDWD mmxreg,r/m64          ; 0F F5 /r             [PENT,MMX]

       `PMADDWD' treats its two inputs as vectors of four signed words. It
       multiplies corresponding elements of the two operands, giving four
       signed doubleword results. The top two of these are added and placed
       in the top 32 bits of the destination (first) operand; the bottom
       two are added and placed in the bottom 32 bits.

 A.122 `PMAGW': MMX Packed Magnitude

       PMAGW mmxreg,r/m64            ; 0F 52 /r             [CYRIX,MMX]

       `PMAGW', specific to the Cyrix MMX extensions, treats both its
       operands as vectors of four signed words. It compares the absolute
       values of the words in corresponding positions, and sets each word
       of the destination (first) operand to whichever of the two words in
       that position had the larger absolute value.

 A.123 `PMULHRW', `PMULHRIW': MMX Packed Multiply High with Rounding

       PMULHRW mmxreg,r/m64          ; 0F 59 /r             [CYRIX,MMX] 
       PMULHRIW mmxreg,r/m64         ; 0F 5D /r             [CYRIX,MMX]

       These instructions, specific to the Cyrix MMX extensions, treat
       their operands as vectors of four signed words. Words in
       corresponding positions are multiplied, to give a 32-bit value in
       which bits 30 and 31 are guaranteed equal. Bits 30 to 15 of this
       value (bit mask `0x7FFF8000') are taken and stored in the
       corresponding position of the destination operand, after first
       rounding the low bit (equivalent to adding `0x4000' before
       extracting bits 30 to 15).

       For `PMULHRW', the destination operand is the first operand; for
       `PMULHRIW' the destination operand is implied by the first operand
       in the manner of `PADDSIW' (section A.115).

 A.124 `PMULHW', `PMULLW': MMX Packed Multiply

       PMULHW mmxreg,r/m64           ; 0F E5 /r             [PENT,MMX] 
       PMULLW mmxreg,r/m64           ; 0F D5 /r             [PENT,MMX]

       `PMULxW' treats its two inputs as vectors of four signed words. It
       multiplies corresponding elements of the two operands, giving four
       signed doubleword results.

       `PMULHW' then stores the top 16 bits of each doubleword in the
       destination (first) operand; `PMULLW' stores the bottom 16 bits of
       each doubleword in the destination operand.

 A.125 `PMVccZB': MMX Packed Conditional Move

       PMVZB mmxreg,mem64            ; 0F 58 /r             [CYRIX,MMX] 
       PMVNZB mmxreg,mem64           ; 0F 5A /r             [CYRIX,MMX] 
       PMVLZB mmxreg,mem64           ; 0F 5B /r             [CYRIX,MMX] 
       PMVGEZB mmxreg,mem64          ; 0F 5C /r             [CYRIX,MMX]

       These instructions, specific to the Cyrix MMX extensions, perform
       parallel conditional moves. The two input operands are treated as
       vectors of eight bytes. Each byte of the destination (first) operand
       is either written from the corresponding byte of the source (second)
       operand, or left alone, depending on the value of the byte in the
       _implied_ operand (specified in the same way as `PADDSIW', in
       section A.115).

       `PMVZB' performs each move if the corresponding byte in the implied