📄 复件 eb40800init.s
字号:
;初始化后COL1…COL4锁成0
;PIO中断时处理键的扫描、去抖、处理
;100X XXXX,读写键盘，防止对LCD操作
;LCD的操作中
;XXXX 1111,还可以禁止键盘
AREA BOOTROM, CODE, READONLY
;0x0000
AT91_MEM EQU 0xFFE00000 ; Memory controller
MEM_RCR EQU 0xFFE00020 ; remap control register
;3d00
ARM_MODE_SYS EQU 0x1F
ARM_MODE_IRQ EQU 0x12
Mode_USR EQU 0x10
Mode_IRQ EQU 0x12
Mode_SVC EQU 0x13
I_Bit EQU 0x80
F_Bit EQU 0x40
AIC_BASE EQU 0xFFFFF000
AIC_EOICR EQU 0x0130
;PIO IRQ
AIC_SMR8 EQU 0xFFFFF020
AIC_SVR8 EQU 0xFFFFF0A0
AIC_IECR EQU 0xFFFFF120
AIC_IDCR EQU 0xFFFFF124
PIO_ISR EQU 0xFFFF004C
PIO_PDSR EQU 0xFFFF003C
PIO_ODSR EQU 0xFFFF0038
PIO_BASE EQU 0xFFFF0000
P0_P7MASK EQU 0xFFFFFF00
USART0 EQU 0xFFFD0000
USART1 EQU 0xFFFCC000
CS4_addr EQU 0x40000000
;LCD and keyboard
ONCHIP_RAM EQU 0x00300000 ; Onchip SRAM base address (REBOOT mode)
CODE_SRAM EQU 0X02000000;SRAM ON BORAD
ONCHIP_RAM_END EQU 0x00002000 ; Onchip SRAM END 8K
CODE_SRAM_END EQU 0X02080000;SRAM ON BORAD 512K
FlashROM_END EQU 0X01080000;ROM ON BORAD 512K
;ON Chip RAM
send_bufffer EQU 0x00001E00;
receive_bufffer EQU 0x00001D00;
addr_download EQU 0x00001F88;start address of download
secsize_download EQU 0x00001F8C;sector size of download
LCDparam EQU 0x00001F00;????????????????????
RAM_Limit EQU 0x0207FFF0 ;SRAM end
IRQ_Stack EQU RAM_Limit ; 1K IRQ stack at top of memory
SVC_Stack EQU RAM_Limit-2048 ; followed by SVC stack 0x1F7FF
USR_Stack EQU SVC_Stack-2048 ; followed by USR stack 0x1EFFF
;XXXX 0000
;E(1),R/~W,RS(1 data,0 commmand)
LCD_CW_E EQU 0x80
;100 X
LCD_CR_E EQU 0xC0
;110 X
LCD_DW_E EQU 0xA0
;101 X
LCD_DR_E EQU 0xE0
;111 X
;write to cs4
LCD_CW EQU 0x00
;000 X
LCD_CR EQU 0x40
;010 X
LCD_DW EQU 0x20
;001 X
LCD_DR EQU 0x60
;011 X
;write to cs4
BOOTROMREG EQU 0x0100203E
;NCS0-Flash ROM
;0x0100203E
;0x0100
;%0010,0000
;%0011,1110
;0x01000000(0x-0 0000-0xF FFFF)use 0-7FFFF, 1MB (A0-A19),0 cycles added after transfer, 8 wait states 225ns ,8-bit,
CSR1DEF EQU 0x02003001
;NCS1-SRAM
;0x02000000(0x00000-3FFFF), NO TDF,1MB(A0-A19),0 cycles added after transfer, no wait states,16-bit,
;upper and lower byte with two select lines, and separate read write signals.
CSR2DEF EQU 0x20000086
;disable 0x20000000,NO TDF,4MB, 8-bit, 0 wait state
CSR3DEF EQU 0x30000082
;disable 0x30000000,NO TDF,4MB, 8-bit, 0 wait state
CSR4DEF EQU 0x40002002
;LCD and keyboard
;=>8-bit 1tdf 0 waitstate
;0x4000203E
;0x4000
;%0010,0000
;%0000,0010
;0x40000000(0x0000-0xFFFF), 1MB (A0-A19),0 cycles added after transfer, 0 wait states,8-bit,
CSR5DEF EQU 0x500000BD ;disable 0x50000000,NO TDF,4MB, 16-bit, 8 wait state
CSR6DEF EQU 0x60000000 ;disable 0x60000000,
CSR7DEF EQU 0x70000000 ;disable 0x70000000,
MCRDEF EQU 0x00000007 ;4 memory regions only, standard read
;%_ _ _ _,_ _ _ _
;%_ _ _ _,0 0 0 0(BA)
;%0 0 1(CSEN)0(BAT),_ _ _(TDF)_(PAGES)
;%_(PAGES)0 1(WSE)_,_ _(NWS)_ _(DBW)
TC_1_BASE EQU 0xFFFE0040
TC_2_BASE EQU 0xFFFE0080
TC_BCR EQU 0xFFFE00C0
TC_BMR EQU 0xFFFE00C4
;Time Counter 1 IRQ
AIC_SMR5 EQU 0xFFFFF014
AIC_SVR5 EQU 0xFFFFF094
addr_AIC_SVR5 EQU 0x000002b8;#########
addr_SVR8 EQU 0x02020000;in RaM
CODE_SVR8 EQU 0x01010000;#########in ROM
CODE_SVR8_END EQU 0x01011000
ENTRY
vectors
B resetvec ; reqset
B undefvec ; Udef
B swivec ; SW
B pabtvec ; P abt
B dabtvec ; D abt
B rsvdvec ; reserved
ldr pc, [pc,#-&F20] ; IRQ : read the Advanced Interrupt Controller
ldr pc, [pc,#-&F20] ; FIQ : read the Advanced Interrupt Controller
resetvec
;point at the base address
LDR r0, =AT91_MEM
;program chip select and memory control registers
LDR r1, =BOOTROMREG
STR r1, [r0, #0]
LDR r1, =CSR1DEF
STR r1, [r0, #4]
LDR r1, =CSR2DEF
STR r1, [r0, #8]
LDR r1, =CSR3DEF
STR r1, [r0, #12]
LDR r1, =CSR4DEF
STR r1, [r0, #16]
LDR r1, =CSR5DEF
STR r1, [r0, #20]
LDR r1, =CSR6DEF
STR r1, [r0, #24]
LDR r1, =CSR7DEF
STR r1, [r0, #28]
LDR r1, =MCRDEF ;Memory Control Register
STR r1, [r0, #36]
copytosram
; copy first 2048 bytes of ROM to internal SRAM
; r0 destination address
; r1 source address
; r2 end of source address
; r3 corrupted
LDR r0, =ONCHIP_RAM
MOV r1, #0
ldr r2,=0x1000;4K
; r0 destination address
; r1 source address
; r2 end of source address
; r3 Temporary register
copyloop
CMP r1,r2
BGE remap
LDR r3,[r1],#4
STR r3,[r0]
LDR r3,[r0],#4
B copyloop
remap
; SRAM and ROM have same code so remap now
LDR r0, =MEM_RCR
MOV r1, #1
STR r1, [r0]
; ldr r0,=0xe51fff20
; ldr r1,=0x18
; str r0,[r1]
; ldr r0,=0xe51fff20
; ldr r1,=0x1c
; str r0,[r1]
; --- Initialise stack pointer registers
; Enter IRQ mode and set up the IRQ stack pointer
MOV R0, #Mode_IRQ:OR:I_Bit:OR:F_Bit ; No interrupts
MSR CPSR_c, R0
LDR R13, =IRQ_Stack
; Enter USR mode and set up the USR stack pointer
; MOV R0, #Mode_USR:OR:I_Bit:OR:F_Bit ; No interrupts
; MSR CPSR_c, R0
; LDR R13, =USR_Stack
; Set up other stack pointers if necessary
;...
; Set up the SVC stack pointer last and return to SVC mode
MOV R0, #Mode_SVC:OR:I_Bit:OR:F_Bit ; No interrupts
MSR CPSR_c, R0
LDR R13, =SVC_Stack
;CODE to SRAM,INT
CODEtoEXTsram
; copy first 2048 bytes of ROM to internal SRAM
; r0 destination address
; r1 source address
; r2 end of source address
; r3 corrupted
LDR r0,=addr_SVR8
ldr r1,=CODE_SVR8
ldr r2,=CODE_SVR8_END;4K
; r0 destination address
; r1 source address
; r2 end of source address
; r3 Temporary register
CODEtoEXTsramloop
CMP r1,r2
BGE CODEtoEXTsram_END
LDR r3,[r1],#4
STR r3,[r0]
LDR r3,[r0],#4
B CODEtoEXTsramloop
CODEtoEXTsram_END
; --- Initialise critical IO devices
LDR R0,=PIO_BASE
;P16,P17,P18,P19 for keyboard
;P0-P7 for LCD
LDR R1,=0xFFF0FF00
STR R1,[R0,#0x04];PIO_PDR,p16-p19 and p0-p7is valueable
LDR R1,=0x000F00FF
STR R1,[R0,#0x00];PIO_PER
;change for key board
LDR R1,=0xFFFFFFFF
STR R1,[R0,#0x20];PIO_IFER,all pins have input filter
LDR R1,=0x0
STR R1,[R0,#0x24];PIO_IFDR
LDR R1,=0xFFFFFF00
STR R1,[R0,#0x14];PIO_ODR,all pins as input EXCEPT P0-7
LDR R1,=0x000000FF
STR R1,[R0,#0x10];PIO_OER,P0-7 AS OUTPUT
;may be need changes
LDR R1,=0xFFF0FFFF
STR R1,[R0,#0x44];PIO_IDR interupt,p16-p19 is valueable
LDR R1,=0x000F0000
STR R1,[R0,#0x40];PIO_IER
; --- Initialise interrupt system variables here
;Setup AIC for TC1
; LDR R0,=0x00000007;AIC_SMR5 value,prior 7
; LDR R1,=AIC_SMR5
; STR R0,[R1]
; LDR R0,=addr_AIC_SVR5;AIC_SVR5 value:Addr of scankey
; LDR R1,=AIC_SVR5
; STR R0,[R1]
;Setup AIC for key_down PIO
LDR R0,=0x00000006;AIC_SMR8 value,prior 6
LDR R1,=AIC_SMR8
STR R0,[R1]
LDR R0,=addr_SVR8
; LDR R0,=PIO_int
;AIC_SVR8 value:Addr of keydown
LDR R1,=AIC_SVR8
STR R0,[R1]
LDR R0,=0xFFFFFEFF;AIC_IDCR:ALL DISABLE ,EXCEPT 8 ENABLE
LDR R1,=AIC_IDCR
STR R0,[R1]
LDR R0,=0x00000100;AIC_IECR: 8 ENABLE
LDR R1,=AIC_IECR
STR R0,[R1]
LDR R1,=0xFFFFFFFF;SET OR CLEAR VALUE OUTPUT:ALL=0
LDR R0,=PIO_BASE
STR R1,[R0,#0x34];CLEAR OUTPUT DATA REGISTER
LDR R2,=CS4_addr
ldrb r1,=0x00
strb r1,[r2]
; BL LIGHTLED
;light LED
ldrb r0,=0x55
bl R0_writeP0_P7
; BL LIGHTLED
MOV R0, #Mode_SVC
MSR CPSR_c, R0
BL LIGHTLED
; bl lcd_main
; bl init_USART0
; bl COM_download;download file to target
waithere B waithere
PIO_int
;- Adjust and save LR of current mode in current stack
sub r14, r14, #4
stmfd sp!, {r14}
;- Save SPSR and r0 in current stack
mrs r14, SPSR
stmfd sp!, {r0, r14}
;- Save used registers and LR_usr in the System/User Stack
stmfd sp!, {r0-r4, r14}
;-----------------------------------------------------------------------
LDR R2,=PIO_ISR
LDR R0,[R2]
BIC R0,R0,#0xFFF0FFFF
;row in r0
;1000 =>p19 0x80
;0100 =>p18 0x40
;0010 =>p17 0x20
;0001 =>p16 0x10
bl CPL_P0P7
ldr r3,=0x00000000;clr keydown
start_scan_COL
;scan col
ldr r1,=0xFFFFFFF7;1111 0111->COL4
bl delay20ms
bl CPL_P0P7
scan_nextCOL
stmfd sp!, {r0}
LDR R2,=CS4_addr
bic r4,r1,#0xFFFFFFF0
strb r4,[r2]
nop
nop
nop
nop
nop
LDR R2,=PIO_PDSR
LDR R0,[R2]
mvn r2,r0
BIC R2,R2,#0xFFF0FFFF
ldmfd sp!, {r0}
cmp r0,#0
beq end_of_keydown
cmp r2,#0
beq no_keydown_thiscol
cmp r2,r0
beq keydown_is_curCOL
no_keydown_thiscol
mov r1,r1,ROR #1
cmp r1,#0x7FFFFFFF
beq this_scan_no_keydown
B scan_nextCOL
keydown_is_curCOL
;r1 0xFFFFFFF0
;r0 0x000F 0000->0x0000 00F0
MOV R2,R2,LSR #12
BIC R1,R1,#0xFFFFFFF0
add r2,r2,r1
mov r3,r2
B start_scan_COL
;key in r3
;0x0000 0017:F3
;0x0000 001B:E
;0x0000 001D:0
;0x0000 001E:9
;0x0000 0027:1
;0x0000 002B:5
;0x0000 002D:7
;0x0000 002E:6
;0x0000 0047:FE
;0x0000 004B:F2
;0x0000 004D:F4
;0x0000 004E:8
;0x0000 0087:2
;0x0000 008B:3
;0x0000 008D:F1
;0x0000 008E:4
this_scan_no_keydown
;process key
cmp r3,#0x17
bleq COM_download;download file to target
cmp r3,#0x4D;F4
bleq init_USART0
cmp r3,#0x2E;6
bleq test_USART0
cmp r3,#0x27
bleq LIGHTLED
cmp r3,#0x87
bleq INITLCD
cmp r3,#0x8B
bleq lcd_main
cmp r3,#0x2B
bleq test_DISPLAY_R0
end_of_keydown
bl delay20ms
LDR R2,=PIO_ISR
LDR R0,[R2]
LDR R2,=CS4_addr
ldrb r1,=0x00
strb r1,[r2];re enable
;-----------------------------------------------------------------------
;- Restore used registers and LR_usr from the System/User Stack
ldmfd sp!, {r0-r4,r14}
;- Mark the End of Interrupt on the interrupt controller
ldr r0, = AIC_BASE
str r0, [r0, #AIC_EOICR]
;- Restore SPSR_irq and r0 from the IRQ stack
ldmfd sp!, {r0, r14}
msr SPSR, r14
;- Restore ajusted LR_irq from IRQ stack directly in the PC
ldmfd sp!, {pc}^
;-------------------------------------------------------------------
COM_download STMFD sp!,{R0-R2,R5,lr}
; BL on_p7;START TRANSFER
LDR R1,=send_bufffer;ADDR OF STRING
LDR R0,=0x434C4557;WELC
STR R0,[R1]
LDR R0,=0x21454D4F;OME!
STR R0,[R1,#4]
LDR R5,=0x00000008
BL sendstring
BL getbyte
CMP R5,#82;"R"
BNE COM_ERROR
LDR R5,=0x00000041;"A"
BL sendbyte
LDR R5,=0x00000004;get the start address of download
BL getstring
LDR R1,=receive_bufffer;save the start address
LDR R0,[R1]
LDR R2,=addr_download
STR R0,[R2]
BL DISPLAY_R0
LDR R5,=0x00000053;"S"
BL sendbyte
LDR R5,=0x00000004;get the sector size of download,128 bytes/sector
BL getstring
LDR R0,[R1];save the sector size
LDR R2,=secsize_download
STR R0,[R2]
BL DISPLAY_R0
SEC_WRI BL getbyte
CMP R5,#71;"G"
BNE COM_downloadEND
LDR R5,=0x00000047;"G"
BL sendbyte;start sector write
LDR R5,=0x00000080;get a sector(128 bytes)
BL getstring
BL BUF2ROM
LDR R2,=secsize_download
LDR R0,[R2]
SUB R0,R0,#1
CMP R0,#0
BEQ END_FILE
STR R0,[R2]
B SEC_WRI
END_FILE
LDR R5,=0x00000045;"E"
BL sendbyte;END OF TRANSFER
BL TRANSFEROK
COM_downloadEND
LDMFD sp!,{R0-R2,R5,PC};Return
COM_ERROR
; BL off_p7
;B COM_downloadEND
B COM_ERROR
TRANSFEROK STMFD sp!,{lr}
; BL on_p7
LDMFD sp!,{PC};Return
BUF2ROM STMFD sp!,{R0-R4,lr}
LDR R2,=0x00000D80;END OF RECEIVE_BUFFER
LDR R1,=receive_bufffer
SUB R1,R1,#4
LDR R4,=addr_download
LDR R3,[R4]
SUB R3,R3,#4
BUFWRI_LOOP LDR R0,[R1,#4]!
STR R0,[R3,#4]!
CMP R1,R2;RECEIVE_BUFFFER END
BNE BUFWRI_LOOP
STR R3,[R4]
;SECTOR WRITE OK,CAN WAIT 10MS OR NOT
LDMFD sp!,{R0-R4,PC};Return
GETCHAR STMFD sp!,{R0-R2,R5,lr}
BL getbyte
SUB R5,R5,#0x20
MOV R5,R5,LSL #16
LDR R1,=0x0000C000;写RAM且地址+1
ADD R2,R2,R1
LDR R0,=LCDparam
STR R2,[R0];param
;BL PR11;
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