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📄 test3.lst

📁 SJA1000驱动程序(分别用C&ASM书写)
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                +1   165     
  0004          +1   166     BIT_EI           EQU  04H        ;错误中断位,      中断寄存器的第2位   *
                +1   167                                       ;=1,;错误中断使能时,错误状态位或      *
                +1   168                                           ;总线状态位的变化会置位此位       *
                +1   169                                       ;=0,;微控制器的任何读访问将清除此位   *
                +1   170     
  0008          +1   171     BIT_DOI          EQU  08H        ;数据溢出中断位,中断寄存器的第3位     *
                +1   172                                       ;=1,;当数据溢出中断使能位被置为1时向数*
                +1   173                                           ;据溢出状态位'0-1'跳变,此位被置位*
                +1   174                                       ;=0,;微控制器的任何读访问将清除此位   *
                +1   175     
  0010          +1   176     BIT_WUI          EQU  10H        ;唤醒中断;     中断寄存器的第4位       *    
                +1   177                                       ;=1,;退出睡眠模式时此位被置位         *
                +1   178                                       ;=0,; 微控制器的任何读访问将清除此位  *
                +1   179      
                +1   180     ;BIT_5                            ;系统保留位                           *
                +1   181     ;BIT_6                            ;系统保留位                           *
                +1   182     ;BIT_7                            ;系统保留位                           *
                +1   183     
                +1   184     ;验收代码寄存器;;;复位模式; 可读写                                      *
  FA04          +1   185     REG_ACR    EQU  CONTROLLER_BASE+04H              ;内部验收代码寄存器地址;               *
                +1   186     ;BIT 7  BIT 6   BIT 5   BIT 4   BIT 3   BIT 2   BIT 1   BIT 0           *
                +1   187     ;AC.7   AC.6    AC.5    AC.4    AC.3    AC.2    AC.1    AC.0            *
                +1   188                                      ;验收代码位(AC.7-AC.0)和信息识别码的 *
                +1   189                                      ;高8位(ID.10-ID.3)相等,且与验收屏蔽 *
A51 MACRO ASSEMBLER  TEST3                                                                06/03/2003 11:04:01 PAGE     4

                +1   190                                      ;位(AM.7-AM.0)的相应位相或为1。即如果*
                +1   191                                      ;满足以下方程的描述,则被接收:        *
                +1   192                                      ;(ID.10-ID.3)≡(AC.7-AC.0)]∨(AM.7-AM.0)≡11111111
                +1   193     
                +1   194     ;验收屏蔽寄存器;;;复位模式; 可读写                                      *
  FA05          +1   195     REG_AMR    EQU  CONTROLLER_BASE+05H              ;内部验收屏蔽寄存器地址;               * 
                +1   196     ;BIT 7  BIT 6   BIT 5   BIT 4   BIT 3   BIT 2   BIT 1   BIT 0           *
                +1   197     ;AM.7   AM.6    AM.5    AM.4    AM.3    AM.2    AM.1    AM.0            *
                +1   198                                      ;验收屏蔽寄存器定义验收代码寄存器的    *
                +1   199                                      ;相应位对验收滤波器是"相关的"或"无影   *
                +1   200                                      ;响的"(即可为任意值)。               *
                +1   201     
                +1   202     
                +1   203     ;总线定时寄存器0;;复位模式; 可读写                                      *                  
                                                                
  FA06          +1   204     REG_BTR0   EQU  CONTROLLER_BASE+06H              ;总线定时寄存器0       ;               * 
                +1   205     ;BIT 7  BIT 6   BIT 5   BIT 4   BIT 3   BIT 2   BIT 1   BIT 0           *
                +1   206     ;SJW.1  SJW.0   BRP.5   BRP.4   BRP.3   BRP.2   BRP.1   BRP.0           *
                +1   207                                      ;总线定时寄存器0定义了波特率
                +1   208                                      ;预设值(BRP)和同步跳转宽度(SJW)的值。
                +1   209                                      ;CAN系统时钟由如下公式计算:
                +1   210                                      ;tSCL=2×tCLK×(32×BRP.5+16×BRP.4+8×BRP.3+4×BRP.2+2×B
                             RP.1+BRP.0+1)
                +1   211                                      ;这里tCLK =XTAL的频率周期=1/fXTAL
                +1   212                                      ;同步跳转宽度
                +1   213                                      ;tSJW=tSCL×(2×SJW.1+SJW.0+1)
                +1   214     
                +1   215     ;总线定时寄存器1;;复位模式; 可读写                                      *                  
                                                                
  FA07          +1   216     REG_BTR1   EQU  CONTROLLER_BASE+07H              ;总线定时寄存器1       ;               * 
                +1   217     ;BIT 7  BIT 6   BIT 5   BIT 4   BIT 3   BIT 2   BIT 1   BIT 0           *
                +1   218     ;SAM    TSEG2.2 TSEG2.1 TSEG2.0 TSEG1.3 TSEG1.2 TSEG1.1 TSEG1.0         *
                +1   219                                      ;时间段1(TSEG1)和时间段(TSEG2)
                +1   220                                      ;(TSEG1)和(TSEG2)决定了每一位的时钟数目和采样点的位置,
                             这里:
                +1   221                                      ;tSYNCSEG=1×tSCL
                +1   222                                      ;tTSEG1=tSCL×(8×TSEG1.3+4×TSEG1.2+2×TSEG1.1+TSEG1.0+1
                +1   223                                      ;tTSEG2=tSCL×(4×TSEG2.2+2×TSEG2.1+TSEG2.1+1)
  0080          +1   224     BIT_SAM   EQU  80H               ;采样模式位
                +1   225                                      ;1==总线被采样三次
                +1   226                                      ;0==总线被采样一次
                +1   227     
                +1   228     
                +1   229     ;输出控制寄存器(OCR);;复位模式; 可读写
  FA08          +1   230     REG_OCR   EQU  CONTROLLER_BASE+08H               ;输出控制寄存器                        *
                +1   231     ;BIT 7  BIT 6   BIT 5   BIT 4   BIT 3   BIT 2   BIT 1   BIT 0           *  
                +1   232     ;OCTP1  OCTN1   OCPOL1  OCTP0   OCTN0   OCPOL0  OCMODE1 OCMODE0         *
                +1   233                                      ;具体的输出模式控制请参阅sja1000的数据手册
  0000          +1   234     BIT_PhaseMode  EQU   00H         ;双相输出模式                          *
  0001          +1   235     BIT_TestMode   EQU   01H         ;测试输出模式                          *
  0002          +1   236     BIT_NormalMode EQU   02H         ;正常输出模式                          *
  0003          +1   237     BIT_ClkOutMode EQU   03H         ;时钟输出模式                          *
                +1   238     ;//
  0020          +1   239     BIT_OCPOL1     EQU   20H         ;TX1输出极性控制位                     *
  0000          +1   240     BIT_Tx1Float   EQU   00H         ;配置为悬空
  0040          +1   241     BIT_Tx1PullDn  EQU   40H         ;配置为下拉
  0080          +1   242     BIT_Tx1PullUp  EQU   80H         ;配置为上拉
  00C0          +1   243     BIT_Tx1PshPull EQU   0C0H        ;配置为推挽
                +1   244     ;//
  0004          +1   245     BIT_OCPOL0_Bit EQU   04H         ;TX0输出极性控制位  
  0000          +1   246     BIT_Tx0Float   EQU   00H         ;配置为悬空
  0040          +1   247     BIT_Tx0PullDn  EQU   40H         ;配置为下拉
  0080          +1   248     BIT_Tx0PullUp  EQU   80H         ;配置为上拉
  00C0          +1   249     BIT_Tx0PshPull EQU   0C0H        ;配置为推挽
                +1   250        
A51 MACRO ASSEMBLER  TEST3                                                                06/03/2003 11:04:01 PAGE     5

                +1   251     
                +1   252     
                +1   253     ;测试寄存器(仅由于内部测试)
  FA09          +1   254     REG_TEST       EQU   CONTROLLER_BASE+09H
                +1   255     
                +1   256     ;************************************************************************
                +1   257     ;*发送缓冲区(内部地址0AH--13H)                                          *
                +1   258     ;************************************************************************
  FA0A          +1   259     REG_TxBuffer1   EQU   CONTROLLER_BASE+0AH          ;发送缓冲区1
  FA0B          +1   260     REG_TxBuffer2   EQU   CONTROLLER_BASE+0BH          ;发送缓冲区2
  FA0C          +1   261     REG_TxBuffer3   EQU   CONTROLLER_BASE+0CH          ;发送缓冲区3
  FA0D          +1   262     REG_TxBuffer4   EQU   CONTROLLER_BASE+0DH          ;发送缓冲区4
  FA0E          +1   263     REG_TxBuffer5   EQU   CONTROLLER_BASE+0EH          ;发送缓冲区5
  FA0F          +1   264     REG_TxBuffer6   EQU   CONTROLLER_BASE+0FH          ;发送缓冲区6
  FA10          +1   265     REG_TxBuffer7   EQU   CONTROLLER_BASE+010H         ;发送缓冲区7
  FA11          +1   266     REG_TxBuffer8   EQU   CONTROLLER_BASE+011H         ;发送缓冲区8
  FA12          +1   267     REG_TxBuffer9   EQU   CONTROLLER_BASE+012H         ;发送缓冲区9
  FA13          +1   268     REG_TxBuffer10  EQU   CONTROLLER_BASE+013H         ;发送缓冲区10
                +1   269     
                +1   270     ;************************************************************************
                +1   271     ;*接收缓冲区(内部地址014H--01DH)                                        *
                +1   272     ;************************************************************************
  FA14          +1   273     REG_RxBuffer1   EQU   CONTROLLER_BASE+014H          ;接收缓冲区1
  FA15          +1   274     REG_RxBuffer2   EQU   CONTROLLER_BASE+015H          ;接收缓冲区2
  FA16          +1   275     REG_RxBuffer3   EQU   CONTROLLER_BASE+016H          ;接收缓冲区3
  FA17          +1   276     REG_RxBuffer4   EQU   CONTROLLER_BASE+017H          ;接收缓冲区4
  FA18          +1   277     REG_RxBuffer5   EQU   CONTROLLER_BASE+018H          ;接收缓冲区5
  FA19          +1   278     REG_RxBuffer6   EQU   CONTROLLER_BASE+019H          ;接收缓冲区6
  FA1A          +1   279     REG_RxBuffer7   EQU   CONTROLLER_BASE+01AH          ;接收缓冲区7
  FA1B          +1   280     REG_RxBuffer8   EQU   CONTROLLER_BASE+01BH          ;接收缓冲区8
  FA1C          +1   281     REG_RxBuffer9   EQU   CONTROLLER_BASE+01CH          ;接收缓冲区9
  FA1D          +1   282     REG_RxBuffer10  EQU   CONTROLLER_BASE+01DH          ;接收缓冲区10
                +1   283     
                +1   284     ;************************************************************************
                +1   285     ;*内部地址 01EH 备用                                                    *
                +1   286     ;************************************************************************
                +1   287     
                +1   288     ;************************************************************************
                +1   289     ;*时钟分频寄存器(内部地址01FH)                                          *
                +1   290     ;************************************************************************
  FA1F          +1   291     REG_CDR         EQU   CONTROLLER_BASE+01FH         ;时钟分频寄存器
                +1   292     ;BIT 7    BIT6  BIT 5   BIT 4   BIT 3    BIT 2  BIT 1   BIT 0           *
                +1   293     ;CAN模式  CBP   RXINTEN (0)(1)  关闭时钟 CD.2   CD.1    CD.0            *
  0007          +1   294     BIT_DivBy1      EQU   07H          ;时钟频率=fclk
  0000          +1   295     BIT_DivBy2      EQU   00H          ;时钟频率=fclk/2
                +1   296     ;//
  0008          +1   297     BIT_CLKOff      EQU   08H          ;关闭时钟输出
  0020          +1   298     BIT_RXINTEN     EQU   020H         ;管脚仅用于接收中断
  0040          +1   299     BIT_CBP         EQU   040H         ;CAN比较器旁路控制位
  0080          +1   300     BIT_CANMode     EQU   080H         ;CAN模式控制位
                +1   301     
                +1   302     
                +1   303     ;************************************************************************
                +1   304     ;*SJA1000的命令字                                                       *
                +1   305     ;************************************************************************
  0001          +1   306     TR_CMD          EQU   01h          ;//发送请求命令
  0002          +1   307     AT_CMD          EQU   02h          ;//夭折发送命令
  0004          +1   308     RRB_CMD         EQU   04h          ;//释放接收缓冲区
  0008          +1   309     COS_CMD         EQU   08h          ;//清除超载状态
  0010          +1   310     GTS_CMD         EQU   010h          ;//进入睡眠状态命令  
                +1   311     
                +1   312     ;************************************************************************
                +1   313     ;*SJA1000操作的错误                                                       *
                +1   314     ;************************************************************************
  00FF          +1   315     SJA_INTFACE_ERR EQU   0FFH
  00FE          +1   316     SJA_INIT_ERR    EQU   0FEH       
A51 MACRO ASSEMBLER  TEST3                                                                06/03/2003 11:04:01 PAGE     6

  00FD          +1   317     SJA_RCV_ERR     EQU   0FDH
  00FC          +1   318     SJA_SEND_ERR    EQU   0FCH
                +1   319     
  00FB          +1   320     SJA_INITOBJ_ERR   EQU  0FBH
  00FA          +1   321     SJA_INITBTR_ERR   EQU  0FAH
  00F9          +1   322     SJA_INITOCLK_ERR  EQU  0F9H
                +1   323     
                     324     
                     325     
                     326     ;;;;;;;;;;;;;;;;定义错误字
                     327     ;
                     328     
                     329     ;使用前变量定义
  000F               330     RCV_GOOD                BIT     0FH     ;成功的接收一帧标志
  0010               331     SEC_FLAG                BIT     010H    ;一秒到标志

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